no-OS
ad463x.h
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1 /***************************************************************************/
39 #ifndef AD463X_H_
40 #define AD463x_H_
41 
42 /******************************************************************************/
43 /***************************** Include Files **********************************/
44 /******************************************************************************/
45 #include <stdint.h>
46 #include "spi_engine.h"
47 #include "no_os_util.h"
48 #include "clk_axi_clkgen.h"
49 #include "no_os_pwm.h"
50 #include "no_os_gpio.h"
51 
52 /******************************************************************************/
53 /********************** Macros and Types Declarations *************************/
54 /******************************************************************************/
55 
56 /* Register addresses */
57 #define AD463X_REG_INTERFACE_CONFIG_A 0x00
58 #define AD463X_REG_INTERFACE_CONFIG_B 0x01
59 #define AD463X_REG_DEVICE_CONFIG 0x02
60 #define AD463X_REG_CHIP_TYPE 0x03
61 #define AD463X_REG_PRODUCT_ID_L 0x04
62 #define AD463X_REG_PRODUCT_ID_H 0x05
63 #define AD463X_REG_CHIP_GRADE 0x06
64 #define AD463X_REG_SCRATCH_PAD 0x0A
65 #define AD463X_REG_SPI_REVISION 0x0B
66 #define AD463X_REG_VENDOR_L 0x0C
67 #define AD463X_REG_VENDOR_H 0x0D
68 #define AD463X_REG_STREAM_MODE 0x0E
69 #define AD463X_REG_EXIT_CFG_MODE 0x14
70 #define AD463X_REG_AVG 0x15
71 #define AD463X_REG_OFFSET_BASE 0x16
72 #define AD463X_REG_OFFSET_X0_0 0x16
73 #define AD463X_REG_OFFSET_X0_1 0x17
74 #define AD463X_REG_OFFSET_X0_2 0x18
75 #define AD463X_REG_OFFSET_X1_0 0x19
76 #define AD463X_REG_OFFSET_X1_1 0x1A
77 #define AD463X_REG_OFFSET_X1_2 0x1B
78 #define AD463X_REG_GAIN_BASE 0x1C
79 #define AD463X_REG_GAIN_X0_LSB 0x1C
80 #define AD463X_REG_GAIN_X0_MSB 0x1D
81 #define AD463X_REG_GAIN_X1_LSB 0x1E
82 #define AD463X_REG_GAIN_X1_MSB 0x1F
83 #define AD463X_REG_MODES 0x20
84 #define AD463X_REG_OSCILATOR 0x21
85 #define AD463X_REG_IO 0x22
86 #define AD463X_REG_PAT0 0x23
87 #define AD463X_REG_PAT1 0x24
88 #define AD463X_REG_PAT2 0x25
89 #define AD463X_REG_PAT3 0x26
90 #define AD463X_REG_DIG_DIAG 0x34
91 #define AD463X_REG_DIG_ERR 0x35
92 /* INTERFACE_CONFIG_A */
93 #define AD463X_CFG_SW_RESET (NO_OS_BIT(7) | NO_OS_BIT(0))
94 #define AD463X_CFG_SDO_ENABLE NO_OS_BIT(4)
95 /* MODES */
96 #define AD463X_SW_RESET_MSK (NO_OS_BIT(7) | NO_OS_BIT(0))
97 #define AD463X_LANE_MODE_MSK (NO_OS_BIT(7) | NO_OS_BIT(6))
98 #define AD463X_CLK_MODE_MSK (NO_OS_BIT(5) | NO_OS_BIT(4))
99 #define AD463X_DDR_MODE_MSK NO_OS_BIT(3)
100 #define AD463X_SDR_MODE 0x00
101 #define AD463X_DDR_MODE NO_OS_BIT(3)
102 #define AD463X_OUT_DATA_MODE_MSK (NO_OS_BIT(2) | NO_OS_BIT(1) | NO_OS_BIT(0))
103 #define AD463X_24_DIFF 0x00
104 #define AD463X_16_DIFF_8_COM 0x01
105 #define AD463X_24_DIFF_8_COM 0x02
106 #define AD463X_30_AVERAGED_DIFF 0x03
107 #define AD463X_32_PATTERN 0x04
108 /* EXIT_CFG_MD */
109 #define AD463X_EXIT_CFG_MODE NO_OS_BIT(0)
110 /* CHANNEL */
111 #define AD463X_CHANNEL_0 0x00
112 #define AD463X_CHANNEL_1 0x01
113 /* OFFSET */
114 #define AD463X_OFFSET_0 0x00
115 #define AD463X_OFFSET_1 0x01
116 #define AD463X_OFFSET_2 0x02
117 /* GAIN */
118 #define AD463X_GAIN_LSB 0x00
119 #define AD463X_GAIN_MSB 0x01
120 /* LANE MODE */
121 #define AD463X_ONE_LANE_PER_CH 0x00
122 #define AD463X_TWO_LANES_PER_CH NO_OS_BIT(6)
123 #define AD463X_FOUR_LANES_PER_CH NO_OS_BIT(7)
124 #define AD463X_SHARED_TWO_CH (NO_OS_BIT(6) | NO_OS_BIT(7))
125 /* CLK MODE */
126 #define AD463X_SPI_COMPATIBLE_MODE 0x00
127 #define AD463X_ECHO_CLOCK_MODE NO_OS_BIT(4)
128 #define AD463X_CLOCK_MASTER_MODE NO_OS_BIT(5)
129 /* POWER MODE */
130 #define AD463X_NORMAL_MODE 0x00
131 #define AD463X_LOW_POWER_MODE (NO_OS_BIT(1) | NO_OS_BIT(0))
132 /* AVG */
133 #define AD463X_AVG_FILTER_RESET NO_OS_BIT(7)
134 #define AD463X_CONFIG_TIMING 0x2000
135 #define AD463X_REG_READ_DUMMY 0x00
136 #define AD463X_REG_WRITE 0x00
137 #define AD463X_REG_READ NO_OS_BIT(7)
138 #define AD463X_REG_CHAN_OFFSET(ch, pos) (AD463X_REG_OFFSET_BASE + (3 * ch) + pos)
139 #define AD463X_REG_CHAN_GAIN(ch, pos) (AD463X_REG_GAIN_BASE + (2 * ch) + pos)
140 /* IO */
141 #define AD463X_DRIVER_STRENGTH_MASK NO_OS_BIT(0)
142 #define AD463X_NORMAL_OUTPUT_STRENGTH 0x00
143 #define AD463X_DOUBLE_OUTPUT_STRENGTH NO_OS_BIT(1)
144 /* OUT_DATA_PAT */
145 #define AD463X_OUT_DATA_PAT 0x5A5A0F0F
146 
147 #define AD463X_TRIGGER_PULSE_WIDTH_NS 0x0A
148 
149 #define AD463X_GAIN_MAX_VAL_SCALED 19997
150 
155 enum ad463x_id {
174 };
175 
192  uint32_t axi_clkgen_rate;
198  uint8_t reg_data_width;
200  uint8_t lane_mode;
202  uint8_t clock_mode;
204  uint8_t data_rate;
206  uint8_t output_mode;
208  void (*dcache_invalidate_range)(uint32_t address, uint32_t bytes_count);
209 };
210 
215 struct ad463x_dev {
231  uint8_t reg_data_width;
233  uint8_t read_bytes_no;
237  uint8_t lane_mode;
239  uint8_t clock_mode;
241  uint8_t data_rate;
243  uint8_t output_mode;
245  void (*dcache_invalidate_range)(uint32_t address, uint32_t bytes_count);
246 };
247 
248 /******************************************************************************/
249 /************************ Functions Declarations ******************************/
250 /******************************************************************************/
252 int32_t ad463x_spi_reg_read(struct ad463x_dev *dev,
253  uint16_t reg_addr,
254  uint8_t *reg_data);
255 
257 int32_t ad463x_spi_reg_write(struct ad463x_dev *dev,
258  uint16_t reg_addr,
259  uint8_t reg_data);
260 
262 int32_t ad463x_spi_reg_read_masked(struct ad463x_dev *dev,
263  uint16_t reg_addr,
264  uint8_t mask,
265  uint8_t *data);
266 
268 int32_t ad463x_spi_reg_write_masked(struct ad463x_dev *dev,
269  uint16_t reg_addr,
270  uint8_t mask,
271  uint8_t data);
272 
274 int32_t ad463x_set_pwr_mode(struct ad463x_dev *dev, uint8_t mode);
275 
277 int32_t ad463x_set_avg_frame_len(struct ad463x_dev *dev, uint8_t mode);
278 
280 int32_t ad463x_set_drive_strength(struct ad463x_dev *dev, uint8_t mode);
281 
283 int32_t ad463x_exit_reg_cfg_mode(struct ad463x_dev *dev);
284 
286 int32_t ad463x_set_ch_gain(struct ad463x_dev *dev, uint8_t ch_idx,
287  uint64_t gain);
288 
290 int32_t ad463x_set_ch_offset(struct ad463x_dev *dev, uint8_t ch_idx,
291  uint32_t offset);
292 
294 int32_t ad463x_read_data(struct ad463x_dev *dev,
295  uint32_t *buf,
296  uint16_t samples);
297 
299 int32_t ad463x_init(struct ad463x_dev **device,
300  struct ad463x_init_param *init_param);
301 
303 int32_t ad463x_remove(struct ad463x_dev *dev);
304 
305 #endif // AD463X_H_
ad463x_set_drive_strength
int32_t ad463x_set_drive_strength(struct ad463x_dev *dev, uint8_t mode)
Set drive strength.
Definition: ad463x.c:186
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
ad463x_id
ad463x_id
Device type.
Definition: ad463x.h:155
spi_engine_offload_message::no_commands
uint32_t no_commands
Definition: spi_engine.h:167
no_os_pwm_init_param
Structure containing the init parameters needed by the PWM generator.
Definition: no_os_pwm.h:66
ad463x_set_ch_gain
int32_t ad463x_set_ch_gain(struct ad463x_dev *dev, uint8_t ch_idx, uint64_t gain)
Set channel gain.
Definition: ad463x.c:228
ad463x_set_avg_frame_len
int32_t ad463x_set_avg_frame_len(struct ad463x_dev *dev, uint8_t mode)
Set average frame length.
Definition: ad463x.c:149
ad463x_init_param::reg_data_width
uint8_t reg_data_width
Definition: ad463x.h:198
AD463x_TEST_DATA
#define AD463x_TEST_DATA
Definition: ad463x.c:53
ad463x_init_param::spi_init
struct no_os_spi_init_param * spi_init
Definition: ad463x.h:182
ad463x_init_param::clock_mode
uint8_t clock_mode
Definition: ad463x.h:202
ad463x_set_avg_frame_len
int32_t ad463x_set_avg_frame_len(struct ad463x_dev *dev, uint8_t mode)
Set average frame length.
Definition: ad463x.c:149
ad463x_init_param::data_rate
uint8_t data_rate
Definition: ad463x.h:204
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
AD463X_REG_READ_DUMMY
#define AD463X_REG_READ_DUMMY
Definition: ad463x.h:135
CS_LOW
#define CS_LOW
Definition: spi_engine.h:79
AD463X_REG_DEVICE_CONFIG
#define AD463X_REG_DEVICE_CONFIG
Definition: ad463x.h:59
AD463X_EXIT_CFG_MODE
#define AD463X_EXIT_CFG_MODE
Definition: ad463x.h:109
ad463x_dev::lane_mode
uint8_t lane_mode
Definition: ad463x.h:237
AD463X_DDR_MODE
#define AD463X_DDR_MODE
Definition: ad463x.h:101
ID_AD4631_16
@ ID_AD4631_16
Definition: ad463x.h:167
ad463x_init_param::axi_clkgen_rate
uint32_t axi_clkgen_rate
Definition: ad463x.h:192
spi_engine_offload_init
int32_t spi_engine_offload_init(struct no_os_spi_desc *desc, const struct spi_engine_offload_init_param *param)
Initialize the SPI engine's offload module.
Definition: spi_engine.c:757
ad463x_spi_reg_read
int32_t ad463x_spi_reg_read(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
Read device register.
Definition: ad463x.c:66
no_os_pwm_remove
int32_t no_os_pwm_remove(struct no_os_pwm_desc *desc)
Free the memory allocated by axi_pwmgen_init().
Definition: axi_pwm.c:372
clk_axi_clkgen.h
Driver for the Analog Devices AXI CLKGEN.
ad463x_spi_reg_write
int32_t ad463x_spi_reg_write(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t reg_data)
Write device register.
Definition: ad463x.c:90
pr_err
#define pr_err(fmt, args...)
Definition: no_os_print_log.h:80
spi_engine_offload_message::commands_data
uint32_t * commands_data
Definition: spi_engine.h:169
ad463x_exit_reg_cfg_mode
int32_t ad463x_exit_reg_cfg_mode(struct ad463x_dev *dev)
Exit register configuration mode.
Definition: ad463x.c:201
AD463X_CLK_MODE_MSK
#define AD463X_CLK_MODE_MSK
Definition: ad463x.h:98
ad463x_init_param::output_mode
uint8_t output_mode
Definition: ad463x.h:206
no_os_delay.h
Header file of Delay functions.
axi_clkgen_init
Definition: clk_axi_clkgen.h:56
axi_clkgen_set_rate
int32_t axi_clkgen_set_rate(struct axi_clkgen *clkgen, uint32_t rate)
axi_clkgen_set_rate
Definition: clk_axi_clkgen.c:418
ad463x_dev::gpio_resetn
struct no_os_gpio_desc * gpio_resetn
Definition: ad463x.h:219
ad463x_init_param::offload_init_param
struct spi_engine_offload_init_param * offload_init_param
Definition: ad463x.h:188
spi_engine_offload_message
Structure representing an offload message.
Definition: spi_engine.h:160
ad463x_spi_reg_read_masked
int32_t ad463x_spi_reg_read_masked(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t mask, uint8_t *data)
device
Definition: ad9361_util.h:75
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
AD463X_OFFSET_1
#define AD463X_OFFSET_1
Definition: ad463x.h:115
no_os_print_log.h
Print messages helpers.
ad463x_init_param::device_id
enum ad463x_id device_id
Definition: ad463x.h:196
AD463X_CONFIG_TIMING
#define AD463X_CONFIG_TIMING
Definition: ad463x.h:134
ad463x_dev::trigger_pwm_desc
struct no_os_pwm_desc * trigger_pwm_desc
Definition: ad463x.h:221
AD463X_DOUBLE_OUTPUT_STRENGTH
#define AD463X_DOUBLE_OUTPUT_STRENGTH
Definition: ad463x.h:143
ad463x_dev::data_rate
uint8_t data_rate
Definition: ad463x.h:241
AD463X_TWO_LANES_PER_CH
#define AD463X_TWO_LANES_PER_CH
Definition: ad463x.h:122
axi_clkgen_init
int32_t axi_clkgen_init(struct axi_clkgen **clk, const struct axi_clkgen_init *init)
axi_clkgen_init
Definition: clk_axi_clkgen.c:524
ID_AD4630_16
@ ID_AD4630_16
Definition: ad463x.h:161
axi_clkgen
Definition: clk_axi_clkgen.h:50
NO_OS_ARRAY_SIZE
#define NO_OS_ARRAY_SIZE(x)
Definition: no_os_util.h:53
AD463X_FOUR_LANES_PER_CH
#define AD463X_FOUR_LANES_PER_CH
Definition: ad463x.h:123
ID_AD4631_20
@ ID_AD4631_20
Definition: ad463x.h:165
AD463X_GAIN_LSB
#define AD463X_GAIN_LSB
Definition: ad463x.h:118
ad463x_set_ch_gain
int32_t ad463x_set_ch_gain(struct ad463x_dev *dev, uint8_t ch_idx, uint64_t gain)
Set channel gain.
Definition: ad463x.c:228
ad463x_spi_reg_write_masked
int32_t ad463x_spi_reg_write_masked(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t mask, uint8_t data)
SPI write device register using a mask.
Definition: ad463x.c:111
NO_OS_GPIO_LOW
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
ad463x_init_param::trigger_pwm_init
struct no_os_pwm_init_param * trigger_pwm_init
Definition: ad463x.h:186
AD463X_SHARED_TWO_CH
#define AD463X_SHARED_TWO_CH
Definition: ad463x.h:124
ad7616_init_param::reg_access_speed
uint32_t reg_access_speed
Definition: ad7616.h:169
ad463x_dev::reg_data_width
uint8_t reg_data_width
Definition: ad463x.h:231
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: delay.c:130
ad463x_set_pwr_mode
int32_t ad463x_set_pwr_mode(struct ad463x_dev *dev, uint8_t mode)
Set power mode.
Definition: ad463x.c:135
ID_AD4631_24
@ ID_AD4631_24
Definition: ad463x.h:163
CS_HIGH
#define CS_HIGH
Definition: spi_engine.h:78
spi_engine_set_speed
void spi_engine_set_speed(struct no_os_spi_desc *desc, uint32_t speed_hz)
Set SPI engine clock frequency.
Definition: spi_engine.c:150
AD463X_ONE_LANE_PER_CH
#define AD463X_ONE_LANE_PER_CH
Definition: ad463x.h:121
no_os_error.h
Error codes definition.
no_os_pwm_enable
int32_t no_os_pwm_enable(struct no_os_pwm_desc *desc)
Enable PWM generator device.
Definition: axi_pwm.c:107
AD463X_REG_MODES
#define AD463X_REG_MODES
Definition: ad463x.h:83
spi_engine_set_transfer_width
int32_t spi_engine_set_transfer_width(struct no_os_spi_desc *desc, uint8_t data_wdith)
Set width of the transfered word over SPI.
Definition: spi_engine.c:129
ID_AD4632_24
@ ID_AD4632_24
Definition: ad463x.h:169
ID_AD4632_16
@ ID_AD4632_16
Definition: ad463x.h:173
AD463X_OFFSET_0
#define AD463X_OFFSET_0
Definition: ad463x.h:114
ad7616_init_param::offload_init_param
struct spi_engine_offload_init_param * offload_init_param
Definition: ad7616.h:168
ad463x.h
Header file of AD463x Driver.
spi_engine.h
ad463x_set_ch_offset
int32_t ad463x_set_ch_offset(struct ad463x_dev *dev, uint8_t ch_idx, uint32_t offset)
Set channel offset.
Definition: ad463x.c:257
ad463x_spi_reg_write_masked
int32_t ad463x_spi_reg_write_masked(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t mask, uint8_t data)
SPI write device register using a mask.
Definition: ad463x.c:111
ad463x_read_data
int32_t ad463x_read_data(struct ad463x_dev *dev, uint32_t *buf, uint16_t samples)
Read from device. Enter register mode to read/write registers.
Definition: ad463x.c:321
AD463X_REG_EXIT_CFG_MODE
#define AD463X_REG_EXIT_CFG_MODE
Definition: ad463x.h:69
AD463X_REG_AVG
#define AD463X_REG_AVG
Definition: ad463x.h:70
ad463x_dev::reg_access_speed
uint32_t reg_access_speed
Definition: ad463x.h:227
ad463x_init_param::reg_access_speed
uint32_t reg_access_speed
Definition: ad463x.h:194
ad463x_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: ad463x.h:217
ad463x_dev::dcache_invalidate_range
void(* dcache_invalidate_range)(uint32_t address, uint32_t bytes_count)
Definition: ad463x.h:245
AD463X_NORMAL_MODE
#define AD463X_NORMAL_MODE
Definition: ad463x.h:130
ad463x_init_param::lane_mode
uint8_t lane_mode
Definition: ad463x.h:200
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
AD463X_REG_SCRATCH_PAD
#define AD463X_REG_SCRATCH_PAD
Definition: ad463x.h:64
ad463x_dev::capture_data_width
uint8_t capture_data_width
Definition: ad463x.h:235
ad463x_remove
int32_t ad463x_remove(struct ad463x_dev *dev)
Free the memory allocated by ad463x_init().
Definition: ad463x.c:517
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
AD463X_16_DIFF_8_COM
#define AD463X_16_DIFF_8_COM
Definition: ad463x.h:104
ad463x_init
int32_t ad463x_init(struct ad463x_dev **device, struct ad463x_init_param *init_param)
Initialize the device.
Definition: ad463x.c:364
AD463X_REG_READ
#define AD463X_REG_READ
Definition: ad463x.h:137
ad463x_set_drive_strength
int32_t ad463x_set_drive_strength(struct ad463x_dev *dev, uint8_t mode)
Set drive strength.
Definition: ad463x.c:186
ad463x_dev::clock_mode
uint8_t clock_mode
Definition: ad463x.h:239
spi_engine_offload_message::commands
uint32_t * commands
Definition: spi_engine.h:165
AD463X_AVG_FILTER_RESET
#define AD463X_AVG_FILTER_RESET
Definition: ad463x.h:133
no_os_pwm_desc
Structure representing an PWM generator device.
Definition: no_os_pwm.h:85
AD463X_REG_CHAN_GAIN
#define AD463X_REG_CHAN_GAIN(ch, pos)
Definition: ad463x.h:139
ad463x_read_data
int32_t ad463x_read_data(struct ad463x_dev *dev, uint32_t *buf, uint16_t samples)
Read from device. Enter register mode to read/write registers.
Definition: ad463x.c:321
no_os_pwm_init
int32_t no_os_pwm_init(struct no_os_pwm_desc **desc, const struct no_os_pwm_init_param *param)
Initialize the pwm axi generator and the handler associated with it.
Definition: axi_pwm.c:280
ID_AD4630_24
@ ID_AD4630_24
Definition: ad463x.h:157
ad7616_init_param::dcache_invalidate_range
void(* dcache_invalidate_range)(uint32_t address, uint32_t bytes_count)
Definition: ad7616.h:184
ad463x_remove
int32_t ad463x_remove(struct ad463x_dev *dev)
Free the memory allocated by ad463x_init().
Definition: ad463x.c:517
ad463x_spi_reg_write
int32_t ad463x_spi_reg_write(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t reg_data)
Write device register.
Definition: ad463x.c:90
no_os_pwm.h
Header file of PWM Interface.
ad463x_dev::clkgen
struct axi_clkgen * clkgen
Definition: ad463x.h:225
ad463x_dev::output_mode
uint8_t output_mode
Definition: ad463x.h:243
AD463X_REG_CHAN_OFFSET
#define AD463X_REG_CHAN_OFFSET(ch, pos)
Definition: ad463x.h:138
AD463X_DDR_MODE_MSK
#define AD463X_DDR_MODE_MSK
Definition: ad463x.h:99
AD463X_OUT_DATA_MODE_MSK
#define AD463X_OUT_DATA_MODE_MSK
Definition: ad463x.h:102
AD463X_LOW_POWER_MODE
#define AD463X_LOW_POWER_MODE
Definition: ad463x.h:131
no_os_gpio_set_value
int32_t no_os_gpio_set_value(struct no_os_gpio_desc *desc, uint8_t value)
Set the value of the specified GPIO.
Definition: no_os_gpio.c:160
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ad463x_dev
Device initialization parameters.
Definition: ad463x.h:215
AD463X_24_DIFF_8_COM
#define AD463X_24_DIFF_8_COM
Definition: ad463x.h:105
AD463X_30_AVERAGED_DIFF
#define AD463X_30_AVERAGED_DIFF
Definition: ad463x.h:106
ad463x_init_param::dcache_invalidate_range
void(* dcache_invalidate_range)(uint32_t address, uint32_t bytes_count)
Definition: ad463x.h:208
ad463x_dev::read_bytes_no
uint8_t read_bytes_no
Definition: ad463x.h:233
spi_engine_offload_transfer
int32_t spi_engine_offload_transfer(struct no_os_spi_desc *desc, struct spi_engine_offload_message msg, uint32_t no_samples)
Initiate a SPI transfer in offload mode.
Definition: spi_engine.c:803
ad463x_init_param::clkgen_init
struct axi_clkgen_init * clkgen_init
Definition: ad463x.h:190
ad463x_init
int32_t ad463x_init(struct ad463x_dev **device, struct ad463x_init_param *init_param)
Initialize the device.
Definition: ad463x.c:364
AD463X_GAIN_MAX_VAL_SCALED
#define AD463X_GAIN_MAX_VAL_SCALED
Definition: ad463x.h:149
ad463x_init_param
Definition: ad463x.h:180
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:70
spi_engine_offload_init_param
Structure containing the init parameters needed by the offload module.
Definition: spi_engine.h:145
no_os_gpio.h
Header file of GPIO Interface.
AD463X_REG_IO
#define AD463X_REG_IO
Definition: ad463x.h:85
ad463x_dev::device_id
enum ad463x_id device_id
Definition: ad463x.h:229
AD463X_GAIN_MSB
#define AD463X_GAIN_MSB
Definition: ad463x.h:119
no_os_spi_desc::max_speed_hz
uint32_t max_speed_hz
Definition: no_os_spi.h:136
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
AD463X_NORMAL_OUTPUT_STRENGTH
#define AD463X_NORMAL_OUTPUT_STRENGTH
Definition: ad463x.h:142
axi_clkgen_remove
int32_t axi_clkgen_remove(struct axi_clkgen *clkgen)
axi_clkgen_remove
Definition: clk_axi_clkgen.c:545
no_os_util.h
Implementation of utility functions.
ad463x_dev::offload_init_param
struct spi_engine_offload_init_param * offload_init_param
Definition: ad463x.h:223
ad463x_set_ch_offset
int32_t ad463x_set_ch_offset(struct ad463x_dev *dev, uint8_t ch_idx, uint32_t offset)
Set channel offset.
Definition: ad463x.c:257
AD463X_DRIVER_STRENGTH_MASK
#define AD463X_DRIVER_STRENGTH_MASK
Definition: ad463x.h:141
ID_AD4630_20
@ ID_AD4630_20
Definition: ad463x.h:159
spi_engine_offload_message::rx_addr
uint32_t rx_addr
Definition: spi_engine.h:173
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
AD463X_LANE_MODE_MSK
#define AD463X_LANE_MODE_MSK
Definition: ad463x.h:97
READ
#define READ(no_bytes)
Definition: spi_engine.h:68
ad463x_init_param::gpio_resetn
struct no_os_gpio_init_param * gpio_resetn
Definition: ad463x.h:184
AD463X_SPI_COMPATIBLE_MODE
#define AD463X_SPI_COMPATIBLE_MODE
Definition: ad463x.h:126
ad463x_set_pwr_mode
int32_t ad463x_set_pwr_mode(struct ad463x_dev *dev, uint8_t mode)
Set power mode.
Definition: ad463x.c:135
ad463x_exit_reg_cfg_mode
int32_t ad463x_exit_reg_cfg_mode(struct ad463x_dev *dev)
Exit register configuration mode.
Definition: ad463x.c:201
AD463X_OFFSET_2
#define AD463X_OFFSET_2
Definition: ad463x.h:116
ID_AD4632_20
@ ID_AD4632_20
Definition: ad463x.h:171
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
ad463x_spi_reg_read
int32_t ad463x_spi_reg_read(struct ad463x_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
Read device register.
Definition: ad463x.c:66
no_os_gpio_get_optional
int32_t no_os_gpio_get_optional(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Get the value of an optional GPIO.
Definition: no_os_gpio.c:75