no-OS
ad5758.h
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1 /***************************************************************************/
39 #ifndef AD5758_H_
40 #define AD5758_H_
41 
42 #include "no_os_gpio.h"
43 #include "no_os_spi.h"
44 
45 /******************************************************************************/
46 /********************** Macros and Constants Definitions **********************/
47 /******************************************************************************/
48 /*
49  * Create a contiguous bitmask starting at bit position @l and ending at
50  * position @h.
51  */
52 #define NO_OS_GENMASK(h, l) \
53  (((~0UL) - (1UL << (l)) + 1) & (~0UL >> (31 - (h))))
54 #define NO_OS_BIT(x) (1UL << (x))
55 
56 /* AD5758 registers definition */
57 #define AD5758_REG_NOP 0x00
58 #define AD5758_REG_DAC_INPUT 0x01
59 #define AD5758_REG_DAC_OUTPUT 0x02
60 #define AD5758_REG_CLEAR_CODE 0x03
61 #define AD5758_REG_USER_GAIN 0x04
62 #define AD5758_REG_USER_OFFSET 0x05
63 #define AD5758_REG_DAC_CONFIG 0x06
64 #define AD5758_REG_SW_LDAC 0x07
65 #define AD5758_REG_KEY 0x08
66 #define AD5758_REG_GP_CONFIG1 0x09
67 #define AD5758_REG_GP_CONFIG2 0x0A
68 #define AD5758_REG_DCDC_CONFIG1 0x0B
69 #define AD5758_REG_DCDC_CONFIG2 0x0C
70 #define AD5758_REG_WDT_CONFIG 0x0F
71 #define AD5758_REG_DIGITAL_DIAG_CONFIG 0x10
72 #define AD5758_REG_ADC_CONFIG 0x11
73 #define AD5758_REG_FAULT_PIN_CONFIG 0x12
74 #define AD5758_REG_TWO_STAGE_READBACK_SELECT 0x13
75 #define AD5758_REG_DIGITAL_DIAG_RESULTS 0x14
76 #define AD5758_REG_ANALOG_DIAG_RESULTS 0x15
77 #define AD5758_REG_STATUS 0x16
78 #define AD5758_REG_CHIP_ID 0x17
79 #define AD5758_REG_FREQ_MONITOR 0x18
80 #define AD5758_REG_DEVICE_ID_0 0x19
81 #define AD5758_REG_DEVICE_ID_1 0x1A
82 #define AD5758_REG_DEVICE_ID_2 0x1B
83 #define AD5758_REG_DEVICE_ID_3 0x1C
84 
85 /* AD5758_REG_DAC_CONFIG */
86 #define AD5758_DAC_CONFIG_RANGE_MSK NO_OS_GENMASK(3, 0)
87 #define AD5758_DAC_CONFIG_RANGE_MODE(x) (((x) & 0xF) << 0)
88 #define AD5758_DAC_CONFIG_OVRNG_EN_MSK NO_OS_BIT(4)
89 #define AD5758_DAC_CONFIG_OVRNG_EN_MODE(x) (((x) & 0x1) << 4)
90 #define AD5758_DAC_CONFIG_INT_EN_MSK NO_OS_BIT(5)
91 #define AD5758_DAC_CONFIG_INT_EN_MODE(x) (((x) & 0x1) << 5)
92 #define AD5758_DAC_CONFIG_OUT_EN_MSK NO_OS_BIT(6)
93 #define AD5758_DAC_CONFIG_OUT_EN_MODE(x) (((x) & 0x1) << 6)
94 #define AD5758_DAC_CONFIG_RSET_EXT_EN_MSK NO_OS_BIT(7)
95 #define AD5758_DAC_CONFIG_RSET_EXT_EN_MODE(x) (((x) & 0x1) << 7)
96 #define AD5758_DAC_CONFIG_SR_EN_MSK NO_OS_BIT(8)
97 #define AD5758_DAC_CONFIG_SR_EN_MODE(x) (((x) & 0x1) << 8)
98 #define AD5758_DAC_CONFIG_SR_CLOCK_MSK NO_OS_GENMASK(12, 9)
99 #define AD5758_DAC_CONFIG_SR_CLOCK_MODE(x) (((x) & 0xF) << 9)
100 #define AD5758_DAC_CONFIG_SR_STEP_MSK NO_OS_GENMASK(15, 13)
101 #define AD5758_DAC_CONFIG_SR_STEP_MODE(x) (((x) & 0x7) << 13)
102 
103 /* AD5758_REG_SW_LDAC */
104 #define AD5758_SW_LDAC_COMMAND 0x1DAC
105 
106 /* AD5758_REG_KEY */
107 #define AD5758_KEY_CODE_RESET_1 0x15FA
108 #define AD5758_KEY_CODE_RESET_2 0xAF51
109 #define AD5758_KEY_CODE_SINGLE_ADC_CONV 0x1ADC
110 #define AD5758_KEY_CODE_RESET_WDT 0x0D06
111 #define AD5758_KEY_CODE_CALIB_MEM_REFRESH 0xFCBA
112 
113 /* AD5758_REG_GP_CONFIG1 */
114 #define AD5758_GP_CONFIG1_OSC_STOP_DETECT_EN_MSK NO_OS_BIT(2)
115 #define AD5758_GP_CONFIG1_OSC_STOP_DETECT_EN_MODE(x) (((x) & 0x1) << 2)
116 #define AD5758_GP_CONFIG1_SPI_DIAG_QUIET_EN_MSK NO_OS_BIT(3)
117 #define AD5758_GP_CONFIG1_SPI_DIAG_QUIET_EN_MODE(x) (((x) & 0x1) << 3)
118 #define AD5758_GP_CONFIG1_CLEAR_NOW_EN_MSK NO_OS_BIT(4)
119 #define AD5758_GP_CONFIG1_CLEAR_NOW_EN_MODE(x) (((x) & 0x1) << 4)
120 #define AD5758_GP_CONFIG1_NEG_OFFSET_EN_MSK NO_OS_BIT(5)
121 #define AD5758_GP_CONFIG1_NEG_OFFSET_EN_MODE(x) (((x) & 0x1) << 5)
122 #define AD5758_GP_CONFIG1_HART_EN_MSK NO_OS_BIT(6)
123 #define AD5758_GP_CONFIG1_HART_EN_MODE(x) (((x) & 0x1) << 6)
124 #define AD5758_GP_CONFIG1_CLKOUT_FREQ_MSK NO_OS_GENMASK(9, 7)
125 #define AD5758_GP_CONFIG1_CLKOUT_FREQ_MODE(x) (((x) & 0x7) << 7)
126 #define AD5758_GP_CONFIG1_CLKOUT_CONFIG_MSK NO_OS_GENMASK(11, 10)
127 #define AD5758_GP_CONFIG1_CLKOUT_CONFIG_MODE(x) (((x) & 0x3) << 10)
128 #define AD5758_GP_CONFIG1_SET_TEMP_THRESHOLD_MSK NO_OS_GENMASK(13, 12)
129 #define AD5758_GP_CONFIG1_SET_TEMP_THRESHOLD_MODE(x) (((x) & 0x3) << 12)
130 
131 /* AD5758_REG_GP_CONFIG2 */
132 #define AD5758_GP_CONFIG2_FAULT_TIMEOUT_MSK NO_OS_BIT(9)
133 #define AD5758_GP_CONFIG2_FAULT_TIMEOUT_MODE(x) (((x) & 0x1) << 9)
134 #define AD5758_GP_CONFIG2_GLOBAL_SW_LDAC_MSK NO_OS_BIT(10)
135 #define AD5758_GP_CONFIG2_GLOBAL_SW_LDAC_MODE(x) (((x) & 0x1) << 10)
136 #define AD5758_GP_CONFIG2_INT_I_MONITOR_EN_MSK NO_OS_BIT(11)
137 #define AD5758_GP_CONFIG2_INT_I_MONITOR_EN_MODE(x) (((x) & 0x1) << 11)
138 #define AD5758_GP_CONFIG2_COMPARATOR_CONFIG_MSK NO_OS_GENMASK(14, 13)
139 #define AD5758_GP_CONFIG2_COMPARATOR_CONFIG_MODE(x) (((x) & 0x3) << 13)
140 
141 /* AD5758_REG_DCDC_CONFIG1 */
142 #define AD5758_DCDC_CONFIG1_DCDC_VPROG_MSK NO_OS_GENMASK(4, 0)
143 #define AD5758_DCDC_CONFIG1_DCDC_VPROG_MODE(x) (((x) & 0x1F) << 0)
144 #define AD5758_DCDC_CONFIG1_DCDC_MODE_MSK NO_OS_GENMASK(6, 5)
145 #define AD5758_DCDC_CONFIG1_DCDC_MODE_MODE(x) (((x) & 0x3) << 5)
146 
147 /* AD5758_REG_DCDC_CONFIG2 */
148 #define AD5758_DCDC_CONFIG2_ILIMIT_MSK NO_OS_GENMASK(3, 1)
149 #define AD5758_DCDC_CONFIG2_ILIMIT_MODE(x) (((x) & 0x7) << 1)
150 #define AD5758_DCDC_CONFIG2_ADC_CONTROL_DIAG_MSK NO_OS_GENMASK(5, 4)
151 #define AD5758_DCDC_CONFIG2_ADC_CONTROL_DIAG_MODE(x) (((x) & 0x3) << 4)
152 #define AD5758_DCDC_CONFIG2_VIOUT_PULLDOWN_EN_MSK NO_OS_BIT(6)
153 #define AD5758_DCDC_CONFIG2_VIOUT_PULLDOWN_EN_MODE(x) (((x) & 0x1) << 6)
154 #define AD5758_DCDC_CONFIG2_SHORT_DEGLITCH_MSK NO_OS_BIT(7)
155 #define AD5758_DCDC_CONFIG2_SHORT_DEGLITCH_MODE(x) (((x) & 0x1) << 7)
156 #define AD5758_DCDC_CONFIG2_READ_COMP_DIS_MSK NO_OS_BIT(10)
157 #define AD5758_DCDC_CONFIG2_READ_COMP_DIS_MODE(x) (((x) & 0x1) << 10)
158 #define AD5758_DCDC_CONFIG2_INTR_SAT_3WI_MSK NO_OS_BIT(11)
159 #define AD5758_DCDC_CONFIG2_BUSY_3WI_MSK NO_OS_BIT(12)
160 
161 /* AD5758_REG_WDT_CONFIG */
162 #define AD5758_WDT_CONFIG_WDT_TIMEOUT_MSK NO_OS_GENMASK(3, 0)
163 #define AD5758_WDT_CONFIG_WDT_TIMEOUT_MODE(x) (((x) & 0xF) << 0)
164 #define AD5758_WDT_CONFIG_WDT_EN_MSK NO_OS_BIT(6)
165 #define AD5758_WDT_CONFIG_WDT_EN_MODE(x) (((x) & 0x1) << 6)
166 #define AD5758_WDT_CONFIG_KICK_ON_VALID_WRITE_MSK NO_OS_BIT(8)
167 #define AD5758_WDT_CONFIG_KICK_ON_VALID_WRITE_MODE(x) (((x) & 0x1) << 8)
168 #define AD5758_WDT_CONFIG_RESET_ON_WDT_FAIL_MSK NO_OS_BIT(9)
169 #define AD5758_WDT_CONFIG_RESET_ON_WDT_FAIL_MODE(x) (((x) & 0x1) << 9)
170 #define AD5758_WDT_CONFIG_CLEAR_ON_WDT_FAIL_MSK NO_OS_BIT(10)
171 #define AD5758_WDT_CONFIG_CLEAR_ON_WDT_FAIL_MODE(x) (((x) & 0x1) << 10)
172 
173 /* AD5758_REG_DIGITAL_DIAG_CONFIG */
174 #define AD5758_DIG_DIAG_CONFIG_SPI_CRC_EN_MSK NO_OS_BIT(0)
175 #define AD5758_DIG_DIAG_CONFIG_SPI_CRC_EN_MODE(x) (((x) & 0x1) << 0)
176 #define AD5758_DIG_DIAG_CONFIG_FREQ_MON_EN_MSK NO_OS_BIT(2)
177 #define AD5758_DIG_DIAG_CONFIG_FREQ_MON_EN_MODE(x) (((x) & 0x1) << 2)
178 #define AD5758_DIG_DIAG_CONFIG_CAL_MEM_CRC_EN_MSK NO_OS_BIT(3)
179 #define AD5758_DIG_DIAG_CONFIG_CAL_MEM_CRC_EN_MODE(x) (((x) & 0x1) << 3)
180 #define AD5758_DIG_DIAG_CONFIG_INV_DAC_CHECK_EN_MSK NO_OS_BIT(4)
181 #define AD5758_DIG_DIAG_CONFIG_INV_DAC_CHECK_EN_MODE(x) (((x) & 0x1) << 4)
182 #define AD5758_DIG_DIAG_CONFIG_DAC_LATCH_MON_EN_MSK NO_OS_BIT(6)
183 #define AD5758_DIG_DIAG_CONFIG_DAC_LATCH_MON_EN_MODE(x) (((x) & 0x1) << 6)
184 
185 /* AD5758_REG_ADC_CONFIG */
186 #define AD5758_ADC_CONFIG_ADC_IP_SELECT_MSK NO_OS_GENMASK(4, 0)
187 #define AD5758_ADC_CONFIG_ADC_IP_SELECT_MODE(x) (((x) & 0x1F) << 0)
188 #define AD5758_ADC_CONFIG_SEQUENCE_DATA_MSK NO_OS_GENMASK(7, 5)
189 #define AD5758_ADC_CONFIG_SEQUENCE_DATA_MODE(x) (((x) & 0x7) << 5)
190 #define AD5758_ADC_CONFIG_SEQUENCE_COMMAND_MSK NO_OS_GENMASK(10, 8)
191 #define AD5758_ADC_CONFIG_SEQUENCE_COMMAND_MODE(x) (((x) & 0x7) << 8)
192 #define AD5758_ADC_CONFIG_PPC_BUF_MSK NO_OS_BIT(11)
193 #define AD5758_ADC_CONFIG_PPC_BUF_EN(x) (((x) & 0x1) << 11)
194 
195 /* AD5758_REG_FAULT_PIN_CONFIG */
196 #define AD5758_FAULT_PIN_CONFIG_MAIN_DIE_TEMP_ERR_MSK NO_OS_BIT(0)
197 #define AD5758_FAULT_PIN_CONFIG_MAIN_DIE_TEMP_ERR_MODE(x) (((x) & 0x1) << 0)
198 #define AD5758_FAULT_PIN_CONFIG_DCDC_DIE_TEMP_ERR_MSK NO_OS_BIT(1)
199 #define AD5758_FAULT_PIN_CONFIG_DCDC_DIE_TEMP_ERR_MODE(x) (((x) & 0x1) << 1)
200 #define AD5758_FAULT_PIN_CONFIG_VOUT_SC_ERR_MSK NO_OS_BIT(2)
201 #define AD5758_FAULT_PIN_CONFIG_VOUT_SC_ERR_MODE(x) (((x) & 0x1) << 2)
202 #define AD5758_FAULT_PIN_CONFIG_IOUT_OC_ERR_MSK NO_OS_BIT(3)
203 #define AD5758_FAULT_PIN_CONFIG_IOUT_OC_ERR_MODE(x) (((x) & 0x1) << 3)
204 #define AD5758_FAULT_PIN_CONFIG_DCDC_P_SC_ERR_MSK NO_OS_BIT(4)
205 #define AD5758_FAULT_PIN_CONFIG_DCDC_P_SC_ERR_MODE(x) (((x) & 0x1) << 4)
206 #define AD5758_FAULT_PIN_CONFIG_SPI_CRC_ERR_MSK NO_OS_BIT(6)
207 #define AD5758_FAULT_PIN_CONFIG_SPI_CRC_ERR_MODE(x) (((x) & 0x1) << 6)
208 #define AD5758_FAULT_PIN_CONFIG_SLIPBIT_ERR_MSK NO_OS_BIT(7)
209 #define AD5758_FAULT_PIN_CONFIG_SLIPBIT_ERR_MODE(x) (((x) & 0x1) << 7)
210 #define AD5758_FAULT_PIN_CONFIG_WDT_ERR_MSK NO_OS_BIT(8)
211 #define AD5758_FAULT_PIN_CONFIG_WDT_ERR_MODE(x) (((x) & 0x1) << 8)
212 #define AD5758_FAULT_PIN_CONFIG_DAC_LATCH_MON_ERR_MSK NO_OS_BIT(9)
213 #define AD5758_FAULT_PIN_CONFIG_DAC_LATCH_MON_ERR_MODE(x) (((x) & 0x1) << 9)
214 #define AD5758_FAULT_PIN_CONFIG_OSC_STOP_DETECT_MSK NO_OS_BIT(10)
215 #define AD5758_FAULT_PIN_CONFIG_OSC_STOP_DETECT_MODE(x) (((x) & 0x1) << 10)
216 #define AD5758_FAULT_PIN_CONFIG_INV_DAC_CHECK_ERR_MSK NO_OS_BIT(12)
217 #define AD5758_FAULT_PIN_CONFIG_INV_DAC_CHECK_ERR_MODE(x) (((x) & 0x1) << 12)
218 #define AD5758_FAULT_PIN_CONFIG_PROT_SW_ERR_MSK NO_OS_BIT(14)
219 #define AD5758_FAULT_PIN_CONFIG_PROT_SW_ERR_MODE(x) (((x) & 0x1) << 14)
220 #define AD5758_FAULT_PIN_CONFIG_SPI_ACC_ERR_MSK NO_OS_BIT(15)
221 #define AD5758_FAULT_PIN_CONFIG_SPI_ACC_ERR_MODE(x) (((x) & 0x1) << 15)
222 
223 /* AD5758_REG_TWO_STAGE_READBACK_SELECT */
224 #define AD5758_TWO_STAGE_READBACK_SELECT_MSK NO_OS_GENMASK(4, 0)
225 #define AD5758_TWO_STAGE_READBACK_SELECT_MODE(x) (((x) & 0x1F) << 0)
226 #define AD5758_TWO_STAGE_READBACK_SELECT_MODE_MSK NO_OS_GENMASK(6, 5)
227 #define AD5758_TWO_STAGE_READBACK_SELECT_MODE_MODE(x) (((x) & 0x3) << 5)
228 
229 /* AD5758_REG_DIGITAL_DIAG_RESULTS */
230 #define AD5758_DIG_DIAG_RESULTS_SPI_CRC_ERR NO_OS_BIT(0)
231 #define AD5758_DIG_DIAG_RESULTS_SLIPBIT_ERR_MSK NO_OS_BIT(1)
232 #define AD5758_DIG_DIAG_RESULTS_SCLK_COUNT_ERR_MSK NO_OS_BIT(2)
233 #define AD5758_DIG_DIAG_RESULTS_INVALID_SPI_ACC_ERR_MSK NO_OS_BIT(4)
234 #define AD5758_DIG_DIAG_RESULTS_CAL_MEM_CRC_ERR_MSK NO_OS_BIT(5)
235 #define AD5758_DIG_DIAG_RESULTS_INV_DAC_CHECK_ERR_MSK NO_OS_BIT(6)
236 #define AD5758_DIG_DIAG_RESULTS_DAC_LATCH_MON_ERR_MSK NO_OS_BIT(8)
237 #define AD5758_DIG_DIAG_RESULTS_3WI_RC_ERR_MSK NO_OS_BIT(9)
238 #define AD5758_DIG_DIAG_RESULTS_WDT_ERR_MSK NO_OS_BIT(11)
239 #define AD5758_DIG_DIAG_RESULTS_ERR_3WI_MSK NO_OS_BIT(12)
240 #define AD5758_DIG_DIAG_RESULTS_RES_OCCURRED_MSK NO_OS_BIT(13)
241 #define AD5758_DIG_DIAG_RESULTS_SLEW_BUSY_MSK NO_OS_BIT(14)
242 #define AD5758_DIG_DIAG_RESULTS_CAL_MEM_UNREFRESHED_MSK NO_OS_BIT(15)
243 
244 /* AD5758_REG_ANALOG_DIAG_RESULTS */
245 #define AD5758_ANA_DIAG_RESULTS_REGOUT_ERR_MSK NO_OS_BIT(0)
246 #define AD5758_ANA_DIAG_RESULTS_INT_AVCC_ERR_MSK NO_OS_BIT(1)
247 #define AD5758_ANA_DIAG_RESULTS_REFIN_ERR_MSK NO_OS_BIT(2)
248 #define AD5758_ANA_DIAG_RESULTS_REFOUT_ERR_MSK NO_OS_BIT(3)
249 #define AD5758_ANA_DIAG_RESULTS_MAIN_DIE_TEMP_ERR_MSK NO_OS_BIT(4)
250 #define AD5758_ANA_DIAG_RESULTS_DCDC_DIE_TEMP_ERR_MSK NO_OS_BIT(5)
251 #define AD5758_ANA_DIAG_RESULTS_VOUT_SC_ERR_MSK NO_OS_BIT(6)
252 #define AD5758_ANA_DIAG_RESULTS_IOUT_OC_ERR_MSK NO_OS_BIT(7)
253 #define AD5758_ANA_DIAG_RESULTS_DCDC_P_PWR_ERR_MSK NO_OS_BIT(9)
254 #define AD5758_ANA_DIAG_RESULTS_DCDC_P_SC_ERR_MSK NO_OS_BIT(11)
255 #define AD5758_ANA_DIAG_RESULTS_FAULT_PROT_SW_ERR_MSK NO_OS_BIT(13)
256 
257 /* AD5758_REG_STATUS */
258 #define AD5758_STATUS_ADC_DATA_MSK NO_OS_GENMASK(11, 0)
259 #define AD5758_STATUS_ADC_CH_MSK NO_OS_GENMASK(16, 12)
260 #define AD5758_STATUS_ADC_BUSY_MSK NO_OS_BIT(17)
261 #define AD5758_STATUS_WDT_STATUS_MSK NO_OS_BIT(18)
262 #define AD5758_STATUS_ANA_DIAG_STATUS_MSK NO_OS_BIT(19)
263 #define AD5758_STATUS_DIG_DIAG_STATUS_MSK NO_OS_BIT(20)
264 
265 #define AD5758_REG_WRITE(x) ((0x80) | (x & 0x1F))
266 #define AD5758_CRC8_POLY 0x07 // x^8 + x^2 + x^1 + x^0
267 
268 /*****************************************************************************/
269 /*************************** Types Declarations *******************************/
270 /******************************************************************************/
276 };
277 
290 };
291 
295 };
296 
306 };
307 
325 };
326 
334 };
335 
347 };
348 
368 };
369 
375 };
376 
377 struct ad5758_dev {
378  /* SPI */
380  /* GPIO */
383  /* Device Settings */
384  uint8_t crc_en;
391 };
392 
394  /* SPI */
396  /* GPIO */
399  /* Device Settings */
400  uint8_t crc_en;
407 };
408 
409 /******************************************************************************/
410 /************************ Functions Declarations ******************************/
411 /******************************************************************************/
412 int32_t ad5758_set_crc(struct ad5758_dev *dev, uint8_t crc_en);
413 int32_t ad5758_wait_for_refresh_cycle(struct ad5758_dev *dev);
414 int32_t ad5758_soft_reset(struct ad5758_dev *dev);
415 int32_t ad5758_calib_mem_refresh(struct ad5758_dev *dev);
416 int32_t ad5758_set_dc_dc_conv_mode(struct ad5758_dev *dev,
417  enum ad5758_dc_dc_mode mode);
418 int32_t ad5758_set_dc_dc_ilimit(struct ad5758_dev *dev,
419  enum ad5758_dc_dc_ilimt ilimit);
420 int32_t ad5758_fault_prot_switch_en(struct ad5758_dev *dev, uint8_t enable);
421 int32_t ad5758_internal_buffers_en(struct ad5758_dev *dev, uint8_t enable);
422 int32_t ad5758_set_out_range(struct ad5758_dev *dev,
423  enum ad5758_output_range range);
424 int32_t ad5758_slew_rate_config(struct ad5758_dev *dev,
425  enum ad5758_slew_rate_clk clk,
426  uint8_t enable);
427 int32_t ad5758_dac_input_write(struct ad5758_dev *dev, uint16_t code);
428 int32_t ad5758_dac_output_en(struct ad5758_dev *dev, uint8_t enable);
429 int32_t ad5758_clear_dig_diag_flag(struct ad5758_dev *dev,
430  enum ad5758_dig_diag_flags flag);
431 int32_t ad5758_select_adc_ip(struct ad5758_dev *dev,
432  enum ad5758_adc_ip adc_ip_sel);
433 int32_t ad5758_set_clkout_config(struct ad5758_dev *dev,
434  enum ad5758_clkout_config config,
435  enum ad5758_clkout_freq freq);
436 int32_t ad5758_select_adc_depth(struct ad5758_dev *dev,
437  uint8_t num_of_channels);
438 int32_t ad5758_set_adc_channel_input(struct ad5758_dev *dev,
439  uint8_t channel,
440  enum ad5758_adc_ip adc_ip_sel);
441 int32_t ad5758_set_adc_mode(struct ad5758_dev *dev,
442  enum ad5758_adc_mode adc_mode,
443  uint8_t enable);
444 int32_t ad5758_init(struct ad5758_dev **device,
445  struct ad5758_init_param *init_param);
446 #endif /* AD5758_H_ */
ad5758_set_adc_channel_input
int32_t ad5758_set_adc_channel_input(struct ad5758_dev *dev, uint8_t channel, enum ad5758_adc_ip adc_ip_sel)
Definition: ad5758.c:710
RANGE_0mA_20mA
@ RANGE_0mA_20mA
Definition: ad5758.h:341
AD5758_DAC_CONFIG_OUT_EN_MODE
#define AD5758_DAC_CONFIG_OUT_EN_MODE(x)
Definition: ad5758.h:93
AD5758_ADC_CONFIG_SEQUENCE_COMMAND_MODE
#define AD5758_ADC_CONFIG_SEQUENCE_COMMAND_MODE(x)
Definition: ad5758.h:191
ad5758_set_adc_mode
int32_t ad5758_set_adc_mode(struct ad5758_dev *dev, enum ad5758_adc_mode adc_mode, uint8_t enable)
Definition: ad5758.c:744
ad5758_dc_dc_ilimt
ad5758_dc_dc_ilimt
Definition: ad5758.h:327
DIAG_SCLK_COUNT_ERR
@ DIAG_SCLK_COUNT_ERR
Definition: ad5758.h:281
ADC_IP_MAIN_DIE_TEMP
@ ADC_IP_MAIN_DIE_TEMP
Definition: ad5758.h:350
ad5758_calib_mem_refresh
int32_t ad5758_calib_mem_refresh(struct ad5758_dev *dev)
Definition: ad5758.c:264
CLKOUT_FREQ_555_KHZ
@ CLKOUT_FREQ_555_KHZ
Definition: ad5758.h:304
AD5758_REG_NOP
#define AD5758_REG_NOP
Definition: ad5758.h:57
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
ad5758_clkout_config
ad5758_clkout_config
Definition: ad5758.h:292
ad5758_dev::output_range
enum ad5758_output_range output_range
Definition: ad5758.h:389
AD5758_REG_ADC_CONFIG
#define AD5758_REG_ADC_CONFIG
Definition: ad5758.h:72
ad5758_init_param::output_range
enum ad5758_output_range output_range
Definition: ad5758.h:405
ad5758_select_adc_depth
int32_t ad5758_select_adc_depth(struct ad5758_dev *dev, uint8_t num_of_channels)
Definition: ad5758.c:661
AD5758_ADC_CONFIG_ADC_IP_SELECT_MODE
#define AD5758_ADC_CONFIG_ADC_IP_SELECT_MODE(x)
Definition: ad5758.h:187
ADC_IP_DCDC_DIE_NODE
@ ADC_IP_DCDC_DIE_NODE
Definition: ad5758.h:366
DIAG_INVALID_SPI_ACCESS_ERR
@ DIAG_INVALID_SPI_ACCESS_ERR
Definition: ad5758.h:282
AD5758_ADC_CONFIG_ADC_IP_SELECT_MSK
#define AD5758_ADC_CONFIG_ADC_IP_SELECT_MSK
Definition: ad5758.h:186
ADC_IP_REFOUT
@ ADC_IP_REFOUT
Definition: ad5758.h:367
AD5758_REG_DIGITAL_DIAG_CONFIG
#define AD5758_REG_DIGITAL_DIAG_CONFIG
Definition: ad5758.h:71
ad5758_output_range
ad5758_output_range
Definition: ad5758.h:336
RANGE_M24mA_24mA
@ RANGE_M24mA_24mA
Definition: ad5758.h:345
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:83
ad5758_init_param::slew_rate_clk
enum ad5758_slew_rate_clk slew_rate_clk
Definition: ad5758.h:406
ad5758_select_adc_depth
int32_t ad5758_select_adc_depth(struct ad5758_dev *dev, uint8_t num_of_channels)
Definition: ad5758.c:661
ADC_IP_VSENSE
@ ADC_IP_VSENSE
Definition: ad5758.h:354
no_os_spi.h
Header file of SPI Interface.
ADC_IP_DCDC_DIE_TEMP
@ ADC_IP_DCDC_DIE_TEMP
Definition: ad5758.h:351
ad5758_dc_dc_mode
ad5758_dc_dc_mode
Definition: ad5758.h:271
SR_CLOCK_128_KHZ
@ SR_CLOCK_128_KHZ
Definition: ad5758.h:312
ad5758_dac_input_write
int32_t ad5758_dac_input_write(struct ad5758_dev *dev, uint16_t code)
Definition: ad5758.c:492
AD5758_DAC_CONFIG_INT_EN_MODE
#define AD5758_DAC_CONFIG_INT_EN_MODE(x)
Definition: ad5758.h:91
ADC_IP_AGND
@ ADC_IP_AGND
Definition: ad5758.h:361
ad5758_dev::ldac_n
struct no_os_gpio_desc * ldac_n
Definition: ad5758.h:382
ad5758_init
int32_t ad5758_init(struct ad5758_dev **device, struct ad5758_init_param *init_param)
Definition: ad5758.c:772
pr_err
#define pr_err(fmt, args...)
Definition: no_os_print_log.h:80
AD5758_DCDC_CONFIG2_ILIMIT_MSK
#define AD5758_DCDC_CONFIG2_ILIMIT_MSK
Definition: ad5758.h:148
no_os_delay.h
Header file of Delay functions.
RANGE_0V_5V
@ RANGE_0V_5V
Definition: ad5758.h:337
AD5758_DAC_CONFIG_OUT_EN_MSK
#define AD5758_DAC_CONFIG_OUT_EN_MSK
Definition: ad5758.h:92
pr_info
#define pr_info(fmt, args...)
Definition: no_os_print_log.h:99
ADC_IP_INT_AVCC
@ ADC_IP_INT_AVCC
Definition: ad5758.h:356
AD5758_REG_DCDC_CONFIG2
#define AD5758_REG_DCDC_CONFIG2
Definition: ad5758.h:69
ADC_IP_REFGND
@ ADC_IP_REFGND
Definition: ad5758.h:360
AD5758_DCDC_CONFIG2_BUSY_3WI_MSK
#define AD5758_DCDC_CONFIG2_BUSY_3WI_MSK
Definition: ad5758.h:159
CLKOUT_FREQ_435_KHZ
@ CLKOUT_FREQ_435_KHZ
Definition: ad5758.h:299
CLKOUT_ENABLE
@ CLKOUT_ENABLE
Definition: ad5758.h:294
ad5758_set_crc
int32_t ad5758_set_crc(struct ad5758_dev *dev, uint8_t crc_en)
Definition: ad5758.c:194
ILIMIT_400_mA
@ ILIMIT_400_mA
Definition: ad5758.h:333
device
Definition: ad9361_util.h:75
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
no_os_print_log.h
Print messages helpers.
CLKOUT_FREQ_588_KHZ
@ CLKOUT_FREQ_588_KHZ
Definition: ad5758.h:305
SR_CLOCK_8_KHZ
@ SR_CLOCK_8_KHZ
Definition: ad5758.h:316
AD5758_REG_DAC_INPUT
#define AD5758_REG_DAC_INPUT
Definition: ad5758.h:58
RANGE_0V_10V
@ RANGE_0V_10V
Definition: ad5758.h:338
AD5758_REG_TWO_STAGE_READBACK_SELECT
#define AD5758_REG_TWO_STAGE_READBACK_SELECT
Definition: ad5758.h:74
ad5758_dac_input_write
int32_t ad5758_dac_input_write(struct ad5758_dev *dev, uint16_t code)
Definition: ad5758.c:492
AD5758_ADC_CONFIG_PPC_BUF_EN
#define AD5758_ADC_CONFIG_PPC_BUF_EN(x)
Definition: ad5758.h:193
ADC_MODE_SINGLE_KEY_CONV
@ ADC_MODE_SINGLE_KEY_CONV
Definition: ad5758.h:374
ad5758_set_dc_dc_ilimit
int32_t ad5758_set_dc_dc_ilimit(struct ad5758_dev *dev, enum ad5758_dc_dc_ilimt ilimit)
Definition: ad5758.c:341
AD5758_GP_CONFIG1_CLKOUT_CONFIG_MODE
#define AD5758_GP_CONFIG1_CLKOUT_CONFIG_MODE(x)
Definition: ad5758.h:127
ad5758_set_clkout_config
int32_t ad5758_set_clkout_config(struct ad5758_dev *dev, enum ad5758_clkout_config config, enum ad5758_clkout_freq freq)
Definition: ad5758.c:585
ad5758_dev::dc_dc_mode
enum ad5758_dc_dc_mode dc_dc_mode
Definition: ad5758.h:385
SR_CLOCK_512_HZ
@ SR_CLOCK_512_HZ
Definition: ad5758.h:320
AD5758_REG_DCDC_CONFIG1
#define AD5758_REG_DCDC_CONFIG1
Definition: ad5758.h:68
DPC_CURRENT_MODE
@ DPC_CURRENT_MODE
Definition: ad5758.h:273
NO_OS_GPIO_LOW
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
ADC_IP_AVDD2
@ ADC_IP_AVDD2
Definition: ad5758.h:364
AD5758_REG_DAC_CONFIG
#define AD5758_REG_DAC_CONFIG
Definition: ad5758.h:63
ad5758.h
Header file for ad5758 Driver.
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
ad5758_set_clkout_config
int32_t ad5758_set_clkout_config(struct ad5758_dev *dev, enum ad5758_clkout_config config, enum ad5758_clkout_freq freq)
Definition: ad5758.c:585
ad5758_set_crc
int32_t ad5758_set_crc(struct ad5758_dev *dev, uint8_t crc_en)
Definition: ad5758.c:194
DIAG_RESET_OCCURRED
@ DIAG_RESET_OCCURRED
Definition: ad5758.h:289
ad5758_dev::clkout_config
enum ad5758_clkout_config clkout_config
Definition: ad5758.h:386
no_os_error.h
Error codes definition.
RANGE_M20mA_20mA
@ RANGE_M20mA_20mA
Definition: ad5758.h:344
DPC_VOLTAGE_MODE
@ DPC_VOLTAGE_MODE
Definition: ad5758.h:274
ad5758_dac_output_en
int32_t ad5758_dac_output_en(struct ad5758_dev *dev, uint8_t enable)
Definition: ad5758.c:514
ad5758_init_param::dc_dc_mode
enum ad5758_dc_dc_mode dc_dc_mode
Definition: ad5758.h:401
SR_CLOCK_2_KHZ
@ SR_CLOCK_2_KHZ
Definition: ad5758.h:318
ad5758_calib_mem_refresh
int32_t ad5758_calib_mem_refresh(struct ad5758_dev *dev)
Definition: ad5758.c:264
SR_CLOCK_256_HZ
@ SR_CLOCK_256_HZ
Definition: ad5758.h:321
ad5758_slew_rate_clk
ad5758_slew_rate_clk
Definition: ad5758.h:308
DIAG_THREE_WI_RC_ERR
@ DIAG_THREE_WI_RC_ERR
Definition: ad5758.h:286
ad5758_set_dc_dc_conv_mode
int32_t ad5758_set_dc_dc_conv_mode(struct ad5758_dev *dev, enum ad5758_dc_dc_mode mode)
Definition: ad5758.c:289
ad5758_spi_reg_write
int32_t ad5758_spi_reg_write(struct ad5758_dev *dev, uint8_t reg_addr, uint16_t reg_data)
Definition: ad5758.c:146
ILIMIT_300_mA
@ ILIMIT_300_mA
Definition: ad5758.h:331
ad5758_init_param::dc_dc_ilimit
enum ad5758_dc_dc_ilimt dc_dc_ilimit
Definition: ad5758.h:404
RANGE_4mA_24mA
@ RANGE_4mA_24mA
Definition: ad5758.h:343
ad5758_spi_reg_read
int32_t ad5758_spi_reg_read(struct ad5758_dev *dev, uint8_t reg_addr, uint16_t *reg_data)
Definition: ad5758.c:90
AD5758_DCDC_CONFIG1_DCDC_MODE_MSK
#define AD5758_DCDC_CONFIG1_DCDC_MODE_MSK
Definition: ad5758.h:144
AD5758_DCDC_CONFIG1_DCDC_MODE_MODE
#define AD5758_DCDC_CONFIG1_DCDC_MODE_MODE(x)
Definition: ad5758.h:145
ILIMIT_350_mA
@ ILIMIT_350_mA
Definition: ad5758.h:332
ad5758_soft_reset
int32_t ad5758_soft_reset(struct ad5758_dev *dev)
Definition: ad5758.c:236
ad5758_dig_diag_flags
ad5758_dig_diag_flags
Definition: ad5758.h:278
ad5758_dev::crc_en
uint8_t crc_en
Definition: ad5758.h:384
ADC_IP_MVSENSE
@ ADC_IP_MVSENSE
Definition: ad5758.h:355
ILIMIT_250_mA
@ ILIMIT_250_mA
Definition: ad5758.h:330
AD5758_REG_KEY
#define AD5758_REG_KEY
Definition: ad5758.h:65
ad5758_set_out_range
int32_t ad5758_set_out_range(struct ad5758_dev *dev, enum ad5758_output_range range)
Definition: ad5758.c:408
CLKOUT_DISABLE
@ CLKOUT_DISABLE
Definition: ad5758.h:293
ADC_IP_REF2
@ ADC_IP_REF2
Definition: ad5758.h:353
AD5758_DAC_CONFIG_SR_EN_MODE
#define AD5758_DAC_CONFIG_SR_EN_MODE(x)
Definition: ad5758.h:97
AD5758_DAC_CONFIG_INT_EN_MSK
#define AD5758_DAC_CONFIG_INT_EN_MSK
Definition: ad5758.h:90
ad5758_dac_output_en
int32_t ad5758_dac_output_en(struct ad5758_dev *dev, uint8_t enable)
Definition: ad5758.c:514
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:143
ADC_IP_INT_CURR_MON_VOUT
@ ADC_IP_INT_CURR_MON_VOUT
Definition: ad5758.h:359
AD5758_GP_CONFIG1_CLKOUT_FREQ_MODE
#define AD5758_GP_CONFIG1_CLKOUT_FREQ_MODE(x)
Definition: ad5758.h:125
SR_CLOCK_200_KHZ
@ SR_CLOCK_200_KHZ
Definition: ad5758.h:310
AD5758_DAC_CONFIG_SR_CLOCK_MODE
#define AD5758_DAC_CONFIG_SR_CLOCK_MODE(x)
Definition: ad5758.h:99
AD5758_DAC_CONFIG_SR_CLOCK_MSK
#define AD5758_DAC_CONFIG_SR_CLOCK_MSK
Definition: ad5758.h:98
SR_CLOCK_128_HZ
@ SR_CLOCK_128_HZ
Definition: ad5758.h:322
ad5758_dev::slew_rate_clk
enum ad5758_slew_rate_clk slew_rate_clk
Definition: ad5758.h:390
ad5758_init
int32_t ad5758_init(struct ad5758_dev **device, struct ad5758_init_param *init_param)
Definition: ad5758.c:772
RANGE_0mA_24mA
@ RANGE_0mA_24mA
Definition: ad5758.h:342
ad5758_slew_rate_config
int32_t ad5758_slew_rate_config(struct ad5758_dev *dev, enum ad5758_slew_rate_clk clk, uint8_t enable)
Definition: ad5758.c:456
RANGE_M10V_10V
@ RANGE_M10V_10V
Definition: ad5758.h:340
AD5758_CRC8_POLY
#define AD5758_CRC8_POLY
Definition: ad5758.h:266
ad5758_set_adc_channel_input
int32_t ad5758_set_adc_channel_input(struct ad5758_dev *dev, uint8_t channel, enum ad5758_adc_ip adc_ip_sel)
Definition: ad5758.c:710
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
ad5758_set_adc_mode
int32_t ad5758_set_adc_mode(struct ad5758_dev *dev, enum ad5758_adc_mode adc_mode, uint8_t enable)
Definition: ad5758.c:744
SR_CLOCK_64_HZ
@ SR_CLOCK_64_HZ
Definition: ad5758.h:323
PPC_CURRENT_MODE
@ PPC_CURRENT_MODE
Definition: ad5758.h:275
RANGE_M5V_5V
@ RANGE_M5V_5V
Definition: ad5758.h:339
CLKOUT_FREQ_526_KHZ
@ CLKOUT_FREQ_526_KHZ
Definition: ad5758.h:303
SR_CLOCK_1_KHZ
@ SR_CLOCK_1_KHZ
Definition: ad5758.h:319
ad5758_internal_buffers_en
int32_t ad5758_internal_buffers_en(struct ad5758_dev *dev, uint8_t enable)
Definition: ad5758.c:376
ad5758_init_param::reset_n
struct no_os_gpio_init_param reset_n
Definition: ad5758.h:397
ad5758_adc_mode
ad5758_adc_mode
Definition: ad5758.h:370
CLKOUT_FREQ_500_KHZ
@ CLKOUT_FREQ_500_KHZ
Definition: ad5758.h:302
DIAG_ERR_3WI
@ DIAG_ERR_3WI
Definition: ad5758.h:288
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
SR_CLOCK_16_KHZ
@ SR_CLOCK_16_KHZ
Definition: ad5758.h:315
AD5758_REG_DIGITAL_DIAG_RESULTS
#define AD5758_REG_DIGITAL_DIAG_RESULTS
Definition: ad5758.h:75
ad5758_dev::clkout_freq
enum ad5758_clkout_freq clkout_freq
Definition: ad5758.h:387
ad5758_init_param::spi_init
struct no_os_spi_init_param spi_init
Definition: ad5758.h:395
DIAG_WDT_ERR
@ DIAG_WDT_ERR
Definition: ad5758.h:287
SR_CLOCK_4_KHZ
@ SR_CLOCK_4_KHZ
Definition: ad5758.h:317
AD5758_ADC_CONFIG_SEQUENCE_DATA_MODE
#define AD5758_ADC_CONFIG_SEQUENCE_DATA_MODE(x)
Definition: ad5758.h:189
ADC_IP_REFIN
@ ADC_IP_REFIN
Definition: ad5758.h:352
AD5758_DIG_DIAG_RESULTS_CAL_MEM_UNREFRESHED_MSK
#define AD5758_DIG_DIAG_RESULTS_CAL_MEM_UNREFRESHED_MSK
Definition: ad5758.h:242
ad5758_dev::dc_dc_ilimit
enum ad5758_dc_dc_ilimt dc_dc_ilimit
Definition: ad5758.h:388
ad5758_set_dc_dc_conv_mode
int32_t ad5758_set_dc_dc_conv_mode(struct ad5758_dev *dev, enum ad5758_dc_dc_mode mode)
Definition: ad5758.c:289
SR_CLOCK_64_KHZ
@ SR_CLOCK_64_KHZ
Definition: ad5758.h:313
AD5758_DIG_DIAG_CONFIG_SPI_CRC_EN_MODE
#define AD5758_DIG_DIAG_CONFIG_SPI_CRC_EN_MODE(x)
Definition: ad5758.h:175
CLKOUT_FREQ_454_KHZ
@ CLKOUT_FREQ_454_KHZ
Definition: ad5758.h:300
ad5758_clear_dig_diag_flag
int32_t ad5758_clear_dig_diag_flag(struct ad5758_dev *dev, enum ad5758_dig_diag_flags flag)
Definition: ad5758.c:548
NO_OS_BIT
#define NO_OS_BIT(x)
Definition: no_os_util.h:51
ILIMIT_150_mA
@ ILIMIT_150_mA
Definition: ad5758.h:328
ad5758_adc_ip
ad5758_adc_ip
Definition: ad5758.h:349
ad5758_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: ad5758.h:379
AD5758_KEY_CODE_RESET_2
#define AD5758_KEY_CODE_RESET_2
Definition: ad5758.h:108
AD5758_REG_WRITE
#define AD5758_REG_WRITE(x)
Definition: ad5758.h:265
ILIMIT_200_mA
@ ILIMIT_200_mA
Definition: ad5758.h:329
ad5758_wait_for_refresh_cycle
int32_t ad5758_wait_for_refresh_cycle(struct ad5758_dev *dev)
Definition: ad5758.c:216
ad5758_init_param::clkout_config
enum ad5758_clkout_config clkout_config
Definition: ad5758.h:402
no_os_udelay
void no_os_udelay(uint32_t usecs)
Wait until usecs microseconds passed.
Definition: aducm3029_delay.c:120
ad5758_set_out_range
int32_t ad5758_set_out_range(struct ad5758_dev *dev, enum ad5758_output_range range)
Definition: ad5758.c:408
ad5758_init_param
Definition: ad5758.h:393
ad5758_internal_buffers_en
int32_t ad5758_internal_buffers_en(struct ad5758_dev *dev, uint8_t enable)
Definition: ad5758.c:376
RANGE_M1mA_22mA
@ RANGE_M1mA_22mA
Definition: ad5758.h:346
AD5758_ADC_CONFIG_PPC_BUF_MSK
#define AD5758_ADC_CONFIG_PPC_BUF_MSK
Definition: ad5758.h:192
ad5758_init_param::clkout_freq
enum ad5758_clkout_freq clkout_freq
Definition: ad5758.h:403
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ad5758_wait_for_refresh_cycle
int32_t ad5758_wait_for_refresh_cycle(struct ad5758_dev *dev)
Definition: ad5758.c:216
ad5758_select_adc_ip
int32_t ad5758_select_adc_ip(struct ad5758_dev *dev, enum ad5758_adc_ip adc_ip_sel)
Definition: ad5758.c:637
DC_DC_POWER_OFF
@ DC_DC_POWER_OFF
Definition: ad5758.h:272
AD5758_DAC_CONFIG_RANGE_MODE
#define AD5758_DAC_CONFIG_RANGE_MODE(x)
Definition: ad5758.h:87
ADC_MODE_AUTO_SEQ
@ ADC_MODE_AUTO_SEQ
Definition: ad5758.h:372
AD5758_GP_CONFIG1_CLKOUT_CONFIG_MSK
#define AD5758_GP_CONFIG1_CLKOUT_CONFIG_MSK
Definition: ad5758.h:126
ad5758_dev
Definition: ad5758.h:377
SR_CLOCK_150_KHZ
@ SR_CLOCK_150_KHZ
Definition: ad5758.h:311
ADC_IP_VLOGIC
@ ADC_IP_VLOGIC
Definition: ad5758.h:358
DIAG_SPI_CRC_ERR
@ DIAG_SPI_CRC_ERR
Definition: ad5758.h:279
DIAG_SLIPBIT_ERR
@ DIAG_SLIPBIT_ERR
Definition: ad5758.h:280
ad5758_fault_prot_switch_en
int32_t ad5758_fault_prot_switch_en(struct ad5758_dev *dev, uint8_t enable)
AD5758_GP_CONFIG1_CLKOUT_FREQ_MSK
#define AD5758_GP_CONFIG1_CLKOUT_FREQ_MSK
Definition: ad5758.h:124
AD5758_DCDC_CONFIG2_ILIMIT_MODE
#define AD5758_DCDC_CONFIG2_ILIMIT_MODE(x)
Definition: ad5758.h:149
AD5758_DIG_DIAG_CONFIG_SPI_CRC_EN_MSK
#define AD5758_DIG_DIAG_CONFIG_SPI_CRC_EN_MSK
Definition: ad5758.h:174
DIAG_DAC_LATCH_MON_ERR
@ DIAG_DAC_LATCH_MON_ERR
Definition: ad5758.h:285
no_os_gpio.h
Header file of GPIO Interface.
SR_CLOCK_240_KHZ
@ SR_CLOCK_240_KHZ
Definition: ad5758.h:309
ADC_MODE_KEY_SEQ
@ ADC_MODE_KEY_SEQ
Definition: ad5758.h:371
ADC_IP_AVSS
@ ADC_IP_AVSS
Definition: ad5758.h:365
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
CLKOUT_FREQ_416_KHZ
@ CLKOUT_FREQ_416_KHZ
Definition: ad5758.h:298
SR_CLOCK_32_KHZ
@ SR_CLOCK_32_KHZ
Definition: ad5758.h:314
AD5758_REG_GP_CONFIG1
#define AD5758_REG_GP_CONFIG1
Definition: ad5758.h:66
ad5758_set_dc_dc_ilimit
int32_t ad5758_set_dc_dc_ilimit(struct ad5758_dev *dev, enum ad5758_dc_dc_ilimt ilimit)
Definition: ad5758.c:341
ad5758_soft_reset
int32_t ad5758_soft_reset(struct ad5758_dev *dev)
Definition: ad5758.c:236
ad5758_dev::reset_n
struct no_os_gpio_desc * reset_n
Definition: ad5758.h:381
DIAG_INVERSE_DAC_CHECK_ERR
@ DIAG_INVERSE_DAC_CHECK_ERR
Definition: ad5758.h:284
SR_CLOCK_16_HZ
@ SR_CLOCK_16_HZ
Definition: ad5758.h:324
ad5758_init_param::ldac_n
struct no_os_gpio_init_param ldac_n
Definition: ad5758.h:398
ad5758_clear_dig_diag_flag
int32_t ad5758_clear_dig_diag_flag(struct ad5758_dev *dev, enum ad5758_dig_diag_flags flag)
Definition: ad5758.c:548
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
ADC_IP_DGND
@ ADC_IP_DGND
Definition: ad5758.h:362
AD5758_DAC_CONFIG_SR_EN_MSK
#define AD5758_DAC_CONFIG_SR_EN_MSK
Definition: ad5758.h:96
ADC_MODE_SINGLE_CONV
@ ADC_MODE_SINGLE_CONV
Definition: ad5758.h:373
ad5758_init_param::crc_en
uint8_t crc_en
Definition: ad5758.h:400
AD5758_DAC_CONFIG_RANGE_MSK
#define AD5758_DAC_CONFIG_RANGE_MSK
Definition: ad5758.h:86
ADC_IP_VDPC
@ ADC_IP_VDPC
Definition: ad5758.h:363
DIAG_CAL_MEM_CRC_ERR
@ DIAG_CAL_MEM_CRC_ERR
Definition: ad5758.h:283
AD5758_KEY_CODE_CALIB_MEM_REFRESH
#define AD5758_KEY_CODE_CALIB_MEM_REFRESH
Definition: ad5758.h:111
ad5758_clkout_freq
ad5758_clkout_freq
Definition: ad5758.h:297
AD5758_KEY_CODE_RESET_1
#define AD5758_KEY_CODE_RESET_1
Definition: ad5758.h:107
ADC_IP_REGOUT
@ ADC_IP_REGOUT
Definition: ad5758.h:357
CLKOUT_FREQ_476_KHZ
@ CLKOUT_FREQ_476_KHZ
Definition: ad5758.h:301
ad5758_slew_rate_config
int32_t ad5758_slew_rate_config(struct ad5758_dev *dev, enum ad5758_slew_rate_clk clk, uint8_t enable)
Definition: ad5758.c:456
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:121
ad5758_select_adc_ip
int32_t ad5758_select_adc_ip(struct ad5758_dev *dev, enum ad5758_adc_ip adc_ip_sel)
Definition: ad5758.c:637