no-OS
ad6673.h
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1 /***************************************************************************/
39 #ifndef __AD6673_H__
40 #define __AD6673_H__
41 
42 /******************************************************************************/
43 /***************************** Include Files **********************************/
44 /******************************************************************************/
45 #include <stdint.h>
46 #include "no_os_spi.h"
47 #include "no_os_error.h"
48 
49 /******************************************************************************/
50 /*********************************** AD6673 ***********************************/
51 /******************************************************************************/
52 
53 /* Registers */
54 
55 #define AD6673_READ (1 << 15)
56 #define AD6673_WRITE (0 << 15)
57 #define AD6673_CNT(x) ((((x) & 0x3) - 1) << 13)
58 #define AD6673_ADDR(x) ((x) & 0xFF)
59 
60 #define AD6673_R1B (1 << 8)
61 #define AD6673_R2B (2 << 8)
62 #define AD6673_R3B (3 << 8)
63 #define AD6673_TRANSF_LEN(x) (((x) >> 8) & 0xFF)
64 #define SHADOW(x) ((x) << 16)
65 
66 /* Chip configuration registers */
67 #define AD6673_REG_SPI_CFG (AD6673_R1B | 0x00)
68 #define AD6673_REG_CHIP_ID (AD6673_R1B | 0x01)
69 #define AD6673_REG_CHIP_INFO (AD6673_R1B | 0x02)
70 
71 /* Channel index and transfer registers */
72 #define AD6673_REG_CH_INDEX (AD6673_R1B | 0x05)
73 #define AD6673_REG_DEVICE_UPDATE (AD6673_R1B | 0xFF)
74 
75 /* Program register map */
76 #define AD6673_REG_PDWN (AD6673_R1B | 0x08)
77 #define AD6673_REG_CLOCK (AD6673_R1B | 0x09 | SHADOW(1))
78 #define AD6673_REG_PLL_STAT (AD6673_R1B | 0x0A)
79 #define AD6673_REG_CLOCK_DIV (AD6673_R1B | 0x0B | SHADOW(2))
80 #define AD6673_REG_TEST (AD6673_R1B | 0x0D | SHADOW(3))
81 #define AD6673_REG_BIST (AD6673_R1B | 0x0E | SHADOW(4))
82 #define AD6673_REG_OFFSET (AD6673_R1B | 0x10 | SHADOW(5))
83 #define AD6673_REG_OUT_MODE (AD6673_R1B | 0x14 | SHADOW(6))
84 #define AD6673_REG_CML (AD6673_R1B | 0x15)
85 #define AD6673_REG_VREF (AD6673_R1B | 0x18 | SHADOW(7))
86 #define AD6673_REG_USER_TEST1 (AD6673_R2B | 0x1A)
87 #define AD6673_REG_USER_TEST2 (AD6673_R2B | 0x1C)
88 #define AD6673_REG_USER_TEST3 (AD6673_R2B | 0x1E)
89 #define AD6673_REG_USER_TEST4 (AD6673_R2B | 0x20)
90 #define AD6673_REG_PLL_ENCODE (AD6673_R1B | 0x21)
91 #define AD6673_REG_BIST_MISR (AD6673_R2B | 0x25)
92 #define AD6673_REG_SYS_CTRL (AD6673_R1B | 0x3A | SHADOW(8))
93 #define AD6673_REG_NSR_CTRL (AD6673_R1B | 0x3C | SHADOW(9))
94 #define AD6673_REG_NSR_TUNING (AD6673_R1B | 0x3E | SHADOW(10))
95 #define AD6673_REG_DCC_CTRL (AD6673_R1B | 0x40 | SHADOW(11))
96 #define AD6673_REG_DCC_VAL (AD6673_R2B | 0x42 | SHADOW(12))
97 #define AD6673_REG_FAST_DETECT (AD6673_R1B | 0x45 | SHADOW(13))
98 #define AD6673_REG_FD_UPPER_THD (AD6673_R2B | 0x48 | SHADOW(14))
99 #define AD6673_REG_FD_LOWER_THD (AD6673_R2B | 0x4A | SHADOW(15))
100 #define AD6673_REG_FD_DWELL_TIME (AD6673_R2B | 0x4C | SHADOW(16))
101 #define AD6673_REG_204B_QUICK_CFG (AD6673_R1B | 0x5E)
102 #define AD6673_REG_204B_CTRL1 (AD6673_R1B | 0x5F)
103 #define AD6673_REG_204B_CTRL2 (AD6673_R1B | 0x60)
104 #define AD6673_REG_204B_CTRL3 (AD6673_R1B | 0x61)
105 #define AD6673_REG_204B_DID_CFG (AD6673_R1B | 0x64)
106 #define AD6673_REG_204B_BID_CFG (AD6673_R1B | 0x65)
107 #define AD6673_REG_204B_LID_CFG1 (AD6673_R1B | 0x67)
108 #define AD6673_REG_204B_LID_CFG2 (AD6673_R1B | 0x68)
109 #define AD6673_REG_204B_PARAM_SCR_L (AD6673_R1B | 0x6E)
110 #define AD6673_REG_204B_PARAM_F (AD6673_R1B | 0x6F)
111 #define AD6673_REG_204B_PARAM_K (AD6673_R1B | 0x70)
112 #define AD6673_REG_204B_PARAM_M (AD6673_R1B | 0x71)
113 #define AD6673_REG_204B_PARAM_CS_N (AD6673_R1B | 0x72)
114 #define AD6673_REG_204B_PARAM_NP (AD6673_R1B | 0x73)
115 #define AD6673_REG_204B_PARAM_S (AD6673_R1B | 0x74)
116 #define AD6673_REG_204B_PARAM_HD_CF (AD6673_R1B | 0x75)
117 #define AD6673_REG_204B_RESV1 (AD6673_R1B | 0x76)
118 #define AD6673_REG_204B_RESV2 (AD6673_R1B | 0x77)
119 #define AD6673_REG_204B_CHKSUM0 (AD6673_R1B | 0x79)
120 #define AD6673_REG_204B_CHKSUM1 (AD6673_R1B | 0x7A)
121 #define AD6673_REG_204B_LANE_ASSGN1 (AD6673_R1B | 0x82)
122 #define AD6673_REG_204B_LANE_ASSGN2 (AD6673_R1B | 0x83)
123 #define AD6673_REG_204B_LMFC_OFFSET (AD6673_R1B | 0x8B)
124 #define AD6673_REG_204B_PRE_EMPHASIS (AD6673_R1B | 0xA8)
125 
126 /* AD6673_REG_SPI_CFG */
127 #define AD6673_SPI_CFG_LSB_FIRST ((1 << 6) | (1 << 1))
128 #define AD6673_SPI_CFG_SOFT_RST ((1 << 5) | (1 << 2))
129 
130 /* AD6673_REG_CH_INDEX */
131 #define AD6673_CH_INDEX_ADC_A (1 << 0)
132 #define AD6673_CH_INDEX_ADC_B (1 << 1)
133 
134 /* AD6673_REG_DEVICE_UPDATE */
135 #define AD6673_DEVICE_UPDATE_SW (1 << 0)
136 
137 /* AD6673_REG_PDWN */
138 #define AD6673_PDWN_EXTERN (1 << 5)
139 #define AD6673_PDWN_JTX (1 << 4)
140 #define AD6673_PDWN_JESD204B(x) (((x) & 0x3) << 2)
141 #define AD6673_PDWN_CHIP(x) (((x) & 0x3) << 0)
142 
143 /* AD6673_REG_CLOCK */
144 #define AD6673_CLOCK_SELECTION(x) (((x) & 0x3) << 4)
145 #define AD6673_CLOCK_DUTY_CYCLE (1 << 0)
146 
147 /* AD6673_REG_PLL_STAT */
148 #define AD6673_PLL_STAT_LOCKED (1 << 7)
149 #define AD6673_PLL_STAT_204B_LINK_RDY (1 << 0)
150 
151 /* AD6673_REG_CLOCK_DIV */
152 #define AD6673_CLOCK_DIV_PHASE(x) (((x) & 0x7) << 3)
153 #define AD6673_CLOCK_DIV_RATIO(x) (((x) & 0x7) << 0)
154 
155 /* AD6673_REG_TEST */
156 #define AD6673_TEST_USER_TEST_MODE(x) (((x) & 0x3) << 6)
157 #define AD6673_TEST_RST_PN_LONG (1 << 5)
158 #define AD6673_TEST_RST_PN_SHOR (1 << 4)
159 #define AD6673_TEST_OUTPUT_TEST(x) (((x) & 0xF) << 0)
160 
161 /* AD6673_REG_BIST */
162 #define AD6673_BIST_RESET (1 << 2)
163 #define AD6673_BIST_ENABLE (1 << 0)
164 
165 /* AD6673_REG_OFFSET */
166 #define AD6673_REG_OFFSET_ADJUST(x) (((x) & 0x3F) << 0)
167 
168 /* AD6673_REG_OUT_MODE */
169 #define AD6673_OUT_MODE_JTX_BIT_ASSIGN(x) (((x) & 0x7) << 5)
170 #define AD6673_OUT_MODE_DISABLE (1 << 4)
171 #define AD6673_OUT_MODE_INVERT_DATA (1 << 3)
172 #define AD6673_OUT_MODE_DATA_FORMAT(x) (((x) & 0x1) << 0)
173 
174 /* AD6673_REG_CML */
175 #define AD6673_CML_DIFF_OUT_LEVEL(x) (((x) & 0x7) << 0)
176 
177 /* AD6673_REG_VREF */
178 #define AD6673_VREF_FS_ADJUST(x) (((x) & 0x1F) << 0)
179 
180 /* AD6673_REG_PLL_ENCODE */
181 #define AD6673_PLL_ENCODE(x) (((x) & 0x3) << 3)
182 
183 /* AD6673_REG_SYS_CTRL */
184 #define AD6673_SYS_CTRL_REALIGN_ON_SYNCINB (1 << 4)
185 #define AD6673_SYS_CTRL_REALIGN_ON_SYSREF (1 << 3)
186 #define AD6673_SYS_CTRL_SYSREF_MODE (1 << 2)
187 #define AD6673_SYS_CTRL_SYSREF_EN (1 << 1)
188 #define AD6673_SYS_CTRL_SYNCINB_EN (1 << 0)
189 
190 /* AD6673_REG_NSR_CTRL */
191 #define AD6673_NSR_CTRL_BW_MODE (1 << 1)
192 #define AD6673_NSR_CTRL_ENABLE (1 << 0)
193 
194 /* AD6673_REG_NSR_TUNING */
195 #define AD6673_NSR_TUNING(x) (((x) & 0x3F) << 0)
196 
197 /* AD6673_REG_DCC_CTRL */
198 #define AD6673_DCC_CTRL_FREEZE_DCC (1 << 6)
199 #define AD6673_DCC_CTRL_DCC_BW(x) (((x) & 0xF) << 2)
200 #define AD6673_DCC_CTRL_DCC_EN (1 << 1)
201 
202 /* AD6673_REG_FAST_DETECT */
203 #define AD6673_FAST_DETECT_PIN_FCT (1 << 4)
204 #define AD6673_FAST_DETECT_FORCE_FDA_FDB_PIN (1 << 3)
205 #define AD6673_FAST_DETECT_FORCE_FDA_FDB_VAL (1 << 2)
206 #define AD6673_FAST_DETECT_OUTPUT_ENABLE (1 << 0)
207 
208 /* AD6673_REG_204B_QUICK_CFG */
209 #define AD6673_204B_QUICK_CFG(x) (((x) & 0xFF) << 0)
210 
211 /* AD6673_REG_204B_CTRL1 */
212 #define AD6673_204B_CTRL1_TAIL_BITS (1 << 6)
213 #define AD6673_204B_CTRL1_TEST_SAMPLE_EN (1 << 5)
214 #define AD6673_204B_CTRL1_ILAS_MODE(x) (((x) & 0x3) << 2)
215 #define AD6673_204B_CTRL1_POWER_DOWN (1 << 0)
216 
217 /* AD6673_REG_204B_CTRL2 */
218 #define AD6673_204B_CTRL2_INVERT_JESD_BITS (1 << 1)
219 
220 /* AD6673_REG_204B_CTRL3 */
221 #define AD6673_204B_CTRL3_TEST_DATA_INJ_PT(x) (((x) & 0x3) << 4)
222 #define AD6673_204B_CTRL3_JESD_TEST_MODE(x) (((x) & 0xF) << 0)
223 
224 /* AD6673_REG_204B_PARAM_SCR_L */
225 #define AD6673_204B_PARAM_SCR_L_SCRAMBLING (1 << 7)
226 #define AD6673_204B_PARAM_SCR_L_LANES (1 << 0)
227 
228 /* AD6673_REG_204B_PARAM_CS_N */
229 #define AD6673_204B_PARAM_CS_N_NR_CTRL_BITS(x) (((x) & 0x3) << 6)
230 #define AD6673_204B_PARAM_CS_N_ADC_RESOLUTION(x) (((x) & 0xF) << 0)
231 
232 /* AD6673_REG_204B_PARAM_NP */
233 #define AD6673_204B_PARAM_NP_JESD_SUBCLASS(x) (((x) & 0x3) << 5)
234 #define AD6673_204B_PARAM_NP_JESD_N_VAL(x) (((x) & 0xF) << 0)
235 
236 /* AD6673_REG_204B_PARAM_S */
237 #define AD6673_204B_PARAM_S(x) (((x) << 0x1F) << 0)
238 
239 /* AD6673_REG_204B_PARAM_HD_CF */
240 #define AD6673_204B_PARAM_HD_CF_HD_VAL (1 << 7)
241 #define AD6673_204B_PARAM_HD_CF_CF_VAL(x) (((x) & 0x1F) << 0)
242 
243 /* AD6673_REG_204B_LANE_ASSGN1 */
244 #define AD6673_204B_LANE_ASSGN1(x) (((x) & 0x3) << 4)
245 
246 /* AD6673_REG_204B_LANE_ASSGN2 */
247 #define AD6673_204B_LANE_ASSGN2(x) (((x) &0x3) << 0)
248 
249 /* AD6673_REG_204B_LMFC_OFFSET */
250 #define AD6673_204B_LMFC_OFFSET(x) (((x) & 0x1F) << 0)
251 
252 /*****************************************************************************/
253 /************************** Types Declarations *******************************/
254 /*****************************************************************************/
255 
272  int8_t en_clk_dcs;
306  int8_t adc_vref;
314  int8_t name[16];
315 };
316 
336  int8_t cml_level;
350  int8_t subclass;
357  int8_t ctrl_bits_no;
375  int8_t did;
377  int8_t bid;
379  int8_t lid0;
381  int8_t lid1;
386  int8_t k;
392  int8_t scrambling;
398  int8_t ilas_mode;
404  int8_t en_ilas_test;
416  int8_t en_sys_ref;
422  int8_t en_sync_in_b;
428  int8_t sys_ref_mode;
446  int8_t lane0_assign;
447  /* Option to remap converter and lane assignments.
448  * 0 = assign Logical Lane 1 to Physical Lane A
449  * 1 = assign Logical Lane 1 to Physical Lane B [default]
450  */
451  int8_t lane1_assign;
452 };
453 
464  int8_t en_fd;
470  int8_t pin_function;
476  int8_t force_pins;
484  int16_t fd_upper_tresh;
486  int16_t fd_lower_tresh;
488  int16_t df_dwell_time;
489 };
490 
492  int32_t f0;
493  int32_t f_center;
494  int32_t f1;
495 };
496 
497 struct ad6673_state {
501 };
502 
521 };
522 
523 struct ad6673_dev {
524  /* SPI */
526  /* Device Settings */
529 };
530 
532  /* SPI */
534 };
535 
536 /******************************************************************************/
537 /************************ Functions Declarations ******************************/
538 /******************************************************************************/
539 
541 int32_t ad6673_setup(struct ad6673_dev **device,
544 int32_t ad6673_remove(struct ad6673_dev *dev);
546 int32_t ad6673_read(struct ad6673_dev *dev,
547  int32_t register_address);
549 int32_t ad6673_write(struct ad6673_dev *dev,
550  int32_t register_address,
551  int32_t register_value);
553 int32_t ad6673_transfer(struct ad6673_dev *dev);
555 int32_t ad6673_soft_reset(struct ad6673_dev *dev);
557 int32_t ad6673_chip_pwr_mode(struct ad6673_dev *dev,
558  int32_t mode);
560 int32_t ad6673_select_channel_for_config(struct ad6673_dev *dev,
561  int32_t channel);
563 int32_t ad6673_test_mode(struct ad6673_dev *dev,
564  int32_t mode);
566 int32_t ad6673_offset_adj(struct ad6673_dev *dev,
567  int32_t adj);
569 int32_t ad6673_output_disable(struct ad6673_dev *dev,
570  int32_t en);
572 int32_t ad6673_output_invert(struct ad6673_dev *dev,
573  int32_t invert);
575 int32_t ad6673_output_format(struct ad6673_dev *dev,
576  int32_t format);
578 int32_t ad6673_reset_pn9(struct ad6673_dev *dev,
579  int32_t rst);
581 int32_t ad6673_reset_pn23(struct ad6673_dev *dev,
582  int32_t rst);
584 int32_t ad6673_set_user_pattern(struct ad6673_dev *dev,
585  int32_t pattern_no,
586  int32_t user_pattern);
588 int32_t ad6673_bist_enable(struct ad6673_dev *dev,
589  int32_t enable);
591 int32_t ad6673_bist_reset(struct ad6673_dev *dev,
592  int32_t reset);
594 int32_t ad6673_jesd204b_setup(struct ad6673_dev *dev);
596 int32_t ad6673_jesd204b_pwr_mode(struct ad6673_dev *dev,
597  int32_t mode);
601  int32_t inj_point);
603 int32_t ad6673_jesd204b_test_mode(struct ad6673_dev *dev,
604  int32_t test_mode);
606 int32_t ad6673_jesd204b_invert_logic(struct ad6673_dev *dev,
607  int32_t invert);
609 int32_t ad6673_fast_detect_setup(struct ad6673_dev *dev);
611 int32_t ad6673_dcc_enable(struct ad6673_dev *dev,
612  int32_t enable);
614 int32_t ad6673_dcc_bandwidth(struct ad6673_dev *dev,
615  int32_t bw);
617 int32_t ad6673_dcc_freeze(struct ad6673_dev *dev,
618  int32_t freeze);
620 int32_t ad6673_nsr_enable(struct ad6673_dev *dev,
621  int32_t enable);
623 int32_t ad6673_nsr_bandwidth_mode(struct ad6673_dev *dev,
624  int32_t mode);
626 int32_t ad6673_nsr_tuning_freq(int64_t tune_freq,
627  int64_t f_adc,
628  struct ad6673_type_band *p_band);
629 
630 #endif /* __AD6673_H__ */
AD6673_REG_PLL_ENCODE
#define AD6673_REG_PLL_ENCODE
Definition: ad6673.h:90
ad6673_output_disable
int32_t ad6673_output_disable(struct ad6673_dev *dev, int32_t en)
Disables (1) or enables (0) the data output. Note: This function modifies a shadowed register,...
Definition: ad6673.c:550
AD6673_SHD_REG_CLOCK
@ AD6673_SHD_REG_CLOCK
Definition: ad6673.h:504
ad6673_fast_detect_cfg::fd_lower_tresh
int16_t fd_lower_tresh
Definition: ad6673.h:486
ad6673_fast_detect_cfg::en_fd
int8_t en_fd
Definition: ad6673.h:464
AD6673_FAST_DETECT_FORCE_FDA_FDB_VAL
#define AD6673_FAST_DETECT_FORCE_FDA_FDB_VAL
Definition: ad6673.h:205
AD6673_REG_204B_CTRL1
#define AD6673_REG_204B_CTRL1
Definition: ad6673.h:102
AD6673_REG_SHD_NSR_CTRL
@ AD6673_REG_SHD_NSR_CTRL
Definition: ad6673.h:512
ad6673_write
int32_t ad6673_write(struct ad6673_dev *dev, int32_t register_address, int32_t register_value)
Writes a value to the selected register.
Definition: ad6673.c:249
AD6673_CML_DIFF_OUT_LEVEL
#define AD6673_CML_DIFF_OUT_LEVEL(x)
Definition: ad6673.h:175
AD6673_NSR_CTRL_ENABLE
#define AD6673_NSR_CTRL_ENABLE
Definition: ad6673.h:192
ad6673_init_param::spi_init
no_os_spi_init_param spi_init
Definition: ad6673.h:533
AD6673_204B_QUICK_CFG
#define AD6673_204B_QUICK_CFG(x)
Definition: ad6673.h:209
shadow_registers
shadow_registers
Definition: ad6673.h:503
SHADOW
#define SHADOW(x)
Definition: ad6673.h:64
AD6673_SHD_REG_SYS_CTRL
@ AD6673_SHD_REG_SYS_CTRL
Definition: ad6673.h:511
ad6673_dcc_enable
int32_t ad6673_dcc_enable(struct ad6673_dev *dev, int32_t enable)
Enables DC correction for use in the output data signal path.
Definition: ad6673.c:1212
ad6673_nsr_bandwidth_mode
int32_t ad6673_nsr_bandwidth_mode(struct ad6673_dev *dev, int32_t mode)
Selects the NSR Bandwidth mode.
Definition: ad6673.c:1342
ad6673_jesd204b_invert_logic
int32_t ad6673_jesd204b_invert_logic(struct ad6673_dev *dev, int32_t invert)
Inverts the logic of JESD204B bits.
Definition: ad6673.c:1136
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
ad6673_cfg.h
Header file of AD6673 Driver Configuration.
AD6673_REG_204B_QUICK_CFG
#define AD6673_REG_204B_QUICK_CFG
Definition: ad6673.h:101
ad6673_output_invert
int32_t ad6673_output_invert(struct ad6673_dev *dev, int32_t invert)
Activates the inverted (1) or normal (0) output mode. Note: This function modifies a shadowed registe...
Definition: ad6673.c:585
ad6673_jesd204b_cfg::ctrl_bits_assign
int8_t ctrl_bits_assign
Definition: ad6673.h:367
AD6673_REG_FD_LOWER_THD
#define AD6673_REG_FD_LOWER_THD
Definition: ad6673.h:99
ad6673_state::pdata
struct ad6673_platform_data * pdata
Definition: ad6673.h:498
no_os_spi.h
Header file of SPI Interface.
ad6673_dcc_enable
int32_t ad6673_dcc_enable(struct ad6673_dev *dev, int32_t enable)
Enables DC correction for use in the output data signal path.
Definition: ad6673.c:1212
AD6673_TEST_RST_PN_SHOR
#define AD6673_TEST_RST_PN_SHOR
Definition: ad6673.h:158
AD6673_REG_204B_PARAM_K
#define AD6673_REG_204B_PARAM_K
Definition: ad6673.h:111
AD6673_REG_204B_BID_CFG
#define AD6673_REG_204B_BID_CFG
Definition: ad6673.h:106
AD6673_REG_FAST_DETECT
#define AD6673_REG_FAST_DETECT
Definition: ad6673.h:97
AD6673_204B_CTRL1_TEST_SAMPLE_EN
#define AD6673_204B_CTRL1_TEST_SAMPLE_EN
Definition: ad6673.h:213
AD6673_204B_PARAM_CS_N_NR_CTRL_BITS
#define AD6673_204B_PARAM_CS_N_NR_CTRL_BITS(x)
Definition: ad6673.h:229
ad6673_dev::ad6673_st
struct ad6673_state ad6673_st
Definition: ad6673.h:527
ad6673_output_invert
int32_t ad6673_output_invert(struct ad6673_dev *dev, int32_t invert)
Activates the inverted (1) or normal (0) output mode. Note: This function modifies a shadowed registe...
Definition: ad6673.c:585
AD6673_REG_PDWN
#define AD6673_REG_PDWN
Definition: ad6673.h:76
ad6673_reset_pn9
int32_t ad6673_reset_pn9(struct ad6673_dev *dev, int32_t rst)
Sets (1) or clears (0) the reset short PN sequence bit(PN9).
Definition: ad6673.c:653
AD6673_SHD_REG_DCC_VAL
@ AD6673_SHD_REG_DCC_VAL
Definition: ad6673.h:515
ad6673_nsr_enable
int32_t ad6673_nsr_enable(struct ad6673_dev *dev, int32_t enable)
Enables the Noise shaped requantizer(NRS).
Definition: ad6673.c:1310
ad6673_fast_detect_cfg::pin_function
int8_t pin_function
Definition: ad6673.h:470
ad6673_nsr_tuning_freq
int32_t ad6673_nsr_tuning_freq(int64_t tune_freq, int64_t f_adc, struct ad6673_type_band *p_band)
Sets the NSR frequency range.
Definition: ad6673.c:1375
ad6673_platform_data::clk_div_ratio
int8_t clk_div_ratio
Definition: ad6673.h:287
AD6673_REG_204B_CTRL2
#define AD6673_REG_204B_CTRL2
Definition: ad6673.h:103
ad6673_dcc_bandwidth
int32_t ad6673_dcc_bandwidth(struct ad6673_dev *dev, int32_t bw)
Selects the bandwidth value for the DC correction circuit.
Definition: ad6673.c:1246
ad6673_bist_enable
int32_t ad6673_bist_enable(struct ad6673_dev *dev, int32_t enable)
Enables the Build-In-Self-Test.
Definition: ad6673.c:738
AD6673_REG_OUT_MODE
#define AD6673_REG_OUT_MODE
Definition: ad6673.h:83
ad6673_dev::spi_desc
no_os_spi_desc * spi_desc
Definition: ad6673.h:525
ad6673_soft_reset
int32_t ad6673_soft_reset(struct ad6673_dev *dev)
Resets all registers to their default values.
Definition: ad6673.c:325
AD6673_BIST_RESET
#define AD6673_BIST_RESET
Definition: ad6673.h:162
AD6673_REG_NSR_CTRL
#define AD6673_REG_NSR_CTRL
Definition: ad6673.h:93
AD6673_204B_CTRL3_TEST_DATA_INJ_PT
#define AD6673_204B_CTRL3_TEST_DATA_INJ_PT(x)
Definition: ad6673.h:221
ad6673_select_channel_for_config
int32_t ad6673_select_channel_for_config(struct ad6673_dev *dev, int32_t channel)
Selects a channel as the current channel for further configurations.
Definition: ad6673.c:450
ad6673_jesd204b_cfg::bid
int8_t bid
Definition: ad6673.h:377
ad6673_platform_data::name
int8_t name[16]
Definition: ad6673.h:314
AD6673_PLL_ENCODE
#define AD6673_PLL_ENCODE(x)
Definition: ad6673.h:181
AD6673_SHD_REG_CLOCK_DIV
@ AD6673_SHD_REG_CLOCK_DIV
Definition: ad6673.h:505
AD6673_READ
#define AD6673_READ
Definition: ad6673.h:55
shadow_regs
const int32_t shadow_regs[SHADOW_REGISTER_COUNT]
Definition: ad9250.c:50
ad6673_jesd204b_interface
struct ad6673_jesd204b_cfg ad6673_jesd204b_interface
Definition: ad6673_cfg.h:61
device
Definition: ad9361_util.h:75
AD6673_REG_SHD_NSR_TUNING
@ AD6673_REG_SHD_NSR_TUNING
Definition: ad6673.h:513
AD6673_REG_CLOCK_DIV
#define AD6673_REG_CLOCK_DIV
Definition: ad6673.h:79
ad6673_reset_pn23
int32_t ad6673_reset_pn23(struct ad6673_dev *dev, int32_t rst)
Sets (1) or clears (0) the reset long PN sequence bit(PN23).
Definition: ad6673.c:685
ad6673_jesd204b_cfg::did
int8_t did
Definition: ad6673.h:375
ad6673_fast_detect_setup
int32_t ad6673_fast_detect_setup(struct ad6673_dev *dev)
Configures the Fast-Detect module.
Definition: ad6673.c:1165
ad6673_set_bits_to_reg
int32_t ad6673_set_bits_to_reg(struct ad6673_dev *dev, uint32_t register_address, uint8_t bits_value, uint8_t mask)
Sets a bit/group of bits inside a register without modifying other bits.
Definition: ad6673.c:360
AD6673_CLOCK_DIV_PHASE
#define AD6673_CLOCK_DIV_PHASE(x)
Definition: ad6673.h:152
AD6673_PDWN_EXTERN
#define AD6673_PDWN_EXTERN
Definition: ad6673.h:138
ad6673_reset_pn9
int32_t ad6673_reset_pn9(struct ad6673_dev *dev, int32_t rst)
Sets (1) or clears (0) the reset short PN sequence bit(PN9).
Definition: ad6673.c:653
AD6673_BIST_ENABLE
#define AD6673_BIST_ENABLE
Definition: ad6673.h:163
AD6673_CLOCK_SELECTION
#define AD6673_CLOCK_SELECTION(x)
Definition: ad6673.h:144
ad6673_chip_pwr_mode
int32_t ad6673_chip_pwr_mode(struct ad6673_dev *dev, int32_t mode)
Configures the power mode of the chip.
Definition: ad6673.c:417
AD6673_SYS_CTRL_SYSREF_EN
#define AD6673_SYS_CTRL_SYSREF_EN
Definition: ad6673.h:187
AD6673_DCC_CTRL_FREEZE_DCC
#define AD6673_DCC_CTRL_FREEZE_DCC
Definition: ad6673.h:198
ad6673_jesd204b_test_mode
int32_t ad6673_jesd204b_test_mode(struct ad6673_dev *dev, int32_t test_mode)
Selects a JESD204B test mode.
Definition: ad6673.c:1104
AD6673_WRITE
#define AD6673_WRITE
Definition: ad6673.h:56
ad6673_jesd204b_select_test_injection_point
int32_t ad6673_jesd204b_select_test_injection_point(struct ad6673_dev *dev, int32_t inj_point)
Selects the point in the processing path of a lane, where the test data will be inserted.
Definition: ad6673.c:1063
ad6673_bist_enable
int32_t ad6673_bist_enable(struct ad6673_dev *dev, int32_t enable)
Enables the Build-In-Self-Test.
Definition: ad6673.c:738
AD6673_204B_CTRL1_POWER_DOWN
#define AD6673_204B_CTRL1_POWER_DOWN
Definition: ad6673.h:215
ad6673_platform_data::clk_div_phase
int8_t clk_div_phase
Definition: ad6673.h:295
ad6673_output_format
int32_t ad6673_output_format(struct ad6673_dev *dev, int32_t format)
Specifies the output format. Note: This function modifies a shadowed register, therefore a call of ad...
Definition: ad6673.c:621
ad6673_read
int32_t ad6673_read(struct ad6673_dev *dev, int32_t register_address)
Reads the value of the selected register.
Definition: ad6673.c:212
AD6673_REG_CH_INDEX
#define AD6673_REG_CH_INDEX
Definition: ad6673.h:72
AD6673_REG_USER_TEST1
#define AD6673_REG_USER_TEST1
Definition: ad6673.h:86
AD6673_SYS_CTRL_REALIGN_ON_SYSREF
#define AD6673_SYS_CTRL_REALIGN_ON_SYSREF
Definition: ad6673.h:185
ad6673_remove
int32_t ad6673_remove(struct ad6673_dev *dev)
Free the resources allocated by ad6673_setup().
Definition: ad6673.c:193
ad6673_jesd204b_cfg::lane0_assign
int8_t lane0_assign
Definition: ad6673.h:446
no_os_error.h
Error codes definition.
ad6673_jesd204b_cfg::subclass
int8_t subclass
Definition: ad6673.h:350
SHADOW_REGISTER_COUNT
@ SHADOW_REGISTER_COUNT
Definition: ad6673.h:520
ad6673_jesd204b_cfg::lid0
int8_t lid0
Definition: ad6673.h:379
AD6673_DEVICE_UPDATE_SW
#define AD6673_DEVICE_UPDATE_SW
Definition: ad6673.h:135
ad6673_jesd204b_cfg::align_sys_ref
int8_t align_sys_ref
Definition: ad6673.h:440
ad6673_fast_detect_cfg::force_pins
int8_t force_pins
Definition: ad6673.h:476
ad6673_jesd204b_setup
int32_t ad6673_jesd204b_setup(struct ad6673_dev *dev)
Configures the JESD204B interface.
Definition: ad6673.c:837
ad6673_platform_data::en_clk_dcs
int8_t en_clk_dcs
Definition: ad6673.h:272
ad6673_dcc_bandwidth
int32_t ad6673_dcc_bandwidth(struct ad6673_dev *dev, int32_t bw)
Selects the bandwidth value for the DC correction circuit.
Definition: ad6673.c:1246
AD6673_SHD_REG_OFFSET
@ AD6673_SHD_REG_OFFSET
Definition: ad6673.h:508
ad6673_jesd204b_cfg::lane1_assign
int8_t lane1_assign
Definition: ad6673.h:451
AD6673_DCC_CTRL_DCC_BW
#define AD6673_DCC_CTRL_DCC_BW(x)
Definition: ad6673.h:199
AD6673_REG_BIST
#define AD6673_REG_BIST
Definition: ad6673.h:81
AD6673_CLOCK_DUTY_CYCLE
#define AD6673_CLOCK_DUTY_CYCLE
Definition: ad6673.h:145
AD6673_REG_FD_DWELL_TIME
#define AD6673_REG_FD_DWELL_TIME
Definition: ad6673.h:100
ad6673_is_shadow_register
int32_t ad6673_is_shadow_register(int32_t register_address)
Checks if the register is shadowed.
Definition: ad6673.c:401
ad6673_select_channel_for_config
int32_t ad6673_select_channel_for_config(struct ad6673_dev *dev, int32_t channel)
Selects a channel as the current channel for further configurations.
Definition: ad6673.c:450
AD6673_REG_204B_PARAM_SCR_L
#define AD6673_REG_204B_PARAM_SCR_L
Definition: ad6673.h:109
ad6673_jesd204b_cfg::jtx_in_standby
int8_t jtx_in_standby
Definition: ad6673.h:327
AD6673_OUT_MODE_INVERT_DATA
#define AD6673_OUT_MODE_INVERT_DATA
Definition: ad6673.h:171
AD6673_REG_204B_LANE_ASSGN2
#define AD6673_REG_204B_LANE_ASSGN2
Definition: ad6673.h:122
ad6673_output_format
int32_t ad6673_output_format(struct ad6673_dev *dev, int32_t format)
Specifies the output format. Note: This function modifies a shadowed register, therefore a call of ad...
Definition: ad6673.c:621
ad6673_jesd204b_cfg::ilas_mode
int8_t ilas_mode
Definition: ad6673.h:398
ad6673_read
int32_t ad6673_read(struct ad6673_dev *dev, int32_t register_address)
Reads the value of the selected register.
Definition: ad6673.c:212
AD6673_204B_CTRL1_ILAS_MODE
#define AD6673_204B_CTRL1_ILAS_MODE(x)
Definition: ad6673.h:214
ad6673_type_band
Definition: ad6673.h:491
AD6673_SHD_REG_OUT_MODE
@ AD6673_SHD_REG_OUT_MODE
Definition: ad6673.h:509
AD6673_SHD_REG_FD_DWELL_TIME
@ AD6673_SHD_REG_FD_DWELL_TIME
Definition: ad6673.h:519
ad6673_test_mode
int32_t ad6673_test_mode(struct ad6673_dev *dev, int32_t mode)
Sets the ADC's test mode.
Definition: ad6673.c:490
ad6673_dev
Definition: ad6673.h:523
ad6673_jesd204b_invert_logic
int32_t ad6673_jesd204b_invert_logic(struct ad6673_dev *dev, int32_t invert)
Inverts the logic of JESD204B bits.
Definition: ad6673.c:1136
ad6673_offset_adj
int32_t ad6673_offset_adj(struct ad6673_dev *dev, int32_t adj)
Sets the offset adjustment.
Definition: ad6673.c:520
AD6673_TRANSF_LEN
#define AD6673_TRANSF_LEN(x)
Definition: ad6673.h:63
ad6673_init_param
Definition: ad6673.h:531
AD6673_TEST_OUTPUT_TEST
#define AD6673_TEST_OUTPUT_TEST(x)
Definition: ad6673.h:159
ad6673_state::p_fd
struct ad6673_fast_detect_cfg * p_fd
Definition: ad6673.h:500
AD6673_FAST_DETECT_OUTPUT_ENABLE
#define AD6673_FAST_DETECT_OUTPUT_ENABLE
Definition: ad6673.h:206
AD6673_REG_204B_LID_CFG2
#define AD6673_REG_204B_LID_CFG2
Definition: ad6673.h:108
AD6673_SHD_REG_FD_LOWER_THD
@ AD6673_SHD_REG_FD_LOWER_THD
Definition: ad6673.h:518
ad6673_jesd204b_cfg::align_sync_in_b
int8_t align_sync_in_b
Definition: ad6673.h:434
AD6673_204B_CTRL1_TAIL_BITS
#define AD6673_204B_CTRL1_TAIL_BITS
Definition: ad6673.h:212
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
ad6673.h
Header file of AD6673 Driver.
AD6673_VREF_FS_ADJUST
#define AD6673_VREF_FS_ADJUST(x)
Definition: ad6673.h:178
AD6673_CH_INDEX_ADC_A
#define AD6673_CH_INDEX_ADC_A
Definition: ad6673.h:131
ad6673_jesd204b_cfg::invert_logic_bits
int8_t invert_logic_bits
Definition: ad6673.h:410
AD6673_REG_DCC_CTRL
#define AD6673_REG_DCC_CTRL
Definition: ad6673.h:95
ad6673_jesd204b_cfg::scrambling
int8_t scrambling
Definition: ad6673.h:392
AD6673_204B_PARAM_SCR_L_SCRAMBLING
#define AD6673_204B_PARAM_SCR_L_SCRAMBLING
Definition: ad6673.h:225
ad6673_fast_detect_cfg::fd_upper_tresh
int16_t fd_upper_tresh
Definition: ad6673.h:484
ad6673_platform_data
Platform specific information.
Definition: ad6673.h:260
AD6673_NSR_CTRL_BW_MODE
#define AD6673_NSR_CTRL_BW_MODE
Definition: ad6673.h:191
AD6673_SHD_REG_BIST
@ AD6673_SHD_REG_BIST
Definition: ad6673.h:507
ad6673_transfer
int32_t ad6673_transfer(struct ad6673_dev *dev)
Initiates a transfer and waits for the operation to end. Note: This function may be called after a sh...
Definition: ad6673.c:293
ad6673_output_disable
int32_t ad6673_output_disable(struct ad6673_dev *dev, int32_t en)
Disables (1) or enables (0) the data output. Note: This function modifies a shadowed register,...
Definition: ad6673.c:550
AD6673_SYS_CTRL_SYNCINB_EN
#define AD6673_SYS_CTRL_SYNCINB_EN
Definition: ad6673.h:188
ad6673_soft_reset
int32_t ad6673_soft_reset(struct ad6673_dev *dev)
Resets all registers to their default values.
Definition: ad6673.c:325
AD6673_REG_DEVICE_UPDATE
#define AD6673_REG_DEVICE_UPDATE
Definition: ad6673.h:73
AD6673_REG_204B_LANE_ASSGN1
#define AD6673_REG_204B_LANE_ASSGN1
Definition: ad6673.h:121
ad6673_remove
int32_t ad6673_remove(struct ad6673_dev *dev)
Free the resources allocated by ad6673_setup().
Definition: ad6673.c:193
ad6673_bist_reset
int32_t ad6673_bist_reset(struct ad6673_dev *dev, int32_t reset)
Resets the Build-In-Self-Test.
Definition: ad6673.c:768
AD6673_SHD_REG_TEST
@ AD6673_SHD_REG_TEST
Definition: ad6673.h:506
AD6673_PDWN_CHIP
#define AD6673_PDWN_CHIP(x)
Definition: ad6673.h:141
AD6673_FAST_DETECT_PIN_FCT
#define AD6673_FAST_DETECT_PIN_FCT
Definition: ad6673.h:203
ad6673_jesd204b_cfg::sys_ref_mode
int8_t sys_ref_mode
Definition: ad6673.h:428
AD6673_REG_SYS_CTRL
#define AD6673_REG_SYS_CTRL
Definition: ad6673.h:92
ad6673_type_band::f0
int32_t f0
Definition: ad6673.h:492
AD6673_REG_FD_UPPER_THD
#define AD6673_REG_FD_UPPER_THD
Definition: ad6673.h:98
AD6673_SHD_REG_DCC_CTRL
@ AD6673_SHD_REG_DCC_CTRL
Definition: ad6673.h:514
ad6673_platform_data::extrn_pdwnmode
int8_t extrn_pdwnmode
Definition: ad6673.h:266
ad6673_bist_reset
int32_t ad6673_bist_reset(struct ad6673_dev *dev, int32_t reset)
Resets the Build-In-Self-Test.
Definition: ad6673.c:768
ad6673_jesd204b_cfg::en_sys_ref
int8_t en_sys_ref
Definition: ad6673.h:416
ad6673_set_user_pattern
int32_t ad6673_set_user_pattern(struct ad6673_dev *dev, int32_t pattern_no, int32_t user_pattern)
Configures a User Test Pattern.
Definition: ad6673.c:716
ad6673_jesd204b_pwr_mode
int32_t ad6673_jesd204b_pwr_mode(struct ad6673_dev *dev, int32_t mode)
Configures the power mode of the JESD204B data transmit block.
Definition: ad6673.c:1029
AD6673_204B_CTRL3_JESD_TEST_MODE
#define AD6673_204B_CTRL3_JESD_TEST_MODE(x)
Definition: ad6673.h:222
ad6673_jesd204b_cfg::en_ilas_test
int8_t en_ilas_test
Definition: ad6673.h:404
AD6673_CLOCK_DIV_RATIO
#define AD6673_CLOCK_DIV_RATIO(x)
Definition: ad6673.h:153
AD6673_SYS_CTRL_SYSREF_MODE
#define AD6673_SYS_CTRL_SYSREF_MODE
Definition: ad6673.h:186
ad6673_nsr_bandwidth_mode
int32_t ad6673_nsr_bandwidth_mode(struct ad6673_dev *dev, int32_t mode)
Selects the NSR Bandwidth mode.
Definition: ad6673.c:1342
ad6673_jesd204b_cfg::k
int8_t k
Definition: ad6673.h:386
ad6673_fast_detect_cfg::pin_force_value
int8_t pin_force_value
Definition: ad6673.h:482
AD6673_REG_204B_DID_CFG
#define AD6673_REG_204B_DID_CFG
Definition: ad6673.h:105
AD6673_ADDR
#define AD6673_ADDR(x)
Definition: ad6673.h:58
ad6673_state
Definition: ad6673.h:497
ad6673_chip_pwr_mode
int32_t ad6673_chip_pwr_mode(struct ad6673_dev *dev, int32_t mode)
Configures the power mode of the chip.
Definition: ad6673.c:417
AD6673_SYS_CTRL_REALIGN_ON_SYNCINB
#define AD6673_SYS_CTRL_REALIGN_ON_SYNCINB
Definition: ad6673.h:184
ad6673_platform_data::clk_selection
int8_t clk_selection
Definition: ad6673.h:279
AD6673_CH_INDEX_ADC_B
#define AD6673_CH_INDEX_ADC_B
Definition: ad6673.h:132
AD6673_OUT_MODE_JTX_BIT_ASSIGN
#define AD6673_OUT_MODE_JTX_BIT_ASSIGN(x)
Definition: ad6673.h:169
ad6673_jesd204b_select_test_injection_point
int32_t ad6673_jesd204b_select_test_injection_point(struct ad6673_dev *dev, int32_t inj_point)
Selects the point in the processing path of a lane, where the test data will be inserted.
Definition: ad6673.c:1063
ad6673_transfer
int32_t ad6673_transfer(struct ad6673_dev *dev)
Initiates a transfer and waits for the operation to end. Note: This function may be called after a sh...
Definition: ad6673.c:293
AD6673_PDWN_JTX
#define AD6673_PDWN_JTX
Definition: ad6673.h:139
AD6673_REG_OFFSET_ADJUST
#define AD6673_REG_OFFSET_ADJUST(x)
Definition: ad6673.h:166
ad6673_dcc_freeze
int32_t ad6673_dcc_freeze(struct ad6673_dev *dev, int32_t freeze)
Freezes DC correction value.
Definition: ad6673.c:1278
ad6673_nsr_enable
int32_t ad6673_nsr_enable(struct ad6673_dev *dev, int32_t enable)
Enables the Noise shaped requantizer(NRS).
Definition: ad6673.c:1310
AD6673_REG_SPI_CFG
#define AD6673_REG_SPI_CFG
Definition: ad6673.h:67
AD6673_REG_TEST
#define AD6673_REG_TEST
Definition: ad6673.h:80
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ad6673_nsr_tuning_freq
int32_t ad6673_nsr_tuning_freq(int64_t tune_freq, int64_t f_adc, struct ad6673_type_band *p_band)
Sets the NSR frequency range.
Definition: ad6673.c:1375
AD6673_204B_CTRL2_INVERT_JESD_BITS
#define AD6673_204B_CTRL2_INVERT_JESD_BITS
Definition: ad6673.h:218
ad6673_jesd204b_cfg::lid1
int8_t lid1
Definition: ad6673.h:381
ad6673_jesd204b_cfg::en_sync_in_b
int8_t en_sync_in_b
Definition: ad6673.h:422
ad6673_set_user_pattern
int32_t ad6673_set_user_pattern(struct ad6673_dev *dev, int32_t pattern_no, int32_t user_pattern)
Configures a User Test Pattern.
Definition: ad6673.c:716
ad6673_jesd204b_pwr_mode
int32_t ad6673_jesd204b_pwr_mode(struct ad6673_dev *dev, int32_t mode)
Configures the power mode of the JESD204B data transmit block.
Definition: ad6673.c:1029
AD6673_SHD_REG_VREF
@ AD6673_SHD_REG_VREF
Definition: ad6673.h:510
ad6673_jesd204b_cfg
JESD204B interface configuration.
Definition: ad6673.h:321
ad6673_jesd204b_cfg::ctrl_bits_no
int8_t ctrl_bits_no
Definition: ad6673.h:357
ad6673_platform_data::adc_vref
int8_t adc_vref
Definition: ad6673.h:306
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:70
AD6673_OUT_MODE_DISABLE
#define AD6673_OUT_MODE_DISABLE
Definition: ad6673.h:170
ad6673_jesd204b_cfg::cml_level
int8_t cml_level
Definition: ad6673.h:336
ad6673_fast_detect
struct ad6673_fast_detect_cfg ad6673_fast_detect
Definition: ad6673_cfg.h:87
ad6673_fast_detect_cfg::df_dwell_time
int16_t df_dwell_time
Definition: ad6673.h:488
ad6673_type_band::f_center
int32_t f_center
Definition: ad6673.h:493
ad6673_reset_pn23
int32_t ad6673_reset_pn23(struct ad6673_dev *dev, int32_t rst)
Sets (1) or clears (0) the reset long PN sequence bit(PN23).
Definition: ad6673.c:685
ad6673_state::p_jesd204b
struct ad6673_jesd204b_cfg * p_jesd204b
Definition: ad6673.h:499
ad6673_setup
int32_t ad6673_setup(struct ad6673_dev **device, struct ad6673_init_param init_param)
Configures the device.
Definition: ad6673.c:93
ad6673_fast_detect_setup
int32_t ad6673_fast_detect_setup(struct ad6673_dev *dev)
Configures the Fast-Detect module.
Definition: ad6673.c:1165
AD6673_SHD_REG_FD_UPPER_THD
@ AD6673_SHD_REG_FD_UPPER_THD
Definition: ad6673.h:517
AD6673_204B_LANE_ASSGN2
#define AD6673_204B_LANE_ASSGN2(x)
Definition: ad6673.h:247
AD6673_204B_PARAM_NP_JESD_SUBCLASS
#define AD6673_204B_PARAM_NP_JESD_SUBCLASS(x)
Definition: ad6673.h:233
AD6673_REG_CLOCK
#define AD6673_REG_CLOCK
Definition: ad6673.h:77
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
ad6673_fast_detect_cfg
Fast Detect module configuration.
Definition: ad6673.h:458
AD6673_REG_VREF
#define AD6673_REG_VREF
Definition: ad6673.h:85
ad6673_jesd204b_set_frames
int32_t ad6673_jesd204b_set_frames(struct ad6673_dev *dev, int32_t k_frames)
Sets number of frames per multiframe (K).
Definition: ad6673.c:800
AD6673_REG_204B_CTRL3
#define AD6673_REG_204B_CTRL3
Definition: ad6673.h:104
AD6673_204B_LANE_ASSGN1
#define AD6673_204B_LANE_ASSGN1(x)
Definition: ad6673.h:244
AD6673_REG_204B_PARAM_CS_N
#define AD6673_REG_204B_PARAM_CS_N
Definition: ad6673.h:113
AD6673_SPI_CFG_SOFT_RST
#define AD6673_SPI_CFG_SOFT_RST
Definition: ad6673.h:128
ad6673_setup
int32_t ad6673_setup(struct ad6673_dev **device, struct ad6673_init_param init_param)
Configures the device.
Definition: ad6673.c:93
ad6673_test_mode
int32_t ad6673_test_mode(struct ad6673_dev *dev, int32_t mode)
Sets the ADC's test mode.
Definition: ad6673.c:490
AD6673_PDWN_JESD204B
#define AD6673_PDWN_JESD204B(x)
Definition: ad6673.h:140
ad6673_jesd204b_test_mode
int32_t ad6673_jesd204b_test_mode(struct ad6673_dev *dev, int32_t test_mode)
Selects a JESD204B test mode.
Definition: ad6673.c:1104
ad6673_offset_adj
int32_t ad6673_offset_adj(struct ad6673_dev *dev, int32_t adj)
Sets the offset adjustment.
Definition: ad6673.c:520
AD6673_OUT_MODE_DATA_FORMAT
#define AD6673_OUT_MODE_DATA_FORMAT(x)
Definition: ad6673.h:172
AD6673_DCC_CTRL_DCC_EN
#define AD6673_DCC_CTRL_DCC_EN
Definition: ad6673.h:200
ad6673_pdata_lpc
struct ad6673_platform_data ad6673_pdata_lpc
Definition: ad6673_cfg.h:50
AD6673_REG_204B_PARAM_NP
#define AD6673_REG_204B_PARAM_NP
Definition: ad6673.h:114
ad6673_dev::shadow_regs
int32_t shadow_regs[SHADOW_REGISTER_COUNT]
Definition: ad6673.h:528
ad6673_type_band::f1
int32_t f1
Definition: ad6673.h:494
AD6673_FAST_DETECT_FORCE_FDA_FDB_PIN
#define AD6673_FAST_DETECT_FORCE_FDA_FDB_PIN
Definition: ad6673.h:204
AD6673_REG_OFFSET
#define AD6673_REG_OFFSET
Definition: ad6673.h:82
AD6673_REG_CML
#define AD6673_REG_CML
Definition: ad6673.h:84
AD6673_SHD_REG_FAST_DETECT
@ AD6673_SHD_REG_FAST_DETECT
Definition: ad6673.h:516
AD6673_TEST_RST_PN_LONG
#define AD6673_TEST_RST_PN_LONG
Definition: ad6673.h:157
ad6673_dcc_freeze
int32_t ad6673_dcc_freeze(struct ad6673_dev *dev, int32_t freeze)
Freezes DC correction value.
Definition: ad6673.c:1278
AD6673_REG_204B_LID_CFG1
#define AD6673_REG_204B_LID_CFG1
Definition: ad6673.h:107
ad6673_jesd204b_cfg::tail_bits_mode
int8_t tail_bits_mode
Definition: ad6673.h:373
ad6673_jesd204b_cfg::quick_cfg_option
int8_t quick_cfg_option
Definition: ad6673.h:344
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
ad6673_jesd204b_setup
int32_t ad6673_jesd204b_setup(struct ad6673_dev *dev)
Configures the JESD204B interface.
Definition: ad6673.c:837
ad6673_write
int32_t ad6673_write(struct ad6673_dev *dev, int32_t register_address, int32_t register_value)
Writes a value to the selected register.
Definition: ad6673.c:249
ad6673_platform_data::pll_low_encode
int8_t pll_low_encode
Definition: ad6673.h:312