no-OS
ad6676.h
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1 /***************************************************************************/
40 #ifndef AD6676_H_
41 #define AD6676_H_
42 
43 /******************************************************************************/
44 /***************************** Include Files **********************************/
45 /******************************************************************************/
46 #include <stdint.h>
47 #include "no_os_util.h"
48 #include "no_os_delay.h"
49 #include "no_os_spi.h"
50 
51 /******************************************************************************/
52 /********************** Macros and Constants Definitions **********************/
53 /******************************************************************************/
54 #define AD6676_SPI_CONFIG 0x000
55 #define AD6676_DEVICE_CONFIG 0x002
56 #define AD6676_CHIP_TYPE 0x003
57 #define AD6676_CHIP_ID0 0x004
58 #define AD6676_CHIP_ID1 0x005
59 #define AD6676_GRADE_REVISION 0x006
60 #define AD6676_VENDOR_ID0 0x00C
61 #define AD6676_VENDOR_ID1 0x00D
62 #define AD6676_PCBL_DONE 0x0FE
63 
64 /* CONFIGURATION SETTINGS */
65 #define AD6676_FADC_0 0x100
66 #define AD6676_FADC_1 0x101
67 #define AD6676_FIF_0 0x102
68 #define AD6676_FIF_1 0x103
69 #define AD6676_BW_0 0x104
70 #define AD6676_BW_1 0x105
71 #define AD6676_LEXT 0x106
72 #define AD6676_MRGN_L 0x107
73 #define AD6676_MRGN_U 0x108
74 #define AD6676_MRGN_IF 0x109
75 #define AD6676_XSCALE_1 0x10A
76 
77 /* BP SD ADC CALIBRATION/PROFILE */
78 #define AD6676_CAL_CTRL 0x115
79 #define AD6676_CAL_CMD 0x116
80 #define AD6676_CAL_DONE 0x117
81 #define AD6676_ADC_CONFIG 0x118
82 #define AD6676_FORCE_END_CAL 0x11A
83 
84 /* DIGITAL SIGNAL PATH */
85 #define AD6676_DEC_MODE 0x140
86 #define AD6676_MIX1_TUNING 0x141
87 #define AD6676_MIX2_TUNING 0x142
88 #define AD6676_MIX1_INIT 0x143
89 #define AD6676_MIX2_INIT_LSB 0x144
90 #define AD6676_MIX2_INIT_MSB 0x145
91 #define AD6676_DP_CTRL 0x146
92 
93 /* POWER CONTROL */
94 #define AD6676_STANDBY 0x150
95 #define AD6676_PD_DIG 0x151
96 #define AD6676_PD_PIN_CTRL 0x152
97 #define AD6676_STBY_DAC 0x250
98 
99 /* ATTENUATOR */
100 #define AD6676_ATTEN_MODE 0x180
101 #define AD6676_ATTEN_VALUE_PIN0 0x181
102 #define AD6676_ATTEN_VALUE_PIN1 0x182
103 #define AD6676_ATTEN_INIT 0x183
104 #define AD6676_ATTEN_CTL 0x184
105 
106 /* ADC RESET CONTROL */
107 #define AD6676_ADCRE_THRH 0x188
108 #define AD6676_ADCRE_PULSE_LEN 0x189
109 #define AD6676_ATTEN_STEP_RE 0x18A
110 #define AD6676_TIME_PER_STEP 0x18B
111 
112 /* PEAK DETECTOR AND AGC FLAG CONTROL */
113 #define AD6676_ADC_UNSTABLE 0x18F
114 #define AD6676_PKTHRH0_LSB 0x193
115 #define AD6676_PKTHRH0_MSB 0x194
116 #define AD6676_PKTHRH1_LSB 0x195
117 #define AD6676_PKTHRH1_MSB 0x196
118 #define AD6676_LOWTHRH_LSB 0x197
119 #define AD6676_LOWTHRH_MSB 0x198
120 #define AD6676_DWELL_TIME_MANTISSA 0x199
121 #define AD6676_DWELL_TIME_EXP 0x19A
122 #define AD6676_FLAG0_SEL 0x19B
123 #define AD6676_FLAG1_SEL 0x19C
124 #define AD6676_EN_FLAG 0x19E
125 
126 /* GPIO CONFIGURATION */
127 #define AD6676_FORCE_GPIO 0x1B0
128 #define AD6676_FORCE_GPIO_OUT 0x1B1
129 #define AD6676_FORCE_GPIO_VAL 0x1B2
130 #define AD6676_READ_GPO 0x1B3
131 #define AD6676_READ_GPI 0x1B4
132 
133 /* AD6676 JESD204B INTERFACE */
134 #define AD6676_DID 0x1C0
135 #define AD6676_BID 0x1C1
136 #define AD6676_L 0x1C3
137 #define AD6676_F 0x1C4
138 #define AD6676_K 0x1C5
139 #define AD6676_M 0x1C6
140 #define AD6676_S 0x1C9
141 #define AD6676_HD 0x1CA
142 #define AD6676_RES1 0x1CB
143 #define AD6676_RES2 0x1CC
144 #define AD6676_LID0 0x1D0
145 #define AD6676_LID1 0x1D1
146 #define AD6676_FCHK0 0x1D8
147 #define AD6676_FCHK1 0x1D9
148 #define AD6676_EN_LFIFO 0x1E0
149 #define AD6676_SWAP 0x1E1
150 #define AD6676_LANE_PD 0x1E2
151 #define AD6676_MIS1 0x1E3
152 #define AD6676_SYNC_PIN 0x1E4
153 #define AD6676_TEST_GEN 0x1E5
154 #define AD6676_KF_ILAS 0x1E6
155 #define AD6676_SYNCB_CTRL 0x1E7
156 #define AD6676_MIX_CTRL 0x1E8
157 #define AD6676_K_OFFSET 0x1E9
158 #define AD6676_SYSREF 0x1EA
159 #define AD6676_SER1 0x1EB
160 #define AD6676_SER2 0x1EC
161 
162 #define AD6676_CLKSYN_ENABLE 0x2A0
163 #define AD6676_CLKSYN_INT_N_LSB 0x2A1
164 #define AD6676_CLKSYN_INT_N_MSB 0x2A2
165 #define AD6676_CLKSYN_LOGEN 0x2A5
166 #define AD6676_CLKSYN_KVCO_VCO 0x2A9
167 #define AD6676_CLKSYN_VCO_BIAS 0x2AA
168 #define AD6676_CLKSYN_VCO_CAL 0x2AB
169 #define AD6676_CLKSYN_I_CP 0x2AC
170 #define AD6676_CLKSYN_CP_CAL 0x2AD
171 #define AD6676_CLKSYN_VCO_VAR 0x2B7
172 #define AD6676_CLKSYN_R_DIV 0x2BB
173 #define AD6676_CLKSYN_STATUS 0x2BC
174 #define AD6676_JESDSYN_STATUS 0x2DC
175 
176 #define AD6676_SHUFFLE_THREG0 0x342
177 #define AD6676_SHUFFLE_THREG1 0x343
178 
179 /*
180  * AD6676_SPI_CONFIG
181  */
182 
183 #define SPI_CONF_SW_RESET (0x81)
184 #define SPI_CONF_SDIO_DIR (0x18)
185 
186 
187 /*
188  * AD6676_CLKSYN_STATUS, AD6676_JESDSYN_STATUS
189  */
190 #define SYN_STAT_PLL_LCK (1 << 3)
191 #define SYN_STAT_VCO_CAL_BUSY (1 << 1)
192 #define SYN_STAT_CP_CAL_DONE (1 << 0)
193 
194 /*
195  * AD6676_DP_CTRL
196  */
197 #define DP_CTRL_OFFSET_BINARY (1 << 0)
198 #define DP_CTRL_TWOS_COMPLEMENT (0 << 0)
199 
200 /*
201  * AD6676_TEST_GEN
202  */
203 #define TESTGENMODE_OFF 0x0
204 #define TESTGENMODE_ALT_CHECKERBOARD 0x1
205 #define TESTGENMODE_ONE_ZERO_TOGGLE 0x2
206 #define TESTGENMODE_PN23_SEQ 0x3
207 #define TESTGENMODE_PN9_SEQ 0x4
208 #define TESTGENMODE_REP_USER_PAT 0x5
209 #define TESTGENMODE_SING_USER_PAT 0x6
210 #define TESTGENMODE_RAMP 0x7
211 #define TESTGENMODE_MOD_RPAT 0x8
212 #define TESTGENMODE_JSPAT 0x10
213 #define TESTGENMODE_JTSPAT 0x11
214 
215 /*
216  * AD6676_CLKSYN_R_DIV
217  */
218 
219 #define R_DIV(x) ((x) << 6)
220 #define CLKSYN_R_DIV_SYSREF_CTRL (1 << 3)
221 #define CLKSYN_R_DIV_CLKIN_IMPED (1 << 2)
222 #define CLKSYN_R_DIV_RESERVED 0x31
223 
224 /*
225  * AD6676_CLKSYN_ENABLE
226  */
227 #define EN_EXT_CK (1 << 7)
228 #define EN_ADC_CK (1 << 6)
229 #define EN_SYNTH (1 << 5)
230 #define EN_VCO_PTAT (1 << 4)
231 #define EN_VCO_ALC (1 << 3)
232 #define EN_VCO (1 << 2)
233 #define EN_OVER_IDE_CAL (1 << 1)
234 #define EN_OVER_IDE (1 << 0)
235 
236 /*
237  * AD6676_CLKSYN_LOGEN
238  */
239 
240 #define RESET_CAL (1 << 3)
241 
242 /*
243  * AD6676_CLKSYN_VCO_CAL
244  */
245 
246 #define INIT_ALC_VALUE(x) ((x) << 4)
247 #define ALC_DIS (1 << 3)
248 
249 /*
250  * AD6676_CLKSYN_CP_CAL
251  */
252 #define CP_CAL_EN (1 << 7)
253 
254 /*
255  * AD6676_DEC_MODE
256  */
257 
258 #define DEC_32 1
259 #define DEC_24 2
260 #define DEC_16 3
261 #define DEC_12 4
262 
263 /*
264  * AD6676_CAL_CMD
265  */
266 
267 #define XCMD3 (1 << 7)
268 #define XCMD2 (1 << 6)
269 #define XCMD1 (1 << 5)
270 #define XCMD0 (1 << 4)
271 #define RESON1_CAL (1 << 3)
272 #define FLASH_CAL (1 << 2)
273 #define INIT_ADC (1 << 1)
274 #define TUNE_ADC (1 << 0)
275 
276 /*
277  * AD6676_SYNCB_CTRL
278  */
279 #define PD_SYSREF_RX (1 << 3)
280 #define LVDS_SYNCB (1 << 2)
281 
282 /* AD6676_L */
283 #define SCR (1 << 7)
284 
285 /* AD6676_FORCE_END_CAL */
286 #define FORCE_END_CAL (1 << 0)
287 
288 /* AD6676_CAL_DONE */
289 #define CAL_DONE (1 << 0)
290 
291 #define MHz 1000000UL
292 #define MIN_FADC 2000000000ULL /* SPS */
293 #define MIN_FADC_INT_SYNTH 2925000000ULL /* SPS REVISIT */
294 #define MAX_FADC 3200000000ULL /* SPS */
295 
296 #define MIN_FIF 70000000ULL /* Hz */
297 #define MAX_FIF 450000000ULL /* Hz */
298 
299 #define MIN_BW 20000000ULL /* Hz */
300 #define MAX_BW 160000000ULL /* Hz */
301 
302 #define CHIP_ID1_AD6676 0x03
303 #define CHIP_ID0_AD6676 0xBB
304 
306  uint32_t ref_clk; // reference_clk rate Hz
307  uint32_t f_adc_hz; // adc frequency Hz
308  uint32_t f_if_hz; // intermediate frequency hz
309  uint32_t bw_hz; // bandwidth Hz;
313  uint8_t decimation; // decimation
314  uint8_t ext_l; // external inductance l_nh
315  uint8_t attenuation; //
316  uint8_t scale; // fullscale adjust
317  uint8_t use_extclk; // use external clk enable
318  uint8_t spi3wire; // set device spi intereface 3/4 wires
319  // shuffle
320  uint8_t shuffle_ctrl; // shuffler control
321  uint8_t shuffle_thresh; // shuffler threshold
322  // jesd
323  uint8_t scrambling_en; // jesd_scrambling_enable
324  uint8_t lvds_syncb; // jesd_use_lvds_syncb_enable
325  uint8_t sysref_pd; // jesd_powerdown_sysref_enable
326  uint8_t n_lanes; // lanes
328  uint64_t m;
329  /* SPI */
331 };
332 
333 struct ad6676_dev {
334  /* SPI */
336 };
337 
338 /******************************************************************************/
339 /************************ Functions Declarations ******************************/
340 /******************************************************************************/
341 /* SPI read from device. */
342 int32_t ad6676_spi_read(struct ad6676_dev *dev,
343  uint16_t reg_addr,
344  uint8_t *reg_data);
345 
346 /* SPI write to device. */
347 int32_t ad6676_spi_write(struct ad6676_dev *dev,
348  uint16_t reg_addr,
349  uint8_t reg_data);
350 
351 /* Initialize the device. */
352 int32_t ad6676_setup(struct ad6676_dev **device,
354 
355 /* Reconfigure device for other target frequency and bandwidth and
356  * recalibrate. */
357 int32_t ad6676_update(struct ad6676_dev *dev,
358  struct ad6676_init_param *init_param);
359 
360 /* Set attenuation in decibels or disable attenuator. */
361 int32_t ad6676_set_attenuation(struct ad6676_dev *dev,
362  struct ad6676_init_param *init_param);
363 
364 /* Set the target IF frequency. */
365 int32_t ad6676_set_fif(struct ad6676_dev *dev,
366  struct ad6676_init_param *init_param);
367 
368 /* Get the target IF frequency. */
369 uint64_t ad6676_get_fif(struct ad6676_dev *dev,
370  struct ad6676_init_param *init_param);
371 
372 /* Perform an interface test. */
373 int32_t ad6676_test(struct ad6676_dev *dev,
374  uint32_t test_mode);
375 #endif
DP_CTRL_TWOS_COMPLEMENT
#define DP_CTRL_TWOS_COMPLEMENT
Definition: ad6676.h:198
AD6676_LEXT
#define AD6676_LEXT
Definition: ad6676.h:71
DEC_16
#define DEC_16
Definition: ad6676.h:260
AD6676_DEC_MODE
#define AD6676_DEC_MODE
Definition: ad6676.h:85
ad6676_test
int32_t ad6676_test(struct ad6676_dev *dev, uint32_t test_mode)
Perform an interface test.
Definition: ad6676.c:787
AD6676_BID
#define AD6676_BID
Definition: ad6676.h:135
AD6676_L
#define AD6676_L
Definition: ad6676.h:136
SCR
#define SCR
Definition: ad6676.h:283
no_os_min_t
#define no_os_min_t(type, x, y)
Definition: no_os_util.h:65
ad6676_dev
Definition: ad6676.h:333
AD6676_FADC_0
#define AD6676_FADC_0
Definition: ad6676.h:65
ad6676_init_param::f_adc_hz
uint32_t f_adc_hz
Definition: ad6676.h:307
AD6676_M
#define AD6676_M
Definition: ad6676.h:139
AD6676_ATTEN_VALUE_PIN1
#define AD6676_ATTEN_VALUE_PIN1
Definition: ad6676.h:102
FLASH_CAL
@ FLASH_CAL
Definition: t_mykonos.h:828
ad6676_spi_write
int32_t ad6676_spi_write(struct ad6676_dev *dev, uint16_t reg_addr, uint8_t reg_data)
SPI write to device.
Definition: ad6676.c:83
PD_SYSREF_RX
#define PD_SYSREF_RX
Definition: ad6676.h:279
ad6676_init_param::scrambling_en
uint8_t scrambling_en
Definition: ad6676.h:323
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
DEC_24
#define DEC_24
Definition: ad6676.h:259
ad6676_init_param::bw_margin_high_mhz
uint8_t bw_margin_high_mhz
Definition: ad6676.h:311
ad6676_init_param::decimation
uint8_t decimation
Definition: ad6676.h:313
no_os_spi.h
Header file of SPI Interface.
AD6676_MRGN_L
#define AD6676_MRGN_L
Definition: ad6676.h:72
ad6676_init_param::use_extclk
uint8_t use_extclk
Definition: ad6676.h:317
EN_SYNTH
#define EN_SYNTH
Definition: ad6676.h:229
ad6676_init_param::scale
uint8_t scale
Definition: ad6676.h:316
EN_EXT_CK
#define EN_EXT_CK
Definition: ad6676.h:227
INIT_ALC_VALUE
#define INIT_ALC_VALUE(x)
Definition: ad6676.h:246
no_os_delay.h
Header file of Delay functions.
AD6676_CLKSYN_STATUS
#define AD6676_CLKSYN_STATUS
Definition: ad6676.h:173
AD6676_SPI_CONFIG
#define AD6676_SPI_CONFIG
Definition: ad6676.h:54
ad6676_init_param::lvds_syncb
uint8_t lvds_syncb
Definition: ad6676.h:324
AD6676_CAL_CMD
#define AD6676_CAL_CMD
Definition: ad6676.h:79
SYN_STAT_PLL_LCK
#define SYN_STAT_PLL_LCK
Definition: ad6676.h:190
ad6676_set_attenuation
int32_t ad6676_set_attenuation(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Set attenuation in decibels or disable attenuator.
Definition: ad6676.c:616
device
Definition: ad9361_util.h:75
ad6676_spi_read
int32_t ad6676_spi_read(struct ad6676_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
SPI read from device.
Definition: ad6676.c:57
ad6676_init_param::shuffle_thresh
uint8_t shuffle_thresh
Definition: ad6676.h:321
ad6676_get_fif
uint64_t ad6676_get_fif(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Get the target IF frequency.
Definition: ad6676.c:209
AD6676_DID
#define AD6676_DID
Definition: ad6676.h:134
AD6676_SER2
#define AD6676_SER2
Definition: ad6676.h:160
AD6676_ATTEN_VALUE_PIN0
#define AD6676_ATTEN_VALUE_PIN0
Definition: ad6676.h:101
SPI_CONF_SW_RESET
#define SPI_CONF_SW_RESET
Definition: ad6676.h:183
AD6676_MRGN_IF
#define AD6676_MRGN_IF
Definition: ad6676.h:74
ad6676_init_param::bw_margin_low_mhz
uint8_t bw_margin_low_mhz
Definition: ad6676.h:310
XCMD0
#define XCMD0
Definition: ad6676.h:270
CP_CAL_EN
#define CP_CAL_EN
Definition: ad6676.h:252
AD6676_F
#define AD6676_F
Definition: ad6676.h:137
EN_VCO
#define EN_VCO
Definition: ad6676.h:232
AD6676_CHIP_ID0
#define AD6676_CHIP_ID0
Definition: ad6676.h:57
AD6676_DP_CTRL
#define AD6676_DP_CTRL
Definition: ad6676.h:91
MIN_FIF
#define MIN_FIF
Definition: ad6676.h:296
DEC_32
#define DEC_32
Definition: ad6676.h:258
no_os_do_div
uint64_t no_os_do_div(uint64_t *n, uint64_t base)
ad6676_set_attenuation
int32_t ad6676_set_attenuation(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Set attenuation in decibels or disable attenuator.
Definition: ad6676.c:616
ad6676_init_param::shuffle_ctrl
uint8_t shuffle_ctrl
Definition: ad6676.h:320
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: delay.c:130
AD6676_CLKSYN_CP_CAL
#define AD6676_CLKSYN_CP_CAL
Definition: ad6676.h:170
CLKSYN_R_DIV_RESERVED
#define CLKSYN_R_DIV_RESERVED
Definition: ad6676.h:222
INIT_ADC
#define INIT_ADC
Definition: ad6676.h:273
ad6676_init_param::bw_margin_if_mhz
int8_t bw_margin_if_mhz
Definition: ad6676.h:312
ad6676_shuffle_setup
int32_t ad6676_shuffle_setup(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Setup shuffling rate and threshold for the adaptive shuffler.
Definition: ad6676.c:504
AD6676_MIX2_TUNING
#define AD6676_MIX2_TUNING
Definition: ad6676.h:87
DEC_12
#define DEC_12
Definition: ad6676.h:261
ad6676_init_param::attenuation
uint8_t attenuation
Definition: ad6676.h:315
RESON1_CAL
#define RESON1_CAL
Definition: ad6676.h:271
ad6676_update
int32_t ad6676_update(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Reconfigure device for other target frequency and bandwidth and recalibrate.
Definition: ad6676.c:739
ad6676_test
int32_t ad6676_test(struct ad6676_dev *dev, uint32_t test_mode)
Perform an interface test.
Definition: ad6676.c:787
TESTGENMODE_OFF
#define TESTGENMODE_OFF
Definition: ad6676.h:203
AD6676_CLKSYN_LOGEN
#define AD6676_CLKSYN_LOGEN
Definition: ad6676.h:165
ad6676_init_param::m
uint64_t m
Definition: ad6676.h:328
AD6676_FIF_0
#define AD6676_FIF_0
Definition: ad6676.h:67
ad6676_spi_read
int32_t ad6676_spi_read(struct ad6676_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
SPI read from device.
Definition: ad6676.c:57
AD6676_XSCALE_1
#define AD6676_XSCALE_1
Definition: ad6676.h:75
ad6676_get_fif
uint64_t ad6676_get_fif(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Get the target IF frequency.
Definition: ad6676.c:209
CAL_DONE
#define CAL_DONE
Definition: ad6676.h:289
ad6676_init_param::ref_clk
uint32_t ref_clk
Definition: ad6676.h:306
ad6676_dev::spi_desc
no_os_spi_desc * spi_desc
Definition: ad6676.h:335
TUNE_ADC
#define TUNE_ADC
Definition: ad6676.h:274
SPI_CONF_SDIO_DIR
#define SPI_CONF_SDIO_DIR
Definition: ad6676.h:184
AD6676_CLKSYN_ENABLE
#define AD6676_CLKSYN_ENABLE
Definition: ad6676.h:162
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
ad6676_init_param::n_lanes
uint8_t n_lanes
Definition: ad6676.h:326
no_os_clamp
#define no_os_clamp(val, min_val, max_val)
Definition: no_os_util.h:73
SYN_STAT_CP_CAL_DONE
#define SYN_STAT_CP_CAL_DONE
Definition: ad6676.h:192
ad6676_init_param::sysref_pd
uint8_t sysref_pd
Definition: ad6676.h:325
MHz
#define MHz
Definition: ad6676.h:291
CLKSYN_R_DIV_CLKIN_IMPED
#define CLKSYN_R_DIV_CLKIN_IMPED
Definition: ad6676.h:221
AD6676_S
#define AD6676_S
Definition: ad6676.h:140
ad6676_init_param::f_if_hz
uint32_t f_if_hz
Definition: ad6676.h:308
AD6676_CLKSYN_VCO_BIAS
#define AD6676_CLKSYN_VCO_BIAS
Definition: ad6676.h:167
no_os_clamp_t
#define no_os_clamp_t(type, val, min_val, max_val)
Definition: no_os_util.h:75
EN_VCO_PTAT
#define EN_VCO_PTAT
Definition: ad6676.h:230
ad6676_update
int32_t ad6676_update(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Reconfigure device for other target frequency and bandwidth and recalibrate.
Definition: ad6676.c:739
AD6676_CLKSYN_INT_N_LSB
#define AD6676_CLKSYN_INT_N_LSB
Definition: ad6676.h:163
AD6676_SHUFFLE_THREG0
#define AD6676_SHUFFLE_THREG0
Definition: ad6676.h:176
ad6676_spi_write
int32_t ad6676_spi_write(struct ad6676_dev *dev, uint16_t reg_addr, uint8_t reg_data)
SPI write to device.
Definition: ad6676.c:83
R_DIV
#define R_DIV(x)
Definition: ad6676.h:219
ad6676_init_param::spi3wire
uint8_t spi3wire
Definition: ad6676.h:318
LVDS_SYNCB
#define LVDS_SYNCB
Definition: ad6676.h:280
AD6676_TEST_GEN
#define AD6676_TEST_GEN
Definition: ad6676.h:153
AD6676_CLKSYN_VCO_VAR
#define AD6676_CLKSYN_VCO_VAR
Definition: ad6676.h:171
CHIP_ID0_AD6676
#define CHIP_ID0_AD6676
Definition: ad6676.h:303
EN_VCO_ALC
#define EN_VCO_ALC
Definition: ad6676.h:231
AD6676_CLKSYN_R_DIV
#define AD6676_CLKSYN_R_DIV
Definition: ad6676.h:172
ad6676_init_param::ext_l
uint8_t ext_l
Definition: ad6676.h:314
ad6676_init_param::frames_per_multiframe
uint8_t frames_per_multiframe
Definition: ad6676.h:327
RESET_CAL
#define RESET_CAL
Definition: ad6676.h:240
XCMD1
#define XCMD1
Definition: ad6676.h:269
AD6676_MRGN_U
#define AD6676_MRGN_U
Definition: ad6676.h:73
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
MIN_FADC
#define MIN_FADC
Definition: ad6676.h:292
EN_ADC_CK
#define EN_ADC_CK
Definition: ad6676.h:228
SYN_STAT_VCO_CAL_BUSY
#define SYN_STAT_VCO_CAL_BUSY
Definition: ad6676.h:191
ad6676_init_param::spi_init
no_os_spi_init_param spi_init
Definition: ad6676.h:330
MIN_FADC_INT_SYNTH
#define MIN_FADC_INT_SYNTH
Definition: ad6676.h:293
AD6676_BW_0
#define AD6676_BW_0
Definition: ad6676.h:69
CLKSYN_R_DIV_SYSREF_CTRL
#define CLKSYN_R_DIV_SYSREF_CTRL
Definition: ad6676.h:220
MAX_FIF
#define MAX_FIF
Definition: ad6676.h:297
AD6676_MIX1_TUNING
#define AD6676_MIX1_TUNING
Definition: ad6676.h:86
AD6676_CLKSYN_KVCO_VCO
#define AD6676_CLKSYN_KVCO_VCO
Definition: ad6676.h:166
AD6676_SYNCB_CTRL
#define AD6676_SYNCB_CTRL
Definition: ad6676.h:155
MAX_BW
#define MAX_BW
Definition: ad6676.h:300
ad6676_setup
int32_t ad6676_setup(struct ad6676_dev **device, struct ad6676_init_param init_param)
Initialize the device.
Definition: ad6676.c:637
AD6676_FORCE_END_CAL
#define AD6676_FORCE_END_CAL
Definition: ad6676.h:82
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
MAX_FADC
#define MAX_FADC
Definition: ad6676.h:294
ad6676_init_param::bw_hz
uint32_t bw_hz
Definition: ad6676.h:309
ad6676.h
Header file of AD6676 Driver.
no_os_util.h
Implementation of utility functions.
MIN_BW
#define MIN_BW
Definition: ad6676.h:299
AD6676_CLKSYN_VCO_CAL
#define AD6676_CLKSYN_VCO_CAL
Definition: ad6676.h:168
ad6676_setup
int32_t ad6676_setup(struct ad6676_dev **device, struct ad6676_init_param init_param)
Initialize the device.
Definition: ad6676.c:637
ad6676_set_fif
int32_t ad6676_set_fif(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Set the target IF frequency.
Definition: ad6676.c:193
AD6676_K
#define AD6676_K
Definition: ad6676.h:138
FORCE_END_CAL
#define FORCE_END_CAL
Definition: ad6676.h:286
EN_OVER_IDE
#define EN_OVER_IDE
Definition: ad6676.h:234
ad6676_set_fif
int32_t ad6676_set_fif(struct ad6676_dev *dev, struct ad6676_init_param *init_param)
Set the target IF frequency.
Definition: ad6676.c:193
ad6676_init_param
Definition: ad6676.h:305
AD6676_CAL_DONE
#define AD6676_CAL_DONE
Definition: ad6676.h:80
AD6676_CLKSYN_I_CP
#define AD6676_CLKSYN_I_CP
Definition: ad6676.h:169
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
AD6676_JESDSYN_STATUS
#define AD6676_JESDSYN_STATUS
Definition: ad6676.h:174