no-OS
Classes | Macros | Enumerations | Functions
ad7124.h File Reference

AD7124 header file. Devices AD7124-4, AD7124-8. More...

#include <stdint.h>
#include "no-os/spi.h"
#include "no-os/delay.h"
Include dependency graph for ad7124.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes

struct  ad7124_st_reg
 
struct  ad7124_dev
 
struct  ad7124_init_param
 

Macros

#define AD7124_RW   1 /* Read and Write */
 
#define AD7124_R   2 /* Read only */
 
#define AD7124_W   3 /* Write only */
 
#define AD7124_COMM_REG   0x00
 
#define AD7124_STATUS_REG   0x00
 
#define AD7124_ADC_CTRL_REG   0x01
 
#define AD7124_DATA_REG   0x02
 
#define AD7124_IO_CTRL1_REG   0x03
 
#define AD7124_IO_CTRL2_REG   0x04
 
#define AD7124_ID_REG   0x05
 
#define AD7124_ERR_REG   0x06
 
#define AD7124_ERREN_REG   0x07
 
#define AD7124_CH0_MAP_REG   0x09
 
#define AD7124_CH1_MAP_REG   0x0A
 
#define AD7124_CH2_MAP_REG   0x0B
 
#define AD7124_CH3_MAP_REG   0x0C
 
#define AD7124_CH4_MAP_REG   0x0D
 
#define AD7124_CH5_MAP_REG   0x0E
 
#define AD7124_CH6_MAP_REG   0x0F
 
#define AD7124_CH7_MAP_REG   0x10
 
#define AD7124_CH8_MAP_REG   0x11
 
#define AD7124_CH9_MAP_REG   0x12
 
#define AD7124_CH10_MAP_REG   0x13
 
#define AD7124_CH11_MAP_REG   0x14
 
#define AD7124_CH12_MAP_REG   0x15
 
#define AD7124_CH13_MAP_REG   0x16
 
#define AD7124_CH14_MAP_REG   0x17
 
#define AD7124_CH15_MAP_REG   0x18
 
#define AD7124_CFG0_REG   0x19
 
#define AD7124_CFG1_REG   0x1A
 
#define AD7124_CFG2_REG   0x1B
 
#define AD7124_CFG3_REG   0x1C
 
#define AD7124_CFG4_REG   0x1D
 
#define AD7124_CFG5_REG   0x1E
 
#define AD7124_CFG6_REG   0x1F
 
#define AD7124_CFG7_REG   0x20
 
#define AD7124_FILT0_REG   0x21
 
#define AD7124_FILT1_REG   0x22
 
#define AD7124_FILT2_REG   0x23
 
#define AD7124_FILT3_REG   0x24
 
#define AD7124_FILT4_REG   0x25
 
#define AD7124_FILT5_REG   0x26
 
#define AD7124_FILT6_REG   0x27
 
#define AD7124_FILT7_REG   0x28
 
#define AD7124_OFFS0_REG   0x29
 
#define AD7124_OFFS1_REG   0x2A
 
#define AD7124_OFFS2_REG   0x2B
 
#define AD7124_OFFS3_REG   0x2C
 
#define AD7124_OFFS4_REG   0x2D
 
#define AD7124_OFFS5_REG   0x2E
 
#define AD7124_OFFS6_REG   0x2F
 
#define AD7124_OFFS7_REG   0x30
 
#define AD7124_GAIN0_REG   0x31
 
#define AD7124_GAIN1_REG   0x32
 
#define AD7124_GAIN2_REG   0x33
 
#define AD7124_GAIN3_REG   0x34
 
#define AD7124_GAIN4_REG   0x35
 
#define AD7124_GAIN5_REG   0x36
 
#define AD7124_GAIN6_REG   0x37
 
#define AD7124_GAIN7_REG   0x38
 
#define AD7124_COMM_REG_WEN   (0 << 7)
 
#define AD7124_COMM_REG_WR   (0 << 6)
 
#define AD7124_COMM_REG_RD   (1 << 6)
 
#define AD7124_COMM_REG_RA(x)   ((x) & 0x3F)
 
#define AD7124_STATUS_REG_RDY   (1 << 7)
 
#define AD7124_STATUS_REG_ERROR_FLAG   (1 << 6)
 
#define AD7124_STATUS_REG_POR_FLAG   (1 << 4)
 
#define AD7124_STATUS_REG_CH_ACTIVE(x)   ((x) & 0xF)
 
#define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL   (1 << 12)
 
#define AD7124_ADC_CTRL_REG_CONT_READ   (1 << 11)
 
#define AD7124_ADC_CTRL_REG_DATA_STATUS   (1 << 10)
 
#define AD7124_ADC_CTRL_REG_CS_EN   (1 << 9)
 
#define AD7124_ADC_CTRL_REG_REF_EN   (1 << 8)
 
#define AD7124_ADC_CTRL_REG_POWER_MODE(x)   (((x) & 0x3) << 6)
 
#define AD7124_ADC_CTRL_REG_MODE(x)   (((x) & 0xF) << 2)
 
#define AD7124_ADC_CTRL_REG_CLK_SEL(x)   (((x) & 0x3) << 0)
 
#define AD7124_IO_CTRL1_REG_GPIO_DAT2   (1 << 23)
 
#define AD7124_IO_CTRL1_REG_GPIO_DAT1   (1 << 22)
 
#define AD7124_IO_CTRL1_REG_GPIO_CTRL2   (1 << 19)
 
#define AD7124_IO_CTRL1_REG_GPIO_CTRL1   (1 << 18)
 
#define AD7124_IO_CTRL1_REG_PDSW   (1 << 15)
 
#define AD7124_IO_CTRL1_REG_IOUT1(x)   (((x) & 0x7) << 11)
 
#define AD7124_IO_CTRL1_REG_IOUT0(x)   (((x) & 0x7) << 8)
 
#define AD7124_IO_CTRL1_REG_IOUT_CH1(x)   (((x) & 0xF) << 4)
 
#define AD7124_IO_CTRL1_REG_IOUT_CH0(x)   (((x) & 0xF) << 0)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_DAT4   (1 << 23)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_DAT3   (1 << 22)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_DAT2   (1 << 21)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_DAT1   (1 << 20)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4   (1 << 19)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3   (1 << 18)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2   (1 << 17)
 
#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1   (1 << 16)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS7   (1 << 15)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS6   (1 << 14)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS5   (1 << 11)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS4   (1 << 10)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS3   (1 << 5)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS2   (1 << 4)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS1   (1 << 1)
 
#define AD7124_IO_CTRL2_REG_GPIO_VBIAS0   (1 << 0)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15   (1 << 15)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14   (1 << 14)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13   (1 << 13)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12   (1 << 12)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11   (1 << 11)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10   (1 << 10)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9   (1 << 9)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8   (1 << 8)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7   (1 << 7)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6   (1 << 6)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5   (1 << 5)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4   (1 << 4)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3   (1 << 3)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2   (1 << 2)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1   (1 << 1)
 
#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0   (1 << 0)
 
#define AD7124_ID_REG_DEVICE_ID(x)   (((x) & 0xF) << 4)
 
#define AD7124_ID_REG_SILICON_REV(x)   (((x) & 0xF) << 0)
 
#define AD7124_ERR_REG_LDO_CAP_ERR   (1 << 19)
 
#define AD7124_ERR_REG_ADC_CAL_ERR   (1 << 18)
 
#define AD7124_ERR_REG_ADC_CONV_ERR   (1 << 17)
 
#define AD7124_ERR_REG_ADC_SAT_ERR   (1 << 16)
 
#define AD7124_ERR_REG_AINP_OV_ERR   (1 << 15)
 
#define AD7124_ERR_REG_AINP_UV_ERR   (1 << 14)
 
#define AD7124_ERR_REG_AINM_OV_ERR   (1 << 13)
 
#define AD7124_ERR_REG_AINM_UV_ERR   (1 << 12)
 
#define AD7124_ERR_REG_REF_DET_ERR   (1 << 11)
 
#define AD7124_ERR_REG_DLDO_PSM_ERR   (1 << 9)
 
#define AD7124_ERR_REG_ALDO_PSM_ERR   (1 << 7)
 
#define AD7124_ERR_REG_SPI_IGNORE_ERR   (1 << 6)
 
#define AD7124_ERR_REG_SPI_SLCK_CNT_ERR   (1 << 5)
 
#define AD7124_ERR_REG_SPI_READ_ERR   (1 << 4)
 
#define AD7124_ERR_REG_SPI_WRITE_ERR   (1 << 3)
 
#define AD7124_ERR_REG_SPI_CRC_ERR   (1 << 2)
 
#define AD7124_ERR_REG_MM_CRC_ERR   (1 << 1)
 
#define AD7124_ERR_REG_ROM_CRC_ERR   (1 << 0)
 
#define AD7124_ERREN_REG_MCLK_CNT_EN   (1 << 22)
 
#define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN   (1 << 21)
 
#define AD7124_ERREN_REG_LDO_CAP_CHK(x)   (((x) & 0x3) << 19)
 
#define AD7124_ERREN_REG_ADC_CAL_ERR_EN   (1 << 18)
 
#define AD7124_ERREN_REG_ADC_CONV_ERR_EN   (1 << 17)
 
#define AD7124_ERREN_REG_ADC_SAT_ERR_EN   (1 << 16)
 
#define AD7124_ERREN_REG_AINP_OV_ERR_EN   (1 << 15)
 
#define AD7124_ERREN_REG_AINP_UV_ERR_EN   (1 << 14)
 
#define AD7124_ERREN_REG_AINM_OV_ERR_EN   (1 << 13)
 
#define AD7124_ERREN_REG_AINM_UV_ERR_EN   (1 << 12)
 
#define AD7124_ERREN_REG_REF_DET_ERR_EN   (1 << 11)
 
#define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN   (1 << 10)
 
#define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR   (1 << 9)
 
#define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN   (1 << 8)
 
#define AD7124_ERREN_REG_ALDO_PSM_ERR_EN   (1 << 7)
 
#define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN   (1 << 6)
 
#define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN   (1 << 5)
 
#define AD7124_ERREN_REG_SPI_READ_ERR_EN   (1 << 4)
 
#define AD7124_ERREN_REG_SPI_WRITE_ERR_EN   (1 << 3)
 
#define AD7124_ERREN_REG_SPI_CRC_ERR_EN   (1 << 2)
 
#define AD7124_ERREN_REG_MM_CRC_ERR_EN   (1 << 1)
 
#define AD7124_ERREN_REG_ROM_CRC_ERR_EN   (1 << 0)
 
#define AD7124_CH_MAP_REG_CH_ENABLE   (1 << 15)
 
#define AD7124_CH_MAP_REG_SETUP(x)   (((x) & 0x7) << 12)
 
#define AD7124_CH_MAP_REG_AINP(x)   (((x) & 0x1F) << 5)
 
#define AD7124_CH_MAP_REG_AINM(x)   (((x) & 0x1F) << 0)
 
#define AD7124_CFG_REG_BIPOLAR   (1 << 11)
 
#define AD7124_CFG_REG_BURNOUT(x)   (((x) & 0x3) << 9)
 
#define AD7124_CFG_REG_REF_BUFP   (1 << 8)
 
#define AD7124_CFG_REG_REF_BUFM   (1 << 7)
 
#define AD7124_CFG_REG_AIN_BUFP   (1 << 6)
 
#define AD7124_CFG_REG_AINN_BUFM   (1 << 5)
 
#define AD7124_CFG_REG_REF_SEL(x)   ((x) & 0x3) << 3
 
#define AD7124_CFG_REG_PGA(x)   (((x) & 0x7) << 0)
 
#define AD7124_FILT_REG_FILTER(x)   (((x) & 0x7) << 21)
 
#define AD7124_FILT_REG_REJ60   (1 << 20)
 
#define AD7124_FILT_REG_POST_FILTER(x)   (((x) & 0x7) << 17)
 
#define AD7124_FILT_REG_SINGLE_CYCLE   (1 << 16)
 
#define AD7124_FILT_REG_FS(x)   (((x) & 0x7FF) << 0)
 
#define AD7124_CRC8_POLYNOMIAL_REPRESENTATION   0x07 /* x8 + x2 + x + 1 */
 
#define AD7124_DISABLE_CRC   0
 
#define AD7124_USE_CRC   1
 

Enumerations

enum  ad7124_registers {
  AD7124_Status = 0x00,
  AD7124_ADC_Control,
  AD7124_Data,
  AD7124_IOCon1,
  AD7124_IOCon2,
  AD7124_ID,
  AD7124_Error,
  AD7124_Error_En,
  AD7124_Mclk_Count,
  AD7124_Channel_0,
  AD7124_Channel_1,
  AD7124_Channel_2,
  AD7124_Channel_3,
  AD7124_Channel_4,
  AD7124_Channel_5,
  AD7124_Channel_6,
  AD7124_Channel_7,
  AD7124_Channel_8,
  AD7124_Channel_9,
  AD7124_Channel_10,
  AD7124_Channel_11,
  AD7124_Channel_12,
  AD7124_Channel_13,
  AD7124_Channel_14,
  AD7124_Channel_15,
  AD7124_Config_0,
  AD7124_Config_1,
  AD7124_Config_2,
  AD7124_Config_3,
  AD7124_Config_4,
  AD7124_Config_5,
  AD7124_Config_6,
  AD7124_Config_7,
  AD7124_Filter_0,
  AD7124_Filter_1,
  AD7124_Filter_2,
  AD7124_Filter_3,
  AD7124_Filter_4,
  AD7124_Filter_5,
  AD7124_Filter_6,
  AD7124_Filter_7,
  AD7124_Offset_0,
  AD7124_Offset_1,
  AD7124_Offset_2,
  AD7124_Offset_3,
  AD7124_Offset_4,
  AD7124_Offset_5,
  AD7124_Offset_6,
  AD7124_Offset_7,
  AD7124_Gain_0,
  AD7124_Gain_1,
  AD7124_Gain_2,
  AD7124_Gain_3,
  AD7124_Gain_4,
  AD7124_Gain_5,
  AD7124_Gain_6,
  AD7124_Gain_7,
  AD7124_REG_NO
}
 

Functions

int32_t ad7124_read_register (struct ad7124_dev *dev, struct ad7124_st_reg *p_reg)
 Reads the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the read operation will be executed without checking the device state. DEPRECATED, use ad7124_read_register2. More...
 
int32_t ad7124_read_register2 (struct ad7124_dev *dev, uint32_t reg, uint32_t *readval)
 Wrap the read register function to give it a modern signature. More...
 
int32_t ad7124_write_register (struct ad7124_dev *dev, struct ad7124_st_reg reg)
 Writes the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the write operation will be executed without checking the device state. DEPRECATED, use ad7124_write_register2. More...
 
int32_t ad7124_write_register2 (struct ad7124_dev *dev, uint32_t reg, uint32_t writeval)
 Wrap the write register function to give it a modern signature. More...
 
int32_t ad7124_no_check_read_register (struct ad7124_dev *dev, struct ad7124_st_reg *p_reg)
 Reads the value of the specified register without checking if the device is ready to accept user requests. More...
 
int32_t ad7124_no_check_write_register (struct ad7124_dev *dev, struct ad7124_st_reg reg)
 Writes the value of the specified register without checking if the device is ready to accept user requests. More...
 
int32_t ad7124_reset (struct ad7124_dev *dev)
 Resets the device. More...
 
int32_t ad7124_wait_for_spi_ready (struct ad7124_dev *dev, uint32_t timeout)
 Waits until the device can accept read and write user actions. More...
 
int32_t ad7124_wait_to_power_on (struct ad7124_dev *dev, uint32_t timeout)
 Waits until the device finishes the power-on reset operation. More...
 
int32_t ad7124_wait_for_conv_ready (struct ad7124_dev *dev, uint32_t timeout)
 Waits until a new conversion result is available. More...
 
int32_t ad7124_read_data (struct ad7124_dev *dev, int32_t *p_data)
 Reads the conversion result from the device. More...
 
int32_t ad7124_get_read_chan_id (struct ad7124_dev *dev, uint32_t *status)
 Get the ID of the channel of the latest conversion. More...
 
uint8_t ad7124_compute_crc8 (uint8_t *p_buf, uint8_t buf_size)
 Computes the CRC checksum for a data buffer. More...
 
void ad7124_update_crcsetting (struct ad7124_dev *dev)
 Updates the CRC settings. More...
 
void ad7124_update_dev_spi_settings (struct ad7124_dev *dev)
 Updates the device SPI interface settings. More...
 
int32_t ad7124_fclk_get (struct ad7124_dev *dev, float *f_clk)
 Get the AD7124 reference clock. More...
 
int32_t ad7124_fltcoff_get (struct ad7124_dev *dev, int16_t ch_no, uint16_t *flt_coff)
 Get the filter coefficient for the sample rate. More...
 
float ad7124_get_odr (struct ad7124_dev *dev, int16_t ch_no)
 Calculate ODR of the device. More...
 
int32_t ad7124_set_odr (struct ad7124_dev *dev, float odr, int16_t ch_no)
 Set ODR of the device. More...
 
int32_t ad7124_setup (struct ad7124_dev **device, struct ad7124_init_param *init_param)
 Initializes the AD7124. More...
 
int32_t ad7124_remove (struct ad7124_dev *dev)
 Free the resources allocated by AD7124_Setup(). More...
 

Detailed Description

AD7124 header file. Devices AD7124-4, AD7124-8.

Copyright 2015-2019(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL1

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1   (1 << 16)

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL2

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2   (1 << 17)

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL3

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3   (1 << 18)

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL4

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4   (1 << 19)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT1

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT1   (1 << 20)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT2

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT2   (1 << 21)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT3

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT3   (1 << 22)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT4

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT4   (1 << 23)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0   (1 << 0)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1   (1 << 1)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10   (1 << 10)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11   (1 << 11)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12   (1 << 12)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13   (1 << 13)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14   (1 << 14)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15   (1 << 15)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2   (1 << 2)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3   (1 << 3)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4   (1 << 4)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5   (1 << 5)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6   (1 << 6)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7   (1 << 7)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8   (1 << 8)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9   (1 << 9)

◆ AD7124_ADC_CTRL_REG

#define AD7124_ADC_CTRL_REG   0x01

◆ AD7124_ADC_CTRL_REG_CLK_SEL

#define AD7124_ADC_CTRL_REG_CLK_SEL (   x)    (((x) & 0x3) << 0)

◆ AD7124_ADC_CTRL_REG_CONT_READ

#define AD7124_ADC_CTRL_REG_CONT_READ   (1 << 11)

◆ AD7124_ADC_CTRL_REG_CS_EN

#define AD7124_ADC_CTRL_REG_CS_EN   (1 << 9)

◆ AD7124_ADC_CTRL_REG_DATA_STATUS

#define AD7124_ADC_CTRL_REG_DATA_STATUS   (1 << 10)

◆ AD7124_ADC_CTRL_REG_DOUT_RDY_DEL

#define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL   (1 << 12)

◆ AD7124_ADC_CTRL_REG_MODE

#define AD7124_ADC_CTRL_REG_MODE (   x)    (((x) & 0xF) << 2)

◆ AD7124_ADC_CTRL_REG_POWER_MODE

#define AD7124_ADC_CTRL_REG_POWER_MODE (   x)    (((x) & 0x3) << 6)

◆ AD7124_ADC_CTRL_REG_REF_EN

#define AD7124_ADC_CTRL_REG_REF_EN   (1 << 8)

◆ AD7124_CFG0_REG

#define AD7124_CFG0_REG   0x19

◆ AD7124_CFG1_REG

#define AD7124_CFG1_REG   0x1A

◆ AD7124_CFG2_REG

#define AD7124_CFG2_REG   0x1B

◆ AD7124_CFG3_REG

#define AD7124_CFG3_REG   0x1C

◆ AD7124_CFG4_REG

#define AD7124_CFG4_REG   0x1D

◆ AD7124_CFG5_REG

#define AD7124_CFG5_REG   0x1E

◆ AD7124_CFG6_REG

#define AD7124_CFG6_REG   0x1F

◆ AD7124_CFG7_REG

#define AD7124_CFG7_REG   0x20

◆ AD7124_CFG_REG_AIN_BUFP

#define AD7124_CFG_REG_AIN_BUFP   (1 << 6)

◆ AD7124_CFG_REG_AINN_BUFM

#define AD7124_CFG_REG_AINN_BUFM   (1 << 5)

◆ AD7124_CFG_REG_BIPOLAR

#define AD7124_CFG_REG_BIPOLAR   (1 << 11)

◆ AD7124_CFG_REG_BURNOUT

#define AD7124_CFG_REG_BURNOUT (   x)    (((x) & 0x3) << 9)

◆ AD7124_CFG_REG_PGA

#define AD7124_CFG_REG_PGA (   x)    (((x) & 0x7) << 0)

◆ AD7124_CFG_REG_REF_BUFM

#define AD7124_CFG_REG_REF_BUFM   (1 << 7)

◆ AD7124_CFG_REG_REF_BUFP

#define AD7124_CFG_REG_REF_BUFP   (1 << 8)

◆ AD7124_CFG_REG_REF_SEL

#define AD7124_CFG_REG_REF_SEL (   x)    ((x) & 0x3) << 3

◆ AD7124_CH0_MAP_REG

#define AD7124_CH0_MAP_REG   0x09

◆ AD7124_CH10_MAP_REG

#define AD7124_CH10_MAP_REG   0x13

◆ AD7124_CH11_MAP_REG

#define AD7124_CH11_MAP_REG   0x14

◆ AD7124_CH12_MAP_REG

#define AD7124_CH12_MAP_REG   0x15

◆ AD7124_CH13_MAP_REG

#define AD7124_CH13_MAP_REG   0x16

◆ AD7124_CH14_MAP_REG

#define AD7124_CH14_MAP_REG   0x17

◆ AD7124_CH15_MAP_REG

#define AD7124_CH15_MAP_REG   0x18

◆ AD7124_CH1_MAP_REG

#define AD7124_CH1_MAP_REG   0x0A

◆ AD7124_CH2_MAP_REG

#define AD7124_CH2_MAP_REG   0x0B

◆ AD7124_CH3_MAP_REG

#define AD7124_CH3_MAP_REG   0x0C

◆ AD7124_CH4_MAP_REG

#define AD7124_CH4_MAP_REG   0x0D

◆ AD7124_CH5_MAP_REG

#define AD7124_CH5_MAP_REG   0x0E

◆ AD7124_CH6_MAP_REG

#define AD7124_CH6_MAP_REG   0x0F

◆ AD7124_CH7_MAP_REG

#define AD7124_CH7_MAP_REG   0x10

◆ AD7124_CH8_MAP_REG

#define AD7124_CH8_MAP_REG   0x11

◆ AD7124_CH9_MAP_REG

#define AD7124_CH9_MAP_REG   0x12

◆ AD7124_CH_MAP_REG_AINM

#define AD7124_CH_MAP_REG_AINM (   x)    (((x) & 0x1F) << 0)

◆ AD7124_CH_MAP_REG_AINP

#define AD7124_CH_MAP_REG_AINP (   x)    (((x) & 0x1F) << 5)

◆ AD7124_CH_MAP_REG_CH_ENABLE

#define AD7124_CH_MAP_REG_CH_ENABLE   (1 << 15)

◆ AD7124_CH_MAP_REG_SETUP

#define AD7124_CH_MAP_REG_SETUP (   x)    (((x) & 0x7) << 12)

◆ AD7124_COMM_REG

#define AD7124_COMM_REG   0x00

◆ AD7124_COMM_REG_RA

#define AD7124_COMM_REG_RA (   x)    ((x) & 0x3F)

◆ AD7124_COMM_REG_RD

#define AD7124_COMM_REG_RD   (1 << 6)

◆ AD7124_COMM_REG_WEN

#define AD7124_COMM_REG_WEN   (0 << 7)

◆ AD7124_COMM_REG_WR

#define AD7124_COMM_REG_WR   (0 << 6)

◆ AD7124_CRC8_POLYNOMIAL_REPRESENTATION

#define AD7124_CRC8_POLYNOMIAL_REPRESENTATION   0x07 /* x8 + x2 + x + 1 */

◆ AD7124_DATA_REG

#define AD7124_DATA_REG   0x02

◆ AD7124_DISABLE_CRC

#define AD7124_DISABLE_CRC   0

◆ AD7124_ERR_REG

#define AD7124_ERR_REG   0x06

◆ AD7124_ERR_REG_ADC_CAL_ERR

#define AD7124_ERR_REG_ADC_CAL_ERR   (1 << 18)

◆ AD7124_ERR_REG_ADC_CONV_ERR

#define AD7124_ERR_REG_ADC_CONV_ERR   (1 << 17)

◆ AD7124_ERR_REG_ADC_SAT_ERR

#define AD7124_ERR_REG_ADC_SAT_ERR   (1 << 16)

◆ AD7124_ERR_REG_AINM_OV_ERR

#define AD7124_ERR_REG_AINM_OV_ERR   (1 << 13)

◆ AD7124_ERR_REG_AINM_UV_ERR

#define AD7124_ERR_REG_AINM_UV_ERR   (1 << 12)

◆ AD7124_ERR_REG_AINP_OV_ERR

#define AD7124_ERR_REG_AINP_OV_ERR   (1 << 15)

◆ AD7124_ERR_REG_AINP_UV_ERR

#define AD7124_ERR_REG_AINP_UV_ERR   (1 << 14)

◆ AD7124_ERR_REG_ALDO_PSM_ERR

#define AD7124_ERR_REG_ALDO_PSM_ERR   (1 << 7)

◆ AD7124_ERR_REG_DLDO_PSM_ERR

#define AD7124_ERR_REG_DLDO_PSM_ERR   (1 << 9)

◆ AD7124_ERR_REG_LDO_CAP_ERR

#define AD7124_ERR_REG_LDO_CAP_ERR   (1 << 19)

◆ AD7124_ERR_REG_MM_CRC_ERR

#define AD7124_ERR_REG_MM_CRC_ERR   (1 << 1)

◆ AD7124_ERR_REG_REF_DET_ERR

#define AD7124_ERR_REG_REF_DET_ERR   (1 << 11)

◆ AD7124_ERR_REG_ROM_CRC_ERR

#define AD7124_ERR_REG_ROM_CRC_ERR   (1 << 0)

◆ AD7124_ERR_REG_SPI_CRC_ERR

#define AD7124_ERR_REG_SPI_CRC_ERR   (1 << 2)

◆ AD7124_ERR_REG_SPI_IGNORE_ERR

#define AD7124_ERR_REG_SPI_IGNORE_ERR   (1 << 6)

◆ AD7124_ERR_REG_SPI_READ_ERR

#define AD7124_ERR_REG_SPI_READ_ERR   (1 << 4)

◆ AD7124_ERR_REG_SPI_SLCK_CNT_ERR

#define AD7124_ERR_REG_SPI_SLCK_CNT_ERR   (1 << 5)

◆ AD7124_ERR_REG_SPI_WRITE_ERR

#define AD7124_ERR_REG_SPI_WRITE_ERR   (1 << 3)

◆ AD7124_ERREN_REG

#define AD7124_ERREN_REG   0x07

◆ AD7124_ERREN_REG_ADC_CAL_ERR_EN

#define AD7124_ERREN_REG_ADC_CAL_ERR_EN   (1 << 18)

◆ AD7124_ERREN_REG_ADC_CONV_ERR_EN

#define AD7124_ERREN_REG_ADC_CONV_ERR_EN   (1 << 17)

◆ AD7124_ERREN_REG_ADC_SAT_ERR_EN

#define AD7124_ERREN_REG_ADC_SAT_ERR_EN   (1 << 16)

◆ AD7124_ERREN_REG_AINM_OV_ERR_EN

#define AD7124_ERREN_REG_AINM_OV_ERR_EN   (1 << 13)

◆ AD7124_ERREN_REG_AINM_UV_ERR_EN

#define AD7124_ERREN_REG_AINM_UV_ERR_EN   (1 << 12)

◆ AD7124_ERREN_REG_AINP_OV_ERR_EN

#define AD7124_ERREN_REG_AINP_OV_ERR_EN   (1 << 15)

◆ AD7124_ERREN_REG_AINP_UV_ERR_EN

#define AD7124_ERREN_REG_AINP_UV_ERR_EN   (1 << 14)

◆ AD7124_ERREN_REG_ALDO_PSM_ERR_EN

#define AD7124_ERREN_REG_ALDO_PSM_ERR_EN   (1 << 7)

◆ AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN

#define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN   (1 << 8)

◆ AD7124_ERREN_REG_DLDO_PSM_ERR_ERR

#define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR   (1 << 9)

◆ AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN

#define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN   (1 << 10)

◆ AD7124_ERREN_REG_LDO_CAP_CHK

#define AD7124_ERREN_REG_LDO_CAP_CHK (   x)    (((x) & 0x3) << 19)

◆ AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN

#define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN   (1 << 21)

◆ AD7124_ERREN_REG_MCLK_CNT_EN

#define AD7124_ERREN_REG_MCLK_CNT_EN   (1 << 22)

◆ AD7124_ERREN_REG_MM_CRC_ERR_EN

#define AD7124_ERREN_REG_MM_CRC_ERR_EN   (1 << 1)

◆ AD7124_ERREN_REG_REF_DET_ERR_EN

#define AD7124_ERREN_REG_REF_DET_ERR_EN   (1 << 11)

◆ AD7124_ERREN_REG_ROM_CRC_ERR_EN

#define AD7124_ERREN_REG_ROM_CRC_ERR_EN   (1 << 0)

◆ AD7124_ERREN_REG_SPI_CRC_ERR_EN

#define AD7124_ERREN_REG_SPI_CRC_ERR_EN   (1 << 2)

◆ AD7124_ERREN_REG_SPI_IGNORE_ERR_EN

#define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN   (1 << 6)

◆ AD7124_ERREN_REG_SPI_READ_ERR_EN

#define AD7124_ERREN_REG_SPI_READ_ERR_EN   (1 << 4)

◆ AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN

#define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN   (1 << 5)

◆ AD7124_ERREN_REG_SPI_WRITE_ERR_EN

#define AD7124_ERREN_REG_SPI_WRITE_ERR_EN   (1 << 3)

◆ AD7124_FILT0_REG

#define AD7124_FILT0_REG   0x21

◆ AD7124_FILT1_REG

#define AD7124_FILT1_REG   0x22

◆ AD7124_FILT2_REG

#define AD7124_FILT2_REG   0x23

◆ AD7124_FILT3_REG

#define AD7124_FILT3_REG   0x24

◆ AD7124_FILT4_REG

#define AD7124_FILT4_REG   0x25

◆ AD7124_FILT5_REG

#define AD7124_FILT5_REG   0x26

◆ AD7124_FILT6_REG

#define AD7124_FILT6_REG   0x27

◆ AD7124_FILT7_REG

#define AD7124_FILT7_REG   0x28

◆ AD7124_FILT_REG_FILTER

#define AD7124_FILT_REG_FILTER (   x)    (((x) & 0x7) << 21)

◆ AD7124_FILT_REG_FS

#define AD7124_FILT_REG_FS (   x)    (((x) & 0x7FF) << 0)

◆ AD7124_FILT_REG_POST_FILTER

#define AD7124_FILT_REG_POST_FILTER (   x)    (((x) & 0x7) << 17)

◆ AD7124_FILT_REG_REJ60

#define AD7124_FILT_REG_REJ60   (1 << 20)

◆ AD7124_FILT_REG_SINGLE_CYCLE

#define AD7124_FILT_REG_SINGLE_CYCLE   (1 << 16)

◆ AD7124_GAIN0_REG

#define AD7124_GAIN0_REG   0x31

◆ AD7124_GAIN1_REG

#define AD7124_GAIN1_REG   0x32

◆ AD7124_GAIN2_REG

#define AD7124_GAIN2_REG   0x33

◆ AD7124_GAIN3_REG

#define AD7124_GAIN3_REG   0x34

◆ AD7124_GAIN4_REG

#define AD7124_GAIN4_REG   0x35

◆ AD7124_GAIN5_REG

#define AD7124_GAIN5_REG   0x36

◆ AD7124_GAIN6_REG

#define AD7124_GAIN6_REG   0x37

◆ AD7124_GAIN7_REG

#define AD7124_GAIN7_REG   0x38

◆ AD7124_ID_REG

#define AD7124_ID_REG   0x05

◆ AD7124_ID_REG_DEVICE_ID

#define AD7124_ID_REG_DEVICE_ID (   x)    (((x) & 0xF) << 4)

◆ AD7124_ID_REG_SILICON_REV

#define AD7124_ID_REG_SILICON_REV (   x)    (((x) & 0xF) << 0)

◆ AD7124_IO_CTRL1_REG

#define AD7124_IO_CTRL1_REG   0x03

◆ AD7124_IO_CTRL1_REG_GPIO_CTRL1

#define AD7124_IO_CTRL1_REG_GPIO_CTRL1   (1 << 18)

◆ AD7124_IO_CTRL1_REG_GPIO_CTRL2

#define AD7124_IO_CTRL1_REG_GPIO_CTRL2   (1 << 19)

◆ AD7124_IO_CTRL1_REG_GPIO_DAT1

#define AD7124_IO_CTRL1_REG_GPIO_DAT1   (1 << 22)

◆ AD7124_IO_CTRL1_REG_GPIO_DAT2

#define AD7124_IO_CTRL1_REG_GPIO_DAT2   (1 << 23)

◆ AD7124_IO_CTRL1_REG_IOUT0

#define AD7124_IO_CTRL1_REG_IOUT0 (   x)    (((x) & 0x7) << 8)

◆ AD7124_IO_CTRL1_REG_IOUT1

#define AD7124_IO_CTRL1_REG_IOUT1 (   x)    (((x) & 0x7) << 11)

◆ AD7124_IO_CTRL1_REG_IOUT_CH0

#define AD7124_IO_CTRL1_REG_IOUT_CH0 (   x)    (((x) & 0xF) << 0)

◆ AD7124_IO_CTRL1_REG_IOUT_CH1

#define AD7124_IO_CTRL1_REG_IOUT_CH1 (   x)    (((x) & 0xF) << 4)

◆ AD7124_IO_CTRL1_REG_PDSW

#define AD7124_IO_CTRL1_REG_PDSW   (1 << 15)

◆ AD7124_IO_CTRL2_REG

#define AD7124_IO_CTRL2_REG   0x04

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS0

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS0   (1 << 0)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS1

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS1   (1 << 1)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS2

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS2   (1 << 4)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS3

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS3   (1 << 5)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS4

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS4   (1 << 10)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS5

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS5   (1 << 11)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS6

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS6   (1 << 14)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS7

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS7   (1 << 15)

◆ AD7124_OFFS0_REG

#define AD7124_OFFS0_REG   0x29

◆ AD7124_OFFS1_REG

#define AD7124_OFFS1_REG   0x2A

◆ AD7124_OFFS2_REG

#define AD7124_OFFS2_REG   0x2B

◆ AD7124_OFFS3_REG

#define AD7124_OFFS3_REG   0x2C

◆ AD7124_OFFS4_REG

#define AD7124_OFFS4_REG   0x2D

◆ AD7124_OFFS5_REG

#define AD7124_OFFS5_REG   0x2E

◆ AD7124_OFFS6_REG

#define AD7124_OFFS6_REG   0x2F

◆ AD7124_OFFS7_REG

#define AD7124_OFFS7_REG   0x30

◆ AD7124_R

#define AD7124_R   2 /* Read only */

◆ AD7124_RW

#define AD7124_RW   1 /* Read and Write */

◆ AD7124_STATUS_REG

#define AD7124_STATUS_REG   0x00

◆ AD7124_STATUS_REG_CH_ACTIVE

#define AD7124_STATUS_REG_CH_ACTIVE (   x)    ((x) & 0xF)

◆ AD7124_STATUS_REG_ERROR_FLAG

#define AD7124_STATUS_REG_ERROR_FLAG   (1 << 6)

◆ AD7124_STATUS_REG_POR_FLAG

#define AD7124_STATUS_REG_POR_FLAG   (1 << 4)

◆ AD7124_STATUS_REG_RDY

#define AD7124_STATUS_REG_RDY   (1 << 7)

◆ AD7124_USE_CRC

#define AD7124_USE_CRC   1

◆ AD7124_W

#define AD7124_W   3 /* Write only */

Enumeration Type Documentation

◆ ad7124_registers

AD7124 registers list

Enumerator
AD7124_Status 
AD7124_ADC_Control 
AD7124_Data 
AD7124_IOCon1 
AD7124_IOCon2 
AD7124_ID 
AD7124_Error 
AD7124_Error_En 
AD7124_Mclk_Count 
AD7124_Channel_0 
AD7124_Channel_1 
AD7124_Channel_2 
AD7124_Channel_3 
AD7124_Channel_4 
AD7124_Channel_5 
AD7124_Channel_6 
AD7124_Channel_7 
AD7124_Channel_8 
AD7124_Channel_9 
AD7124_Channel_10 
AD7124_Channel_11 
AD7124_Channel_12 
AD7124_Channel_13 
AD7124_Channel_14 
AD7124_Channel_15 
AD7124_Config_0 
AD7124_Config_1 
AD7124_Config_2 
AD7124_Config_3 
AD7124_Config_4 
AD7124_Config_5 
AD7124_Config_6 
AD7124_Config_7 
AD7124_Filter_0 
AD7124_Filter_1 
AD7124_Filter_2 
AD7124_Filter_3 
AD7124_Filter_4 
AD7124_Filter_5 
AD7124_Filter_6 
AD7124_Filter_7 
AD7124_Offset_0 
AD7124_Offset_1 
AD7124_Offset_2 
AD7124_Offset_3 
AD7124_Offset_4 
AD7124_Offset_5 
AD7124_Offset_6 
AD7124_Offset_7 
AD7124_Gain_0 
AD7124_Gain_1 
AD7124_Gain_2 
AD7124_Gain_3 
AD7124_Gain_4 
AD7124_Gain_5 
AD7124_Gain_6 
AD7124_Gain_7 
AD7124_REG_NO 

Function Documentation

◆ ad7124_compute_crc8()

uint8_t ad7124_compute_crc8 ( uint8_t *  p_buf,
uint8_t  buf_size 
)

Computes the CRC checksum for a data buffer.

Computes the CRC checksum for a data buffer.

Parameters
p_buf- Data buffer
buf_size- Data buffer size in bytes
Returns
Returns the computed CRC checksum.
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◆ ad7124_fclk_get()

int32_t ad7124_fclk_get ( struct ad7124_dev dev,
float *  f_clk 
)

Get the AD7124 reference clock.

Get the AD7124 reference clock.

Parameters
[in]dev- Pointer to the application handler.
[out]f_clk- Pointer to the clock frequency container.
Returns
0 in case of success, error code otherwise.
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◆ ad7124_fltcoff_get()

int32_t ad7124_fltcoff_get ( struct ad7124_dev dev,
int16_t  ch_no,
uint16_t *  flt_coff 
)

Get the filter coefficient for the sample rate.

Get the filter coefficient for the sample rate.

Parameters
[in]dev- Pointer to the application handler.
[in]ch_no- Channel number.
[out]flt_coff- Pointer to the filter coefficient container.
Returns
0 in case of success, error code otherwise.
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◆ ad7124_get_odr()

float ad7124_get_odr ( struct ad7124_dev dev,
int16_t  ch_no 
)

Calculate ODR of the device.

Calculate ODR of the device.

Parameters
[in]dev- Pointer to the application handler.
[in]ch_no- Channel number.
Returns
Output data rate in case of success, negative error code otherwise.

◆ ad7124_get_read_chan_id()

int32_t ad7124_get_read_chan_id ( struct ad7124_dev dev,
uint32_t *  status 
)

Get the ID of the channel of the latest conversion.

Get the ID of the channel of the latest conversion.

Parameters
dev- The handler of the instance of the driver.
status- Pointer to store the read data.
Returns
Returns 0 for success or negative error code.

◆ ad7124_no_check_read_register()

int32_t ad7124_no_check_read_register ( struct ad7124_dev dev,
struct ad7124_st_reg p_reg 
)

Reads the value of the specified register without checking if the device is ready to accept user requests.

Reads the value of the specified register without a device state check.

Parameters
dev- The handler of the instance of the driver.
p_reg- Pointer to the register structure holding info about the register to be read. The read value is stored inside the register structure.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_no_check_write_register()

int32_t ad7124_no_check_write_register ( struct ad7124_dev dev,
struct ad7124_st_reg  reg 
)

Writes the value of the specified register without checking if the device is ready to accept user requests.

Writes the value of the specified register without a device state check.

Parameters
dev- The handler of the instance of the driver.
reg- Register structure holding info about the register to be written
Returns
Returns 0 for success or negative error code.
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◆ ad7124_read_data()

int32_t ad7124_read_data ( struct ad7124_dev dev,
int32_t *  p_data 
)

Reads the conversion result from the device.

Reads the conversion result from the device.

Parameters
dev- The handler of the instance of the driver.
p_data- Pointer to store the read data.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_read_register()

int32_t ad7124_read_register ( struct ad7124_dev dev,
struct ad7124_st_reg p_reg 
)

Reads the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the read operation will be executed without checking the device state. DEPRECATED, use ad7124_read_register2.

Reads the value of the specified register.

Parameters
dev- The handler of the instance of the driver.
p_reg- Pointer to the register structure holding info about the register to be read. The read value is stored inside the register structure.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_read_register2()

int32_t ad7124_read_register2 ( struct ad7124_dev dev,
uint32_t  reg,
uint32_t *  readval 
)

Wrap the read register function to give it a modern signature.

Wrap the read register function to give it a modern signature.

Parameters
[in]dev- Driver handler pointer.
[in]reg- Address of the register to be read.
[out]readval- Pointer to the register value.
Returns
SUCCESS in case of success, error code otherwise.
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◆ ad7124_remove()

int32_t ad7124_remove ( struct ad7124_dev dev)

Free the resources allocated by AD7124_Setup().

Free the resources allocated by AD7124_Setup().

Parameters
dev- The device structure.
Returns
SUCCESS in case of success, negative error code otherwise.

◆ ad7124_reset()

int32_t ad7124_reset ( struct ad7124_dev dev)

Resets the device.

Resets the device.

Parameters
dev- The handler of the instance of the driver.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_set_odr()

int32_t ad7124_set_odr ( struct ad7124_dev dev,
float  odr,
int16_t  ch_no 
)

Set ODR of the device.

Set ODR of the device.

Parameters
[in]dev- Pointer to the application handler.
[in]odr- New ODR of the device.
[in]ch_no- Channel number.
Returns
0 in case of success, error code otherwise.

◆ ad7124_setup()

int32_t ad7124_setup ( struct ad7124_dev **  device,
struct ad7124_init_param init_param 
)

Initializes the AD7124.

Initializes the AD7124.

Parameters
device- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_update_crcsetting()

void ad7124_update_crcsetting ( struct ad7124_dev dev)

Updates the CRC settings.

Updates the CRC settings.

Parameters
dev- The handler of the instance of the driver.
Returns
None.
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◆ ad7124_update_dev_spi_settings()

void ad7124_update_dev_spi_settings ( struct ad7124_dev dev)

Updates the device SPI interface settings.

Updates the device SPI interface settings.

Parameters
dev- The handler of the instance of the driver.
Returns
None.
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◆ ad7124_wait_for_conv_ready()

int32_t ad7124_wait_for_conv_ready ( struct ad7124_dev dev,
uint32_t  timeout 
)

Waits until a new conversion result is available.

Waits until a new conversion result is available.

Parameters
dev- The handler of the instance of the driver.
timeout- Count representing the number of polls to be done until the function returns if no new data is available.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_wait_for_spi_ready()

int32_t ad7124_wait_for_spi_ready ( struct ad7124_dev dev,
uint32_t  timeout 
)

Waits until the device can accept read and write user actions.

Waits until the device can accept read and write user actions.

Parameters
dev- The handler of the instance of the driver.
timeout- Count representing the number of polls to be done until the function returns.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_wait_to_power_on()

int32_t ad7124_wait_to_power_on ( struct ad7124_dev dev,
uint32_t  timeout 
)

Waits until the device finishes the power-on reset operation.

Waits until the device finishes the power-on reset operation.

Parameters
dev- The handler of the instance of the driver.
timeout- Count representing the number of polls to be done until the function returns.
Returns
Returns 0 for success or negative error code.
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◆ ad7124_write_register()

int32_t ad7124_write_register ( struct ad7124_dev dev,
struct ad7124_st_reg  p_reg 
)

Writes the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the write operation will be executed without checking the device state. DEPRECATED, use ad7124_write_register2.

Writes the value of the specified register.

Parameters
dev- The handler of the instance of the driver.
p_reg- Register structure holding info about the register to be written
Returns
Returns 0 for success or negative error code.
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◆ ad7124_write_register2()

int32_t ad7124_write_register2 ( struct ad7124_dev dev,
uint32_t  reg,
uint32_t  writeval 
)

Wrap the write register function to give it a modern signature.

Wrap the write register function to give it a modern signature.

Parameters
[in]dev- Driver handler pointer.
[in]reg- Address of the register to be read.
[in]writeval- New value for the register.
Returns
SUCCESS in case of success, error code otherwise.
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