ad7193.h

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/***************************************************************************/
#ifndef __AD7193_H__
#define __AD7193_H__
 
/******************************************************************************/
/***************************** Include Files **********************************/
/******************************************************************************/
#include <stdint.h>
#include "no-os/gpio.h"
#include "no-os/spi.h"
#include "no-os/util.h"
 
/******************************************************************************/
/******************************** AD7193 **************************************/
/******************************************************************************/
 
/* SPI slave device ID */
#define AD7193_SLAVE_ID         1
 
/* AD7193 Register Map */
#define AD7193_REG_COMM         0 // Communications Register (WO, 8-bit)
#define AD7193_REG_STAT         0 // Status Register         (RO, 8-bit)
#define AD7193_REG_MODE         1 // Mode Register           (RW, 24-bit
#define AD7193_REG_CONF         2 // Configuration Register  (RW, 24-bit)
#define AD7193_REG_DATA         3 // Data Register           (RO, 24/32-bit)
#define AD7193_REG_ID           4 // ID Register             (RO, 8-bit)
#define AD7193_REG_GPOCON       5 // GPOCON Register         (RW, 8-bit)
#define AD7193_REG_OFFSET       6 // Offset Register         (RW, 24-bit
#define AD7193_REG_FULLSCALE    7 // Full-Scale Register     (RW, 24-bit)
 
/* Communications Register Bit Designations (AD7193_REG_COMM) */
#define AD7193_COMM_WEN         (1 << 7)           // Write Enable.
#define AD7193_COMM_WRITE       (0 << 6)           // Write Operation.
#define AD7193_COMM_READ        (1 << 6)           // Read Operation.
#define AD7193_COMM_ADDR(x)     (((x) & 0x7) << 3) // Register Address.
#define AD7193_COMM_CREAD       (1 << 2)           // Continuous Read of Data Register.
 
/* Status Register Bit Designations (AD7193_REG_STAT) */
#define AD7193_STAT_RDY         (1 << 7) // Ready.
#define AD7193_STAT_ERR         (1 << 6) // ADC error bit.
#define AD7193_STAT_NOREF       (1 << 5) // Error no external reference.
#define AD7193_STAT_PARITY      (1 << 4) // Parity check of the data register.
#define AD7193_STAT_CH3         (1 << 3) // Channel 3.
#define AD7193_STAT_CH2         (1 << 2) // Channel 2.
#define AD7193_STAT_CH1         (1 << 1) // Channel 1.
#define AD7193_STAT_CH0         (1 << 0) // Channel 0.
 
/* Mode Register Bit Designations (AD7193_REG_MODE) */
#define AD7193_MODE_SEL(x)      (((uint32_t)(x) & 0x7) << 21) // Operation Mode Select.
#define AD7193_MODE_DAT_STA     ((uint32_t)1 << 20)           // Status Register transmission.
#define AD7193_MODE_CLKSRC(x)   (((uint32_t)(x) & 0x3) << 18) // Clock Source Select.
#define AD7193_MODE_AVG(x)      (((uint32_t)(x) & 0x3) << 16) // Fast settling filter.
#define AD7193_MODE_SINC3       (1 << 15)                          // SINC3 Filter Select.
#define AD7193_MODE_ENPAR       (1 << 13)                          // Parity Enable.
#define AD7193_MODE_CLKDIV      (1 << 12)                          // Clock divide by 2 (AD7190/2 only).
#define AD7193_MODE_SCYCLE      (1 << 11)                          // Single cycle conversion.
#define AD7193_MODE_REJ60       (1 << 10)                          // 50/60Hz notch filter.
#define AD7193_MODE_RATE(x)     ((x) & 0x3FF)                      // Filter Update Rate Select.
 
/* Mode Register: AD7193_MODE_AVG(x) options */
#define AD7193_AVG_NONE                 0 // No averaging (fast settling mode disabled).
#define AD7193_AVG_BY_2                 1 // Average by 2.
#define AD7193_AVG_BY_8                 2 // Average by 8.
#define AD7193_AVG_BY_16                3 // Average by 16.
 
/* Configuration Register Bit Designations (AD7193_REG_CONF) */
#define AD7193_CONF_CHOP        ((uint32_t)1 << 23)            // CHOP enable.
#define AD7193_CONF_REFSEL      ((uint32_t)1 << 20)            // REFIN1/REFIN2 Reference Select.
#define AD7193_CONF_PSEUDO      ((uint32_t)1 << 18)            // Pseudo differential analog inputs.
#define AD7193_CONF_CHAN(x)     ((uint32_t)((x) & 0x3FF) << 8) // Channel select.
#define AD7193_CONF_BURN        (1 << 7)                            // Burnout current enable.
#define AD7193_CONF_REFDET      (1 << 6)                            // Reference detect enable.
#define AD7193_CONF_BUF         (1 << 4)                            // Buffered Mode Enable.
#define AD7193_CONF_UNIPOLAR    (1 << 3)                            // Unipolar/Bipolar Enable.
#define AD7193_CONF_GAIN(x)     ((x) & 0x7)                         // Gain Select.
 
/* Configuration Register: AD7193_CONF_CHAN(x) options */
//                            Pseudo Bit = 0           Pseudo Bit = 1
#define AD7193_CH_0      0 // AIN1(+) - AIN2(-);       AIN1 - AINCOM
#define AD7193_CH_1      1 // AIN3(+) - AIN4(-);       AIN2 - AINCOM
#define AD7193_CH_2      2 // AIN5(+) - AIN6(-);       AIN3 - AINCOM
#define AD7193_CH_3      3 // AIN7(+) - AIN8(-);       AIN4 - AINCOM
#define AD7193_CH_4      4 // AIN1(+) - AIN2(-);       AIN5 - AINCOM
#define AD7193_CH_5      5 // AIN3(+) - AIN4(-);       AIN6 - AINCOM
#define AD7193_CH_6      6 // AIN5(+) - AIN6(-);       AIN7 - AINCOM
#define AD7193_CH_7      7 // AIN7(+) - AIN8(-);       AIN8 - AINCOM
#define AD7193_CH_TEMP   8 //           Temperature sensor
#define AD7193_CH_SHORT  9 // AIN2(+) - AIN2(-);       AINCOM(+) - AINCOM(-)
 
/* ID Register Bit Designations (AD7193_REG_ID) */
#define ID_AD7193               0x2
#define AD7193_ID_MASK          0x0F
 
/* GPOCON Register Bit Designations (AD7193_REG_GPOCON) */
#define AD7193_GPOCON_BPDSW     (1 << 6) // Bridge power-down switch enable
#define AD7193_GPOCON_GP32EN    (1 << 5) // Digital Output P3 and P2 enable
#define AD7193_GPOCON_GP10EN    (1 << 4) // Digital Output P1 and P0 enable
#define AD7193_GPOCON_P3DAT     (1 << 3) // P3 state
#define AD7193_GPOCON_P2DAT     (1 << 2) // P2 state
#define AD7193_GPOCON_P1DAT     (1 << 1) // P1 state
#define AD7193_GPOCON_P0DAT     (1 << 0) // P0 state
 
/* Channel Mask */
#define AD7193_CH_MASK(x)       BIT(x)
 
/******************************************************************************/
/*************************** Types Declarations *******************************/
/******************************************************************************/
 
enum ad7193_adc_range {
//                              ADC Input Range (5 V Reference)
    AD7193_ADC_2_5V = 0,        // Gain 1    +-2.5 V
    AD7193_ADC_312_5_mV = 3,    // Gain 8    +-312.5 mV
    AD7193_ADC_156_2_mV = 4,    // Gain 16   +-156.2 mV
    AD7193_ADC_78_125mV = 5,    // Gain 32   +-78.125 mV
    AD7193_ADC_39_06mV = 6,     // Gain 64   +-39.06 mV
    AD7193_ADC_19_53mV = 7      // Gain 128  +-19.53 mV
};
 
enum ad7193_adc_clock {
    // External crystal. The external crystal is connected from MCLK1 to MCLK2.
    AD7193_EXT_CRYSTAL_MCLK1_MCLK2,
    // External Clock applied to MCLK2
    AD7193_EXT_CRYSTAL_MCLK2,
    // Internal 4.92 MHz clock. Pin MCLK2 is tristated.
    AD7193_INT_CLK_4_92_MHZ_TRIST,
    // Internal 4.92 MHz clock. The internal clock is available on MCLK2.
    AD7193_INT_CLK_4_92_MHZ
};
 
enum ad7193_adc_modes {
    // Continuous Conversion Mode
    AD7193_MODE_CONT,
    // Single Conversion Mode
    AD7193_MODE_SINGLE,
    // Idle Mode
    AD7193_MODE_IDLE,
    // Power-Down Mode
    AD7193_MODE_PWRDN,
    // Internal Zero-Scale Calibration
    AD7193_MODE_CAL_INT_ZERO,
    // Internal Full-Scale Calibration4
    AD7193_MODE_CAL_INT_FULL,
    // System Zero-Scale Calibration5
    AD7193_MODE_CAL_SYS_ZERO,
    // System Full-Scale Calibration
    AD7193_MODE_CAL_SYS_FULL,
};
 
struct ad7193_dev {
    /* SPI */
    spi_desc        *spi_desc;
    /* GPIO */
    struct gpio_desc    *gpio_miso;
    /* Device Settings */
    uint8_t         current_polarity;
    enum ad7193_adc_range   current_gain;
    enum ad7193_adc_modes   operating_mode;
    uint16_t            data_rate_code;
    enum ad7193_adc_clock   clock_source;
    uint8_t         input_mode;
    uint8_t         buffer;
    uint8_t             bpdsw_mode;
};
 
struct ad7193_init_param {
    /* SPI */
    spi_init_param      spi_init;
    /* GPIO */
    struct gpio_init_param  gpio_miso;
    /* Device Settings */
    uint8_t         current_polarity;
    enum ad7193_adc_range   current_gain;
    enum ad7193_adc_modes   operating_mode;
    uint16_t            data_rate_code;
    enum ad7193_adc_clock   clock_source;
    uint8_t         input_mode;
    uint8_t         buffer;
    uint8_t             bpdsw_mode;
};
 
/******************************************************************************/
/************************ Functions Declarations ******************************/
/******************************************************************************/
 
int ad7193_init(struct ad7193_dev **device,
        struct ad7193_init_param init_param);
 
int ad7193_remove(struct ad7193_dev *dev);
 
int ad7193_set_register_value(struct ad7193_dev *dev, uint8_t reg_addr,
                  uint32_t reg_value, uint8_t bytes_number);
 
int ad7193_get_register_value(struct ad7193_dev *dev, uint8_t reg_addr,
                  uint8_t bytes_number, uint32_t *reg_data);
 
/* Write masked data into device register. */
int ad7193_set_masked_register_value(struct ad7193_dev *dev,
                     uint8_t reg_addr, uint32_t mask, uint32_t data,
                     uint8_t bytes);
 
int ad7193_reset(struct ad7193_dev *dev);
 
int ad7193_set_operating_mode(struct ad7193_dev *dev,
                  enum ad7193_adc_modes opt_mode);
 
int ad7193_wait_rdy_go_low(struct ad7193_dev *dev);
 
int ad7193_channels_select(struct ad7193_dev *dev, uint16_t chn_mask);
 
int ad7193_calibrate(struct ad7193_dev *dev,
             uint8_t mode, uint8_t channel);
 
int ad7193_config_input_mode(struct ad7193_dev *dev, uint8_t mode);
 
int ad7193_buffer_select(struct ad7193_dev *dev, uint8_t buff_en);
 
int ad7193_output_rate_select(struct ad7193_dev *dev,
                  uint16_t out_rate_code);
 
int ad7193_clock_select(struct ad7193_dev *dev,
            enum ad7193_adc_clock clk_select);
 
int ad7193_set_bridge_switch(struct ad7193_dev *dev, uint8_t bpdsw_select);
 
int ad7193_range_setup(struct ad7193_dev *dev,
               uint8_t polarity, enum ad7193_adc_range range);
 
int ad7193_single_conversion(struct ad7193_dev *dev, uint32_t *reg_data);
 
int ad7193_continuous_read_avg(struct ad7193_dev *dev,
                   uint8_t sample_number, uint32_t *samples_avg);
 
int ad7193_temperature_read(struct ad7193_dev *dev, float *temp);
 
float ad7193_convert_to_volts(struct ad7193_dev *dev,
                  uint32_t raw_data, float v_ref);
 
#endif /* __AD7193_H__ */