no-OS
ad7768.h
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1 /***************************************************************************/
39 #ifndef AD7768_H_
40 #define AD7768_H_
41 
42 /******************************************************************************/
43 /***************************** Include Files **********************************/
44 /******************************************************************************/
45 #include <stdint.h>
46 #include "no_os_gpio.h"
47 #include "no_os_spi.h"
48 
49 /******************************************************************************/
50 /********************** Macros and Constants Definitions **********************/
51 /******************************************************************************/
52 #define AD7768_REG_CH_STANDBY 0x00
53 #define AD7768_REG_CH_MODE_A 0x01
54 #define AD7768_REG_CH_MODE_B 0x02
55 #define AD7768_REG_CH_MODE_SEL 0x03
56 #define AD7768_REG_PWR_MODE 0x04
57 #define AD7768_REG_GENERAL_CFG 0x05
58 #define AD7768_REG_DATA_CTRL 0x06
59 #define AD7768_REG_INTERFACE_CFG 0x07
60 #define AD7768_REG_BIST_CTRL 0x08
61 #define AD7768_REG_DEV_STATUS 0x09
62 #define AD7768_REG_REV_ID 0x0A
63 #define AD7768_REG_DEV_ID_MSB 0x0B
64 #define AD7768_REG_DEV_ID_LSB 0x0C
65 #define AD7768_REG_SW_REV_ID 0x0D
66 #define AD7768_REG_GPIO_CTRL 0x0E
67 #define AD7768_REG_GPIO_WR_DATA 0x0F
68 #define AD7768_REG_GPIO_RD_DATA 0x10
69 #define AD7768_REG_PRECHARGE_BUF_1 0x11
70 #define AD7768_REG_PRECHARGE_BUF_2 0x12
71 #define AD7768_REG_POS_REF_BUF 0x13
72 #define AD7768_REG_NEG_REF_BUF 0x14
73 #define AD7768_REG_CH_OFFSET_1(ch) (0x1E + (ch) * 3)
74 #define AD7768_REG_CH_OFFSET_2(ch) (0x1F + (ch) * 3)
75 #define AD7768_REG_CH_OFFSET_3(ch) (0x20 + (ch) * 3)
76 #define AD7768_REG_CH_GAIN_1(ch) (0x36 + (ch) * 3)
77 #define AD7768_REG_CH_GAIN_2(ch) (0x37 + (ch) * 3)
78 #define AD7768_REG_CH_GAIN_3(ch) (0x38 + (ch) * 3)
79 #define AD7768_REG_CH_SYNC_OFFSET(ch) (0x4E + (ch) * 3)
80 #define AD7768_REG_DIAG_METER_RX 0x56
81 #define AD7768_REG_DIAG_CTRL 0x57
82 #define AD7768_REG_DIAG_MOD_DELAY_CTRL 0x58
83 #define AD7768_REG_DIAG_CHOP_CTRL 0x59
84 
85 /* AD7768_REG_CH_STANDBY */
86 #define AD7768_CH_STANDBY(x) (1 << (x))
87 
88 /* AD7768_REG_CH_MODE_x */
89 #define AD7768_CH_MODE_FILTER_TYPE (1 << 3)
90 #define AD7768_CH_MODE_DEC_RATE(x) (((x) & 0x7) << 0)
91 
92 /* AD7768_REG_CH_MODE_SEL */
93 #define AD7768_CH_MODE(x) (1 << (x))
94 
95 /* AD7768_REG_PWR_MODE */
96 #define AD7768_PWR_MODE_SLEEP_MODE (1 << 7)
97 #define AD7768_PWR_MODE_POWER_MODE(x) (((x) & 0x3) << 5)
98 #define AD7768_PWR_MODE_LVDS_ENABLE (1 << 3)
99 #define AD7768_PWR_MODE_MCLK_DIV(x) (((x) & 0x3) << 0)
100 
101 /* AD7768_REG_DATA_CTRL */
102 #define AD7768_DATA_CTRL_SPI_SYNC (1 << 7)
103 #define AD7768_DATA_CTRL_SINGLE_SHOT_EN (1 << 4)
104 #define AD7768_DATA_CTRL_SPI_RESET(x) (((x) & 0x3) << 0)
105 
106 /* AD7768_REG_INTERFACE_CFG */
107 #define AD7768_INTERFACE_CFG_CRC_SEL(x) (((x) & 0x3) << 2)
108 #define AD7768_INTERFACE_CFG_DCLK_DIV(x) (((x) & 0x3) << 0)
109 
110 #define AD7768_RESOLUTION 24
111 
112 /******************************************************************************/
113 /*************************** Types Declarations *******************************/
114 /******************************************************************************/
115 typedef enum {
119 
120 typedef enum {
125 
126 typedef enum {
131 
132 typedef enum {
138 
139 typedef enum {
143 
144 typedef enum {
148 
149 typedef enum {
155 
156 typedef enum {
166 } ad7768_ch;
167 
168 typedef enum {
172 
173 typedef enum {
177 
178 typedef enum {
182 
183 typedef enum {
193 
194 typedef struct {
210  ad7768_ch_state ch_state[8];
211  ad7768_ch_mode ch_mode[8];
212  ad7768_filt_type filt_type[2];
213  ad7768_dec_rate dec_rate[2];
214 } ad7768_dev;
215 
216 typedef struct {
217  /* SPI */
219  /* GPIO */
220  struct no_os_gpio_init_param gpio_reset;
222  struct no_os_gpio_init_param gpio_mode0;
223  struct no_os_gpio_init_param gpio_mode1;
224  struct no_os_gpio_init_param gpio_mode2;
225  struct no_os_gpio_init_param gpio_mode3;
226  /* Configuration */
235 
236 /******************************************************************************/
237 /************************ Functions Declarations ******************************/
238 /******************************************************************************/
239 /* SPI read from device. */
240 int32_t ad7768_spi_read(ad7768_dev *dev,
241  uint8_t reg_addr,
242  uint8_t *reg_data);
243 /* SPI write to device. */
244 int32_t ad7768_spi_write(ad7768_dev *dev,
245  uint8_t reg_addr,
246  uint8_t reg_data);
247 /* SPI read from device using a mask. */
248 int32_t ad7768_spi_read_mask(ad7768_dev *dev,
249  uint8_t reg_addr,
250  uint8_t mask,
251  uint8_t *data);
252 /* SPI write to device using a mask. */
253 int32_t ad7768_spi_write_mask(ad7768_dev *dev,
254  uint8_t reg_addr,
255  uint8_t mask,
256  uint8_t data);
257 /* Set the device sleep mode. */
258 int32_t ad7768_set_sleep_mode(ad7768_dev *dev,
259  ad7768_sleep_mode mode);
260 /* Get the device sleep mode. */
261 int32_t ad7768_get_sleep_mode(ad7768_dev *dev,
262  ad7768_sleep_mode *mode);
263 /* Set the device power mode. */
264 int32_t ad7768_set_power_mode(ad7768_dev *dev,
265  ad7768_power_mode mode);
266 /* Get the device power mode. */
267 int32_t ad7768_get_power_mode(ad7768_dev *dev,
268  ad7768_power_mode *mode);
269 /* Set the MCLK divider. */
270 int32_t ad7768_set_mclk_div(ad7768_dev *dev,
271  ad7768_mclk_div clk_div);
272 /* Get the MCLK divider. */
273 int32_t ad7768_get_mclk_div(ad7768_dev *dev,
274  ad7768_mclk_div *clk_div);
275 /* Set the DCLK divider. */
276 int32_t ad7768_set_dclk_div(ad7768_dev *dev,
277  ad7768_dclk_div clk_div);
278 /* Get the DCLK divider. */
279 int32_t ad7768_get_dclk_div(ad7768_dev *dev,
280  ad7768_dclk_div *clk_div);
281 /* Set the conversion operation mode. */
282 int32_t ad7768_set_conv_op(ad7768_dev *dev,
283  ad7768_conv_op conv_op);
284 /* Get the conversion operation mode. */
285 int32_t ad7768_get_conv_op(ad7768_dev *dev,
286  ad7768_conv_op *conv_op);
287 /* Set the CRC selection. */
288 int32_t ad7768_set_crc_sel(ad7768_dev *dev,
289  ad7768_crc_sel crc_sel);
290 /* Get the CRC selection. */
291 int32_t ad7768_get_crc_sel(ad7768_dev *dev,
292  ad7768_crc_sel *crc_sel);
293 /* Set the channel state. */
294 int32_t ad7768_set_ch_state(ad7768_dev *dev,
295  ad7768_ch ch,
296  ad7768_ch_state state);
297 /* Get the channel state. */
298 int32_t ad7768_get_ch_state(ad7768_dev *dev,
299  ad7768_ch ch,
300  ad7768_ch_state *state);
301 /* Set the mode configuration. */
303  ad7768_ch_mode mode,
304  ad7768_filt_type filt_type,
305  ad7768_dec_rate dec_rate);
306 /* Get the mode configuration. */
308  ad7768_ch_mode mode,
309  ad7768_filt_type *filt_type,
310  ad7768_dec_rate *dec_rate);
311 /* Set the channel mode. */
312 int32_t ad7768_set_ch_mode(ad7768_dev *dev,
313  ad7768_ch ch,
314  ad7768_ch_mode mode);
315 /* Get the channel mode. */
316 int32_t ad7768_get_ch_mode(ad7768_dev *dev,
317  ad7768_ch ch,
318  ad7768_ch_mode *mode);
319 /* Initialize the device. */
320 int32_t ad7768_setup(ad7768_dev **device,
322 
323 #endif // AD7768_H_
ad7768_setup
int32_t ad7768_setup(ad7768_dev **device, ad7768_init_param init_param)
Definition: ad7768.c:622
ad7768_get_ch_state
int32_t ad7768_get_ch_state(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_state *state)
Definition: ad7768.c:495
ad7768_dev
Definition: ad7768.h:194
ad7768_set_power_mode
int32_t ad7768_set_power_mode(ad7768_dev *dev, ad7768_power_mode mode)
Definition: ad7768.c:226
ad7768_init_param::sleep_mode
ad7768_sleep_mode sleep_mode
Definition: ad7768.h:228
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
AD7768_DEC_X1024_2ND
@ AD7768_DEC_X1024_2ND
Definition: ad7768.h:190
ad7768_power_mode
ad7768_power_mode
Definition: ad7768.h:120
ad7768_get_crc_sel
int32_t ad7768_get_crc_sel(ad7768_dev *dev, ad7768_crc_sel *crc_sel)
Definition: ad7768.c:442
ad7768_dev::sleep_mode
ad7768_sleep_mode sleep_mode
Definition: ad7768.h:204
ad7768_mclk_div
ad7768_mclk_div
Definition: ad7768.h:126
ad7768_set_sleep_mode
int32_t ad7768_set_sleep_mode(ad7768_dev *dev, ad7768_sleep_mode mode)
Definition: ad7768.c:162
AD7768_CH3
@ AD7768_CH3
Definition: ad7768.h:160
AD7768_CH_MODE_DEC_RATE
#define AD7768_CH_MODE_DEC_RATE(x)
Definition: ad7768.h:90
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
ad7768_dev::mclk_div
ad7768_mclk_div mclk_div
Definition: ad7768.h:206
ad7768_spi_write_mask
int32_t ad7768_spi_write_mask(ad7768_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Definition: ad7768.c:138
no_os_spi.h
Header file of SPI Interface.
ad7768_dev::pin_spi_ctrl
ad7768_pin_spi_ctrl pin_spi_ctrl
Definition: ad7768.h:203
AD7768_DEC_X256
@ AD7768_DEC_X256
Definition: ad7768.h:187
AD7768_DEC_X512
@ AD7768_DEC_X512
Definition: ad7768.h:188
ad7768_dev::gpio_reset_value
uint8_t gpio_reset_value
Definition: ad7768.h:197
ad7768_spi_write
int32_t ad7768_spi_write(ad7768_dev *dev, uint8_t reg_addr, uint8_t reg_data)
Definition: ad7768.c:94
ad7768_set_sleep_mode
int32_t ad7768_set_sleep_mode(ad7768_dev *dev, ad7768_sleep_mode mode)
Definition: ad7768.c:162
AD7768_DCLK_DIV_2
@ AD7768_DCLK_DIV_2
Definition: ad7768.h:135
AD7768_DCLK_DIV_1
@ AD7768_DCLK_DIV_1
Definition: ad7768.h:136
AD7768_FILTER_SINC
@ AD7768_FILTER_SINC
Definition: ad7768.h:180
ad7768_init_param::crc_sel
ad7768_crc_sel crc_sel
Definition: ad7768.h:233
ad7768_get_ch_mode
int32_t ad7768_get_ch_mode(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_mode *mode)
Definition: ad7768.c:606
ad7768_spi_write
int32_t ad7768_spi_write(ad7768_dev *dev, uint8_t reg_addr, uint8_t reg_data)
Definition: ad7768.c:94
ad7768_get_mclk_div
int32_t ad7768_get_mclk_div(ad7768_dev *dev, ad7768_mclk_div *clk_div)
Definition: ad7768.c:298
AD7768_FILTER_WIDEBAND
@ AD7768_FILTER_WIDEBAND
Definition: ad7768.h:179
AD7768_STANDARD_CONV
@ AD7768_STANDARD_CONV
Definition: ad7768.h:145
AD7768_DEC_X1024
@ AD7768_DEC_X1024
Definition: ad7768.h:189
ad7768_dev::spi_desc
no_os_spi_desc * spi_desc
Definition: ad7768.h:195
AD7768_REG_CH_STANDBY
#define AD7768_REG_CH_STANDBY
Definition: ad7768.h:52
ad7768_crc_sel
ad7768_crc_sel
Definition: ad7768.h:149
device
Definition: ad9361_util.h:75
ad7768_dev::dec_rate
ad7768_dec_rate dec_rate[2]
Definition: ad7768.h:213
ad7768_get_sleep_mode
int32_t ad7768_get_sleep_mode(ad7768_dev *dev, ad7768_sleep_mode *mode)
Definition: ad7768.c:180
AD7768_REG_INTERFACE_CFG
#define AD7768_REG_INTERFACE_CFG
Definition: ad7768.h:59
ad7768_get_conv_op
int32_t ad7768_get_conv_op(ad7768_dev *dev, ad7768_conv_op *conv_op)
Definition: ad7768.c:407
ad7768_ch_state
ad7768_ch_state
Definition: ad7768.h:168
ad7768_get_sleep_mode
int32_t ad7768_get_sleep_mode(ad7768_dev *dev, ad7768_sleep_mode *mode)
Definition: ad7768.c:180
ad7768_dev::gpio_mode0
struct no_os_gpio_desc * gpio_mode0
Definition: ad7768.h:198
ad7768_dev::power_mode
ad7768_power_mode power_mode
Definition: ad7768.h:205
NO_OS_GPIO_LOW
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
ad7768_init_param::power_mode
ad7768_power_mode power_mode
Definition: ad7768.h:229
ad7768_set_conv_op
int32_t ad7768_set_conv_op(ad7768_dev *dev, ad7768_conv_op conv_op)
Definition: ad7768.c:370
AD7768_DEC_X64
@ AD7768_DEC_X64
Definition: ad7768.h:185
AD7768_ACTIVE
@ AD7768_ACTIVE
Definition: ad7768.h:116
ad7768_set_mode_pins
int32_t ad7768_set_mode_pins(ad7768_dev *dev, uint8_t state)
Definition: ad7768.c:194
AD7768_CH_NO
@ AD7768_CH_NO
Definition: ad7768.h:165
ad7768_set_crc_sel
int32_t ad7768_set_crc_sel(ad7768_dev *dev, ad7768_crc_sel crc_sel)
Definition: ad7768.c:424
AD7768_DATA_CTRL_SINGLE_SHOT_EN
#define AD7768_DATA_CTRL_SINGLE_SHOT_EN
Definition: ad7768.h:103
AD7768_DCLK_DIV_8
@ AD7768_DCLK_DIV_8
Definition: ad7768.h:133
AD7768_MCLK_DIV_8
@ AD7768_MCLK_DIV_8
Definition: ad7768.h:128
ad7768_set_mode_config
int32_t ad7768_set_mode_config(ad7768_dev *dev, ad7768_ch_mode mode, ad7768_filt_type filt_type, ad7768_dec_rate dec_rate)
Definition: ad7768.c:522
ad7768_set_crc_sel
int32_t ad7768_set_crc_sel(ad7768_dev *dev, ad7768_crc_sel crc_sel)
Definition: ad7768.c:424
ad7768_get_dclk_div
int32_t ad7768_get_dclk_div(ad7768_dev *dev, ad7768_dclk_div *clk_div)
Definition: ad7768.c:353
AD7768_CH_MODE
#define AD7768_CH_MODE(x)
Definition: ad7768.h:93
ad7768_ch
ad7768_ch
Definition: ad7768.h:156
ad7768_dev::dclk_div
ad7768_dclk_div dclk_div
Definition: ad7768.h:207
AD7768_MCLK_DIV_4
@ AD7768_MCLK_DIV_4
Definition: ad7768.h:129
ad7768_get_power_mode
int32_t ad7768_get_power_mode(ad7768_dev *dev, ad7768_power_mode *mode)
Definition: ad7768.c:263
ad7768_init_param::conv_op
ad7768_conv_op conv_op
Definition: ad7768.h:232
ad7768_set_dclk_div
int32_t ad7768_set_dclk_div(ad7768_dev *dev, ad7768_dclk_div clk_div)
Definition: ad7768.c:316
AD7768_ENABLED
@ AD7768_ENABLED
Definition: ad7768.h:169
ad7768_dec_rate
ad7768_dec_rate
Definition: ad7768.h:183
ad7768_spi_read_mask
int32_t ad7768_spi_read_mask(ad7768_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
Definition: ad7768.c:116
AD7768_CRC_4
@ AD7768_CRC_4
Definition: ad7768.h:151
AD7768_REG_DATA_CTRL
#define AD7768_REG_DATA_CTRL
Definition: ad7768.h:58
ad7768_pin_spi_ctrl
ad7768_pin_spi_ctrl
Definition: ad7768.h:139
ad7768_dev::filt_type
ad7768_filt_type filt_type[2]
Definition: ad7768.h:212
AD7768_DEC_X1024_3RD
@ AD7768_DEC_X1024_3RD
Definition: ad7768.h:191
AD7768_ECO
@ AD7768_ECO
Definition: ad7768.h:121
ad7768_dev::gpio_mode2
struct no_os_gpio_desc * gpio_mode2
Definition: ad7768.h:200
ad7768_set_conv_op
int32_t ad7768_set_conv_op(ad7768_dev *dev, ad7768_conv_op conv_op)
Definition: ad7768.c:370
ad7768_dev::gpio_reset
struct no_os_gpio_desc * gpio_reset
Definition: ad7768.h:196
ad7768_ch_mode
ad7768_ch_mode
Definition: ad7768.h:173
ad7768_setup
int32_t ad7768_setup(ad7768_dev **device, ad7768_init_param init_param)
Definition: ad7768.c:622
AD7768_PWR_MODE_POWER_MODE
#define AD7768_PWR_MODE_POWER_MODE(x)
Definition: ad7768.h:97
ad7768_init_param::mclk_div
ad7768_mclk_div mclk_div
Definition: ad7768.h:230
ad7768.h
Header file of AD7768 Driver.
ad7768_dev::gpio_mode1
struct no_os_gpio_desc * gpio_mode1
Definition: ad7768.h:199
ad7768_filt_type
ad7768_filt_type
Definition: ad7768.h:178
AD7768_MEDIAN
@ AD7768_MEDIAN
Definition: ad7768.h:122
AD7768_CH4
@ AD7768_CH4
Definition: ad7768.h:161
AD7768_DEC_X128
@ AD7768_DEC_X128
Definition: ad7768.h:186
AD7768_STANDBY
@ AD7768_STANDBY
Definition: ad7768.h:170
AD7768_INTERFACE_CFG_DCLK_DIV
#define AD7768_INTERFACE_CFG_DCLK_DIV(x)
Definition: ad7768.h:108
ad7768_init_param::spi_init
no_os_spi_init_param spi_init
Definition: ad7768.h:218
AD7768_PWR_MODE_MCLK_DIV
#define AD7768_PWR_MODE_MCLK_DIV(x)
Definition: ad7768.h:99
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
AD7768_CH1
@ AD7768_CH1
Definition: ad7768.h:158
AD7768_MODE_A
@ AD7768_MODE_A
Definition: ad7768.h:174
ad7768_spi_read_mask
int32_t ad7768_spi_read_mask(ad7768_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
Definition: ad7768.c:116
ad7768_get_conv_op
int32_t ad7768_get_conv_op(ad7768_dev *dev, ad7768_conv_op *conv_op)
Definition: ad7768.c:407
ad7768_dev::crc_sel
ad7768_crc_sel crc_sel
Definition: ad7768.h:209
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
AD7768_CH7
@ AD7768_CH7
Definition: ad7768.h:164
AD7768_CH6
@ AD7768_CH6
Definition: ad7768.h:163
AD7768_CRC_16_2ND
@ AD7768_CRC_16_2ND
Definition: ad7768.h:153
AD7768_REG_CH_MODE_B
#define AD7768_REG_CH_MODE_B
Definition: ad7768.h:54
ad7768_conv_op
ad7768_conv_op
Definition: ad7768.h:144
ad7768_spi_write_mask
int32_t ad7768_spi_write_mask(ad7768_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Definition: ad7768.c:138
AD7768_FAST
@ AD7768_FAST
Definition: ad7768.h:123
standard_pin_ctrl_mode_sel
const uint8_t standard_pin_ctrl_mode_sel[3][4]
Definition: ad7768.c:47
ad7768_dev::conv_op
ad7768_conv_op conv_op
Definition: ad7768.h:208
ad7768_set_ch_mode
int32_t ad7768_set_ch_mode(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_mode mode)
Definition: ad7768.c:578
ad7768_dev::pin_spi_input_value
uint8_t pin_spi_input_value
Definition: ad7768.h:202
AD7768_CH2
@ AD7768_CH2
Definition: ad7768.h:159
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
AD7768_MCLK_DIV_32
@ AD7768_MCLK_DIV_32
Definition: ad7768.h:127
ad7768_dev::ch_state
ad7768_ch_state ch_state[8]
Definition: ad7768.h:210
ad7768_dev::ch_mode
ad7768_ch_mode ch_mode[8]
Definition: ad7768.h:211
ad7768_get_mode_config
int32_t ad7768_get_mode_config(ad7768_dev *dev, ad7768_ch_mode mode, ad7768_filt_type *filt_type, ad7768_dec_rate *dec_rate)
Definition: ad7768.c:550
AD7768_ONE_SHOT_CONV
@ AD7768_ONE_SHOT_CONV
Definition: ad7768.h:146
ad7768_get_mclk_div
int32_t ad7768_get_mclk_div(ad7768_dev *dev, ad7768_mclk_div *clk_div)
Definition: ad7768.c:298
ad7768_set_power_mode
int32_t ad7768_set_power_mode(ad7768_dev *dev, ad7768_power_mode mode)
Definition: ad7768.c:226
ad7768_set_mode_config
int32_t ad7768_set_mode_config(ad7768_dev *dev, ad7768_ch_mode mode, ad7768_filt_type filt_type, ad7768_dec_rate dec_rate)
Definition: ad7768.c:522
AD7768_SPI_CTRL
@ AD7768_SPI_CTRL
Definition: ad7768.h:141
AD7768_DEC_X32
@ AD7768_DEC_X32
Definition: ad7768.h:184
AD7768_REG_PWR_MODE
#define AD7768_REG_PWR_MODE
Definition: ad7768.h:56
ad7768_get_power_mode
int32_t ad7768_get_power_mode(ad7768_dev *dev, ad7768_power_mode *mode)
Definition: ad7768.c:263
ad7768_dev::gpio_mode3
struct no_os_gpio_desc * gpio_mode3
Definition: ad7768.h:201
no_os_gpio_set_value
int32_t no_os_gpio_set_value(struct no_os_gpio_desc *desc, uint8_t value)
Set the value of the specified GPIO.
Definition: no_os_gpio.c:160
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ad7768_set_ch_mode
int32_t ad7768_set_ch_mode(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_mode mode)
Definition: ad7768.c:578
AD7768_PIN_CTRL
@ AD7768_PIN_CTRL
Definition: ad7768.h:140
AD7768_INTERFACE_CFG_CRC_SEL
#define AD7768_INTERFACE_CFG_CRC_SEL(x)
Definition: ad7768.h:107
ad7768_dclk_div
ad7768_dclk_div
Definition: ad7768.h:132
ad7768_get_mode_config
int32_t ad7768_get_mode_config(ad7768_dev *dev, ad7768_ch_mode mode, ad7768_filt_type *filt_type, ad7768_dec_rate *dec_rate)
Definition: ad7768.c:550
ad7768_set_mclk_div
int32_t ad7768_set_mclk_div(ad7768_dev *dev, ad7768_mclk_div clk_div)
Definition: ad7768.c:280
AD7768_MODE_B
@ AD7768_MODE_B
Definition: ad7768.h:175
AD7768_CH0
@ AD7768_CH0
Definition: ad7768.h:157
ad7768_init_param::pin_spi_input_value
uint8_t pin_spi_input_value
Definition: ad7768.h:227
AD7768_NO_CRC
@ AD7768_NO_CRC
Definition: ad7768.h:150
ad7768_spi_read
int32_t ad7768_spi_read(ad7768_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7768.c:68
no_os_gpio.h
Header file of GPIO Interface.
ad7768_set_ch_state
int32_t ad7768_set_ch_state(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_state state)
Definition: ad7768.c:467
AD7768_REG_CH_MODE_A
#define AD7768_REG_CH_MODE_A
Definition: ad7768.h:53
ad7768_set_mclk_div
int32_t ad7768_set_mclk_div(ad7768_dev *dev, ad7768_mclk_div clk_div)
Definition: ad7768.c:280
ad7768_get_ch_mode
int32_t ad7768_get_ch_mode(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_mode *mode)
Definition: ad7768.c:606
AD7768_CH_STANDBY
#define AD7768_CH_STANDBY(x)
Definition: ad7768.h:86
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
AD7768_DCLK_DIV_4
@ AD7768_DCLK_DIV_4
Definition: ad7768.h:134
ad7768_spi_read
int32_t ad7768_spi_read(ad7768_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7768.c:68
AD7768_SLEEP
@ AD7768_SLEEP
Definition: ad7768.h:117
AD7768_PWR_MODE_SLEEP_MODE
#define AD7768_PWR_MODE_SLEEP_MODE
Definition: ad7768.h:96
AD7768_REG_CH_MODE_SEL
#define AD7768_REG_CH_MODE_SEL
Definition: ad7768.h:55
ad7768_get_dclk_div
int32_t ad7768_get_dclk_div(ad7768_dev *dev, ad7768_dclk_div *clk_div)
Definition: ad7768.c:353
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
ad7768_init_param
Definition: ad7768.h:216
one_shot_pin_ctrl_mode_sel
const uint8_t one_shot_pin_ctrl_mode_sel[3][4]
Definition: ad7768.c:54
ad7768_init_param::dclk_div
ad7768_dclk_div dclk_div
Definition: ad7768.h:231
ad7768_get_crc_sel
int32_t ad7768_get_crc_sel(ad7768_dev *dev, ad7768_crc_sel *crc_sel)
Definition: ad7768.c:442
ad7768_set_dclk_div
int32_t ad7768_set_dclk_div(ad7768_dev *dev, ad7768_dclk_div clk_div)
Definition: ad7768.c:316
ad7768_sleep_mode
ad7768_sleep_mode
Definition: ad7768.h:115
AD7768_CRC_16
@ AD7768_CRC_16
Definition: ad7768.h:152
ad7768_init_param::gpio_reset_value
uint8_t gpio_reset_value
Definition: ad7768.h:221
ad7768_get_ch_state
int32_t ad7768_get_ch_state(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_state *state)
Definition: ad7768.c:495
ad7768_set_ch_state
int32_t ad7768_set_ch_state(ad7768_dev *dev, ad7768_ch ch, ad7768_ch_state state)
Definition: ad7768.c:467
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
AD7768_CH5
@ AD7768_CH5
Definition: ad7768.h:162
AD7768_CH_MODE_FILTER_TYPE
#define AD7768_CH_MODE_FILTER_TYPE
Definition: ad7768.h:89