no-OS
ad7779.h
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1 /***************************************************************************/
39 #ifndef AD7779_H_
40 #define AD7779_H_
41 
42 /******************************************************************************/
43 /***************************** Include Files **********************************/
44 /******************************************************************************/
45 #include <stdint.h>
46 #include <stdbool.h>
47 #include "no_os_delay.h"
48 #include "no_os_gpio.h"
49 #include "no_os_spi.h"
50 
51 /******************************************************************************/
52 /********************** Macros and Constants Definitions **********************/
53 /******************************************************************************/
54 #define AD7779_REG_CH_CONFIG(ch) (0x00 + (ch)) // Channel Configuration
55 #define AD7779_REG_CH_DISABLE 0x08 // Disable clocks to ADC channel
56 #define AD7779_REG_CH_SYNC_OFFSET(ch) (0x09 + (ch)) // Channel SYNC Offset
57 #define AD7779_REG_GENERAL_USER_CONFIG_1 0x11 // General User Config 1
58 #define AD7779_REG_GENERAL_USER_CONFIG_2 0x12 // General User Config 2
59 #define AD7779_REG_GENERAL_USER_CONFIG_3 0x13 // General User Config 3
60 #define AD7779_REG_DOUT_FORMAT 0x14 // Data out format
61 #define AD7779_REG_ADC_MUX_CONFIG 0x15 // Main ADC meter and reference Mux control
62 #define AD7779_REG_GLOBAL_MUX_CONFIG 0x16 // Global diagnostics mux
63 #define AD7779_REG_GPIO_CONFIG 0x17 // GPIO config
64 #define AD7779_REG_GPIO_DATA 0x18 // GPIO Data
65 #define AD7779_REG_BUFFER_CONFIG_1 0x19 // Buffer Config 1
66 #define AD7779_REG_BUFFER_CONFIG_2 0x1A // Buffer Config 2
67 #define AD7779_REG_CH_OFFSET_UPPER_BYTE(ch) (0x1C + (ch) * 6) // Channel offset upper byte
68 #define AD7779_REG_CH_OFFSET_MID_BYTE(ch) (0x1D + (ch) * 6) // Channel offset middle byte
69 #define AD7779_REG_CH_OFFSET_LOWER_BYTE(ch) (0x1E + (ch) * 6) // Channel offset lower byte
70 #define AD7779_REG_CH_GAIN_UPPER_BYTE(ch) (0x1F + (ch) * 6) // Channel gain upper byte
71 #define AD7779_REG_CH_GAIN_MID_BYTE(ch) (0x20 + (ch) * 6) // Channel gain middle byte
72 #define AD7779_REG_CH_GAIN_LOWER_BYTE(ch) (0x21 + (ch) * 6) // Channel gain lower byte
73 #define AD7779_REG_CH_ERR_REG(ch) (0x4C + (ch)) // Channel Status Register
74 #define AD7779_REG_CH0_1_SAT_ERR 0x54 // Channel 0/1 DSP errors
75 #define AD7779_REG_CH2_3_SAT_ERR 0x55 // Channel 2/3 DSP errors
76 #define AD7779_REG_CH4_5_SAT_ERR 0x56 // Channel 4/5 DSP errors
77 #define AD7779_REG_CH6_7_SAT_ERR 0x57 // Channel 6/7 DSP errors
78 #define AD7779_REG_CHX_ERR_REG_EN 0x58 // Channel 0-7 Error Reg Enable
79 #define AD7779_REG_GEN_ERR_REG_1 0x59 // General Errors Register 1
80 #define AD7779_REG_GEN_ERR_REG_1_EN 0x5A // General Errors Register 1 Enable
81 #define AD7779_REG_GEN_ERR_REG_2 0x5B // General Errors Register 2
82 #define AD7779_REG_GEN_ERR_REG_2_EN 0x5C // General Errors Register 2 Enable
83 #define AD7779_REG_STATUS_REG_1 0x5D // Error Status Register 1
84 #define AD7779_REG_STATUS_REG_2 0x5E // Error Status Register 2
85 #define AD7779_REG_STATUS_REG_3 0x5F // Error Status Register 3
86 #define AD7779_REG_SRC_N_MSB 0x60 // Decimation Rate (N) MSB
87 #define AD7779_REG_SRC_N_LSB 0x61 // Decimation Rate (N) LSB
88 #define AD7779_REG_SRC_IF_MSB 0x62 // Decimation Rate (IF) MSB
89 #define AD7779_REG_SRC_IF_LSB 0x63 // Decimation Rate (IF) LSB
90 #define AD7779_REG_SRC_UPDATE 0x64 // SRC load source and load update
91 
92 /* AD7779_REG_CHx_CONFIG */
93 #define AD7779_CH_GAIN(x) (((x) & 0x3) << 6)
94 #define AD7779_CH_RX (1 << 4)
95 
96 /* AD7779_REG_CH_DISABLE */
97 #define AD7779_CH_DISABLE(x) (1 << (x))
98 
99 /* AD7779_REG_GENERAL_USER_CONFIG_1 */
100 #define AD7779_ALL_CH_DIS_MCLK_EN (1 << 7)
101 #define AD7779_MOD_POWERMODE (1 << 6)
102 #define AD7779_PDB_VCM (1 << 5)
103 #define AD7779_PDB_REFOUT_BUF (1 << 4)
104 #define AD7779_PDB_SAR (1 << 3)
105 #define AD7779_PDB_RC_OSC (1 << 2)
106 #define AD7779_SOFT_RESET(x) (((x) & 0x3) << 0)
107 
108 /* AD7779_REG_GENERAL_USER_CONFIG_2 */
109 #define AD7771_FILTER_MODE (1 << 6)
110 #define AD7779_SAR_DIAG_MODE_EN (1 << 5)
111 #define AD7779_SDO_DRIVE_STR(x) (((x) & 0x3) << 3)
112 #define AD7779_DOUT_DRIVE_STR(x) (((x) & 0x3) << 1)
113 #define AD7779_SPI_SYNC (1 << 0)
114 
115 /* AD7779_REG_GENERAL_USER_CONFIG_3 */
116 #define AD7779_CONVST_DEGLITCH_DIS(x) (((x) & 0x3) << 6)
117 #define AD7779_SPI_SLAVE_MODE_EN (1 << 4)
118 #define AD7779_CLK_QUAL_DIS (1 << 0)
119 
120 /* AD7779_REG_DOUT_FORMAT */
121 #define AD7779_DOUT_FORMAT(x) (((x) & 0x3) << 6)
122 #define AD7779_DOUT_HEADER_FORMAT (1 << 5)
123 #define AD7779_DCLK_CLK_DIV(x) (((x) & 0x7) << 1)
124 
125 /* AD7779_REG_GLOBAL_MUX_CONFIG */
126 #define AD7779_GLOBAL_MUX_CTRL(x) (((x) & 0x1F) << 3)
127 
128 /* AD7779_REG_BUFFER_CONFIG_1 */
129 #define AD7779_REF_BUF_POS_EN (1 << 4)
130 #define AD7779_REF_BUF_NEG_EN (1 << 3)
131 
132 /* AD7779_REG_BUFFER_CONFIG_2 */
133 #define AD7779_REFBUFP_PREQ (1 << 7)
134 #define AD7779_REFBUFN_PREQ (1 << 6)
135 #define AD7779_PDB_ALDO1_OVRDRV (1 << 2)
136 #define AD7779_PDB_ALDO2_OVRDRV (1 << 1)
137 #define AD7779_PDB_DLDO_OVRDRV (1 << 0)
138 
139 /* AD7779_REG_GEN_ERR_REG_1_EN */
140 #define AD7779_MEMMAP_CRC_TEST_EN (1 << 5)
141 #define AD7779_ROM_CRC_TEST_EN (1 << 4)
142 #define AD7779_SPI_CLK_COUNT_TEST_EN (1 << 3)
143 #define AD7779_SPI_INVALID_READ_TEST_EN (1 << 2)
144 #define AD7779_SPI_INVALID_WRITE_TEST_EN (1 << 1)
145 #define AD7779_SPI_CRC_TEST_EN (1 << 0)
146 
147 #define AD7779_CRC8_POLY 0x07
148 
149 /******************************************************************************/
150 /*************************** Types Declarations *******************************/
151 /******************************************************************************/
152 typedef enum {
156 
157 typedef enum {
162 
163 typedef enum {
172 } ad7779_ch;
173 
174 typedef enum {
177 } ad7779_state;
178 
179 typedef enum {
184 } ad7779_gain;
185 
186 typedef enum {
196 
197 typedef enum {
201 
202 typedef enum {
206 
207 typedef enum {
211 
212 typedef enum {
217 
218 typedef enum {
242 
243 typedef struct {
244  /* SPI */
246  /* GPIO */
257  /* Device Settings */
261  ad7779_state state[8];
262  ad7779_gain gain[8];
263  uint16_t dec_rate_int;
264  uint16_t dec_rate_dec;
268  uint8_t sync_offset[8];
269  uint32_t offset_corr[8];
270  uint32_t gain_corr[8];
271  ad7779_ref_buf_op_mode ref_buf_op_mode[2];
274  ad7779_state sinc5_state; // Can be enabled only for AD7771
276  uint8_t cached_reg_val[AD7779_REG_SRC_UPDATE + 1];
277 } ad7779_dev;
278 
279 typedef struct {
280  /* SPI */
281  struct no_os_spi_init_param spi_init;
282  /* GPIO */
283  struct no_os_gpio_init_param gpio_reset;
284  struct no_os_gpio_init_param gpio_mode0;
285  struct no_os_gpio_init_param gpio_mode1;
286  struct no_os_gpio_init_param gpio_mode2;
287  struct no_os_gpio_init_param gpio_mode3;
288  struct no_os_gpio_init_param gpio_dclk0;
289  struct no_os_gpio_init_param gpio_dclk1;
290  struct no_os_gpio_init_param gpio_dclk2;
291  struct no_os_gpio_init_param gpio_sync_in;
292  struct no_os_gpio_init_param gpio_convst_sar;
293  /* Device Settings */
296  ad7779_state state[8];
297  ad7779_gain gain[8];
298  uint16_t dec_rate_int;
299  uint16_t dec_rate_dec;
303  uint8_t sync_offset[8];
304  uint32_t offset_corr[8];
305  uint32_t gain_corr[8];
306  ad7779_ref_buf_op_mode ref_buf_op_mode[2];
307  ad7779_state sinc5_state; // Can be enabled only for AD7771
310 
311 /******************************************************************************/
312 /************************ Functions Declarations ******************************/
313 /******************************************************************************/
314 /* Compute CRC8 checksum. */
315 uint8_t ad7779_compute_crc8(uint8_t *data,
316  uint8_t data_size);
317 /* SPI read from device. */
319  uint8_t reg_addr,
320  uint8_t *reg_data);
321 /* SPI write to device. */
323  uint8_t reg_addr,
324  uint8_t reg_data);
325 /* SPI read from device using a mask. */
327  uint8_t reg_addr,
328  uint8_t mask,
329  uint8_t *data);
330 /* SPI write to device using a mask. */
332  uint8_t reg_addr,
333  uint8_t mask,
334  uint8_t data);
335 /* SPI SAR conversion code read. */
337  ad7779_sar_mux mux_next_conv,
338  uint16_t *sar_code);
339 /* Set SPI operation mode. */
341  ad7779_spi_op_mode mode);
342 /* Get SPI operation mode. */
344  ad7779_spi_op_mode *mode);
345 /* Set the state (enable, disable) of the channel. */
346 int32_t ad7779_set_state(ad7779_dev *dev,
347  ad7779_ch ch,
348  ad7779_state state);
349 /* Get the state (enable, disable) of the selected channel. */
350 int32_t ad7779_get_state(ad7779_dev *dev,
351  ad7779_ch ch,
352  ad7779_state *state);
353 /* Update the state of the MODEx pins according to the settings specified in
354  * the device structure. */
356 /* Set the gain of the selected channel. */
357 int32_t ad7779_set_gain(ad7779_dev *dev,
358  ad7779_ch ch,
359  ad7779_gain gain);
360 /* Get the gain of the selected channel. */
361 int32_t ad7779_get_gain(ad7779_dev *dev,
362  ad7779_ch ch,
363  ad7779_gain *gain);
364 /* Set the decimation rate. */
365 int32_t ad7779_set_dec_rate(ad7779_dev *dev,
366  uint16_t int_val,
367  uint16_t dec_val);
368 /* Get the decimation rate. */
369 int32_t ad7779_get_dec_rate(ad7779_dev *dev,
370  uint16_t *int_val,
371  uint16_t *dec_val);
372 /* Set the power mode. */
373 int32_t ad7779_set_power_mode(ad7779_dev *dev,
374  ad7779_pwr_mode pwr_mode);
375 /* Get the power mode. */
376 int32_t ad7779_get_power_mode(ad7779_dev *dev,
377  ad7779_pwr_mode *pwr_mode);
378 /* Set the reference type. */
380  ad7779_ref_type ref_type);
381 /* Get the reference type. */
383  ad7779_ref_type *ref_type);
384 /* Set the DCLK divider. */
385 int32_t ad7779_set_dclk_div(ad7779_dev *dev,
386  ad7779_dclk_div div);
387 /* Get the DCLK divider. */
388 int32_t ad7779_get_dclk_div(ad7779_dev *dev,
389  ad7779_dclk_div *div);
390 /* Set the synchronization offset of the selected channel. */
392  ad7779_ch ch,
393  uint8_t sync_offset);
394 /* Get the synchronization offset of the selected channel. */
396  ad7779_ch ch,
397  uint8_t *sync_offset);
398 /* Set the offset correction of the selected channel. */
400  ad7779_ch ch,
401  uint32_t offset);
402 /* Get the offset correction of the selected channel. */
404  ad7779_ch ch,
405  uint32_t *offset);
406 /* Set the gain correction of the selected channel. */
407 int32_t ad7779_set_gain_corr(ad7779_dev *dev,
408  ad7779_ch ch,
409  uint32_t gain);
410 /* Get the gain correction of the selected channel. */
411 int32_t ad7779_get_gain_corr(ad7779_dev *dev,
412  ad7779_ch ch,
413  uint32_t *gain);
414 /* Set the reference buffer operation mode of the selected pin. */
416  ad7779_refx_pin refx_pin,
418 /* Get the reference buffer operation mode of the selected pin. */
420  ad7779_refx_pin refx_pin,
421  ad7779_ref_buf_op_mode *mode);
422 /* Set the SAR ADC configuration. */
423 int32_t ad7779_set_sar_cfg(ad7779_dev *dev,
424  ad7779_state state,
425  ad7779_sar_mux mux);
426 /* Get the SAR ADC configuration. */
427 int32_t ad7779_get_sar_cfg(ad7779_dev *dev,
428  ad7779_state *state,
429  ad7779_sar_mux *mux);
430 /* Do a single SAR conversion. */
432  ad7779_sar_mux mux,
433  uint16_t *sar_code);
434 /* Do a SPI software reset. */
436 /* Set the state (enable, disable) of the SINC5 filter. */
438  ad7779_state state);
439 /* Get the state (enable, disable) of the SINC5 filter. */
441  ad7779_state *state);
442 /* Initialize the device. */
443 int32_t ad7779_init(ad7779_dev **device,
445 
446 /* Free the resources allocated by ad7779_init(). */
447 int32_t ad7779_remove(ad7779_dev *dev);
448 
449 #endif // AD7779_H_
AD7779_REG_GLOBAL_MUX_CONFIG
#define AD7779_REG_GLOBAL_MUX_CONFIG
Definition: ad7779.h:62
ad7779_init_param::ctrl_mode
ad7779_ctrl_mode ctrl_mode
Definition: ad7779.h:294
AD7779_MOD_POWERMODE
#define AD7779_MOD_POWERMODE
Definition: ad7779.h:101
AD7779_AVDD2A_AVSSX_ATT
@ AD7779_AVDD2A_AVSSX_ATT
Definition: ad7779.h:230
ad7779_init_param::ref_type
ad7779_ref_type ref_type
Definition: ad7779.h:300
ad7779_spi_int_reg_read_mask
int32_t ad7779_spi_int_reg_read_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
Definition: ad7779.c:173
AD7779_REG_CH_SYNC_OFFSET
#define AD7779_REG_CH_SYNC_OFFSET(ch)
Definition: ad7779.h:56
ad7779_get_sar_cfg
int32_t ad7779_get_sar_cfg(ad7779_dev *dev, ad7779_state *state, ad7779_sar_mux *mux)
Definition: ad7779.c:1306
ad7779_init_param::pwr_mode
ad7779_pwr_mode pwr_mode
Definition: ad7779.h:301
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
AD7779_PIN_CTRL
@ AD7779_PIN_CTRL
Definition: ad7779.h:153
AD7779_REG_BUFFER_CONFIG_2
#define AD7779_REG_BUFFER_CONFIG_2
Definition: ad7779.h:66
ad7779_compute_crc8
uint8_t ad7779_compute_crc8(uint8_t *data, uint8_t data_size)
Definition: ad7779.c:81
AD7779_REG_CH_GAIN_UPPER_BYTE
#define AD7779_REG_CH_GAIN_UPPER_BYTE(ch)
Definition: ad7779.h:70
ad7779_dev::dec_rate_int
uint16_t dec_rate_int
Definition: ad7779.h:263
ad7779_get_gain
int32_t ad7779_get_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain *gain)
Definition: ad7779.c:562
ad7779_dev::sinc5_state
ad7779_state sinc5_state
Definition: ad7779.h:274
AD7779_REG_CH_OFFSET_UPPER_BYTE
#define AD7779_REG_CH_OFFSET_UPPER_BYTE(ch)
Definition: ad7779.h:67
ad7779_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: ad7779.h:245
ad7779_dev::gpio_dclk0
struct no_os_gpio_desc * gpio_dclk0
Definition: ad7779.h:252
ad7779_get_state
int32_t ad7779_get_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state *state)
Definition: ad7779.c:478
ad7779_spi_int_reg_write
int32_t ad7779_spi_int_reg_write(ad7779_dev *dev, uint8_t reg_addr, uint8_t reg_data)
Definition: ad7779.c:145
AD7779_REG_SRC_UPDATE
#define AD7779_REG_SRC_UPDATE
Definition: ad7779.h:90
ad7779_dev::cached_reg_val
uint8_t cached_reg_val[AD7779_REG_SRC_UPDATE+1]
Definition: ad7779.h:276
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:83
AD7779_CRC8_POLY
#define AD7779_CRC8_POLY
Definition: ad7779.h:147
ad7779_spi_sar_read_code
int32_t ad7779_spi_sar_read_code(ad7779_dev *dev, ad7779_sar_mux mux_next_conv, uint16_t *sar_code)
Definition: ad7779.c:241
ad7779_init_param::dec_rate_dec
uint16_t dec_rate_dec
Definition: ad7779.h:299
ad7779_get_dec_rate
int32_t ad7779_get_dec_rate(ad7779_dev *dev, uint16_t *int_val, uint16_t *dec_val)
Definition: ad7779.c:646
AD7779_DCLK_DIV_32
@ AD7779_DCLK_DIV_32
Definition: ad7779.h:192
ad7779_dev::gpio_reset
struct no_os_gpio_desc * gpio_reset
Definition: ad7779.h:247
ad7779_spi_int_reg_write_mask
int32_t ad7779_spi_int_reg_write_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Definition: ad7779.c:195
ad7779_get_state
int32_t ad7779_get_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state *state)
Definition: ad7779.c:478
AD7779_SD_CONV
@ AD7779_SD_CONV
Definition: ad7779.h:159
no_os_spi.h
Header file of SPI Interface.
ad7779_set_sync_offset
int32_t ad7779_set_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t sync_offset)
Definition: ad7779.c:849
ad7779_get_sync_offset
int32_t ad7779_get_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t *sync_offset)
Definition: ad7779.c:884
AD7779_REFX_N
@ AD7779_REFX_N
Definition: ad7779.h:209
ad7779_set_dclk_div
int32_t ad7779_set_dclk_div(ad7779_dev *dev, ad7779_dclk_div div)
Definition: ad7779.c:787
ad7779_dev::sar_mux
ad7779_sar_mux sar_mux
Definition: ad7779.h:273
AD7779_DGND_AVSS1A_ATT
@ AD7779_DGND_AVSS1A_ATT
Definition: ad7779.h:234
ad7779_spi_int_reg_read
int32_t ad7779_spi_int_reg_read(ad7779_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7779.c:109
AD7779_ENABLE
@ AD7779_ENABLE
Definition: ad7779.h:175
ad7779_get_ref_buf_op_mode
int32_t ad7779_get_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode *mode)
Definition: ad7779.c:1197
ad7779_init_param::spi_crc_en
ad7779_state spi_crc_en
Definition: ad7779.h:295
AD7779_INT_REF
@ AD7779_INT_REF
Definition: ad7779.h:204
AD7779_REG_SRC_N_LSB
#define AD7779_REG_SRC_N_LSB
Definition: ad7779.h:87
AD7779_REG_CH_OFFSET_LOWER_BYTE
#define AD7779_REG_CH_OFFSET_LOWER_BYTE(ch)
Definition: ad7779.h:69
ad7779_set_reference_type
int32_t ad7779_set_reference_type(ad7779_dev *dev, ad7779_ref_type ref_type)
Definition: ad7779.c:735
ad7779_get_sync_offset
int32_t ad7779_get_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t *sync_offset)
Definition: ad7779.c:884
ad7779_set_ref_buf_op_mode
int32_t ad7779_set_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode mode)
Definition: ad7779.c:1121
ad7779_dev::dclk_div
ad7779_dclk_div dclk_div
Definition: ad7779.h:267
AD7779_DVBE_AVSSX
@ AD7779_DVBE_AVSSX
Definition: ad7779.h:220
ad7779_set_dec_rate
int32_t ad7779_set_dec_rate(ad7779_dev *dev, uint16_t int_val, uint16_t dec_val)
Definition: ad7779.c:588
ad7779_refx_pin
ad7779_refx_pin
Definition: ad7779.h:207
ad7771_set_sinc5_filter_state
int32_t ad7771_set_sinc5_filter_state(ad7779_dev *dev, ad7779_state state)
Definition: ad7779.c:1411
ad7779_remove
int32_t ad7779_remove(ad7779_dev *dev)
Free the resources allocated by ad7779_init().
Definition: ad7779.c:1612
ad7779_set_gain
int32_t ad7779_set_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain gain)
Definition: ad7779.c:517
ad7779_dev::offset_corr
uint32_t offset_corr[8]
Definition: ad7779.h:269
no_os_delay.h
Header file of Delay functions.
pin_mode_options
const uint8_t pin_mode_options[16][4]
Definition: ad7779.c:52
ad7779_init_param::sinc5_state
ad7779_state sinc5_state
Definition: ad7779.h:307
ad7779_init
int32_t ad7779_init(ad7779_dev **device, ad7779_init_param init_param)
Definition: ad7779.c:1468
ad7779_get_dclk_div
int32_t ad7779_get_dclk_div(ad7779_dev *dev, ad7779_dclk_div *div)
Definition: ad7779.c:816
ad7779_spi_int_reg_write
int32_t ad7779_spi_int_reg_write(ad7779_dev *dev, uint8_t reg_addr, uint8_t reg_data)
Definition: ad7779.c:145
ad7779_get_spi_op_mode
int32_t ad7779_get_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode *mode)
Definition: ad7779.c:320
ad7779_get_gain_corr
int32_t ad7779_get_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *gain)
Definition: ad7779.c:1072
device
Definition: ad9361_util.h:75
ad7779_dev::spi_crc_en
ad7779_state spi_crc_en
Definition: ad7779.h:259
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
AD7779_REFBUFN_PREQ
#define AD7779_REFBUFN_PREQ
Definition: ad7779.h:134
AD7779_REG_SRC_N_MSB
#define AD7779_REG_SRC_N_MSB
Definition: ad7779.h:86
AD7779_REG_DOUT_FORMAT
#define AD7779_REG_DOUT_FORMAT
Definition: ad7779.h:60
AD7779_GLOBAL_MUX_CTRL
#define AD7779_GLOBAL_MUX_CTRL(x)
Definition: ad7779.h:126
AD7779_REF2P_AVSSX
@ AD7779_REF2P_AVSSX
Definition: ad7779.h:239
AD7779_REF_BUF_PRECHARGED
@ AD7779_REF_BUF_PRECHARGED
Definition: ad7779.h:214
ad7779_set_power_mode
int32_t ad7779_set_power_mode(ad7779_dev *dev, ad7779_pwr_mode pwr_mode)
Definition: ad7779.c:689
ad7779_get_power_mode
int32_t ad7779_get_power_mode(ad7779_dev *dev, ad7779_pwr_mode *pwr_mode)
Definition: ad7779.c:709
AD7779_CH5
@ AD7779_CH5
Definition: ad7779.h:169
ad7779_set_gain_corr
int32_t ad7779_set_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t gain)
Definition: ad7779.c:1024
ad7779_dev::gpio_convst_sar
struct no_os_gpio_desc * gpio_convst_sar
Definition: ad7779.h:256
AD7779_VCM_AVSSX
@ AD7779_VCM_AVSSX
Definition: ad7779.h:224
ad7779_dev::gain
ad7779_gain gain[8]
Definition: ad7779.h:262
ad7779_dev::state
ad7779_state state[8]
Definition: ad7779.h:261
ad7779_state
ad7779_state
Definition: ad7779.h:174
ad7779_dev::sync_offset
uint8_t sync_offset[8]
Definition: ad7779.h:268
AD7779_REG_CH_GAIN_MID_BYTE
#define AD7779_REG_CH_GAIN_MID_BYTE(ch)
Definition: ad7779.h:71
AD7779_REG_GENERAL_USER_CONFIG_1
#define AD7779_REG_GENERAL_USER_CONFIG_1
Definition: ad7779.h:57
AD7779_AUXAINP_AUXAINN
@ AD7779_AUXAINP_AUXAINN
Definition: ad7779.h:219
ad7779_dev::gpio_mode1
struct no_os_gpio_desc * gpio_mode1
Definition: ad7779.h:249
ad7779_set_power_mode
int32_t ad7779_set_power_mode(ad7779_dev *dev, ad7779_pwr_mode pwr_mode)
Definition: ad7779.c:689
ad7779_set_reference_type
int32_t ad7779_set_reference_type(ad7779_dev *dev, ad7779_ref_type ref_type)
Definition: ad7779.c:735
AD7779_REG_CH_DISABLE
#define AD7779_REG_CH_DISABLE
Definition: ad7779.h:55
ad7779_do_update_mode_pins
int32_t ad7779_do_update_mode_pins(ad7779_dev *dev)
Definition: ad7779.c:361
ad7779_set_dec_rate
int32_t ad7779_set_dec_rate(ad7779_dev *dev, uint16_t int_val, uint16_t dec_val)
Definition: ad7779.c:588
AD7779_PDB_REFOUT_BUF
#define AD7779_PDB_REFOUT_BUF
Definition: ad7779.h:103
NO_OS_GPIO_LOW
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
AD7779_AVDD1A_AVSSX_ATT
@ AD7779_AVDD1A_AVSSX_ATT
Definition: ad7779.h:228
ad7779_set_spi_op_mode
int32_t ad7779_set_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode mode)
Definition: ad7779.c:281
AD7779_DCLK_DIV_64
@ AD7779_DCLK_DIV_64
Definition: ad7779.h:193
ad7779_ch
ad7779_ch
Definition: ad7779.h:163
AD7779_SPI_CTRL
@ AD7779_SPI_CTRL
Definition: ad7779.h:154
ad7779_init_param::dec_rate_int
uint16_t dec_rate_int
Definition: ad7779.h:298
AD7779_REG_GENERAL_USER_CONFIG_3
#define AD7779_REG_GENERAL_USER_CONFIG_3
Definition: ad7779.h:59
AD7779_DCLK_DIV_8
@ AD7779_DCLK_DIV_8
Definition: ad7779.h:190
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
ad7779_dev::gpio_mode2
struct no_os_gpio_desc * gpio_mode2
Definition: ad7779.h:250
ad7779_spi_op_mode
ad7779_spi_op_mode
Definition: ad7779.h:157
ad7779_do_update_mode_pins
int32_t ad7779_do_update_mode_pins(ad7779_dev *dev)
Definition: ad7779.c:361
AD7779_REF2P_REF2N
@ AD7779_REF2P_REF2N
Definition: ad7779.h:222
AD7779_REF1P_AVSSX
@ AD7779_REF1P_AVSSX
Definition: ad7779.h:238
no_os_error.h
Error codes definition.
ad7779_dev::ref_buf_op_mode
ad7779_ref_buf_op_mode ref_buf_op_mode[2]
Definition: ad7779.h:271
AD7779_GAIN_2
@ AD7779_GAIN_2
Definition: ad7779.h:181
ad7779_ref_type
ad7779_ref_type
Definition: ad7779.h:202
AD7779_REG_GENERAL_USER_CONFIG_2
#define AD7779_REG_GENERAL_USER_CONFIG_2
Definition: ad7779.h:58
AD7779_REG_CH_OFFSET_MID_BYTE
#define AD7779_REG_CH_OFFSET_MID_BYTE(ch)
Definition: ad7779.h:68
AD7779_LOW_PWR
@ AD7779_LOW_PWR
Definition: ad7779.h:198
AD7779_REFX_P
@ AD7779_REFX_P
Definition: ad7779.h:208
AD7779_IOVDD_DGND_ATT
@ AD7779_IOVDD_DGND_ATT
Definition: ad7779.h:232
AD7779_REF_BUF_DISABLED
@ AD7779_REF_BUF_DISABLED
Definition: ad7779.h:215
AD7779_AVDD4_AVSSX
@ AD7779_AVDD4_AVSSX
Definition: ad7779.h:233
ad7779_dev::pwr_mode
ad7779_pwr_mode pwr_mode
Definition: ad7779.h:266
AD7779_DCLK_DIV_1
@ AD7779_DCLK_DIV_1
Definition: ad7779.h:187
ad7771_get_sinc5_filter_state
int32_t ad7771_get_sinc5_filter_state(ad7779_dev *dev, ad7779_state *state)
Definition: ad7779.c:1438
ad7779_set_sync_offset
int32_t ad7779_set_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t sync_offset)
Definition: ad7779.c:849
ad7779_dev::ref_type
ad7779_ref_type ref_type
Definition: ad7779.h:265
AD7779_REG_SRC_IF_MSB
#define AD7779_REG_SRC_IF_MSB
Definition: ad7779.h:88
ad7779_spi_int_reg_read
int32_t ad7779_spi_int_reg_read(ad7779_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7779.c:109
AD7779_DREGCAP_DGND_ATT
@ AD7779_DREGCAP_DGND_ATT
Definition: ad7779.h:227
AD7779_AVDD4_AVSSX_ATT
@ AD7779_AVDD4_AVSSX_ATT
Definition: ad7779.h:237
AD7779_REG_GEN_ERR_REG_1_EN
#define AD7779_REG_GEN_ERR_REG_1_EN
Definition: ad7779.h:80
ad7779_set_state
int32_t ad7779_set_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state state)
Definition: ad7779.c:448
ad7779_init_param::read_from_cache
bool read_from_cache
Definition: ad7779.h:308
ad7779_set_sar_cfg
int32_t ad7779_set_sar_cfg(ad7779_dev *dev, ad7779_state state, ad7779_sar_mux mux)
Definition: ad7779.c:1279
ad7779_gain
ad7779_gain
Definition: ad7779.h:179
ad7779_set_offset_corr
int32_t ad7779_set_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t offset)
Definition: ad7779.c:924
AD7779_REFBUFP_PREQ
#define AD7779_REFBUFP_PREQ
Definition: ad7779.h:133
AD7779_CH7
@ AD7779_CH7
Definition: ad7779.h:171
AD7779_AVDD1B_AVSSX_ATT
@ AD7779_AVDD1B_AVSSX_ATT
Definition: ad7779.h:229
ad7779_get_dclk_div
int32_t ad7779_get_dclk_div(ad7779_dev *dev, ad7779_dclk_div *div)
Definition: ad7779.c:816
AD7779_REF_BUF_POS_EN
#define AD7779_REF_BUF_POS_EN
Definition: ad7779.h:129
ad7779_get_gain_corr
int32_t ad7779_get_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *gain)
Definition: ad7779.c:1072
ad7779_compute_crc8
uint8_t ad7779_compute_crc8(uint8_t *data, uint8_t data_size)
Definition: ad7779.c:81
ad7779_set_offset_corr
int32_t ad7779_set_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t offset)
Definition: ad7779.c:924
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
ad7779_dev::gpio_dclk1
struct no_os_gpio_desc * gpio_dclk1
Definition: ad7779.h:253
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:143
ad7771_get_sinc5_filter_state
int32_t ad7771_get_sinc5_filter_state(ad7779_dev *dev, ad7779_state *state)
Definition: ad7779.c:1438
AD7779_CH_GAIN
#define AD7779_CH_GAIN(x)
Definition: ad7779.h:93
ad7779_dev::gpio_mode3
struct no_os_gpio_desc * gpio_mode3
Definition: ad7779.h:251
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
AD7779_INT_REG
@ AD7779_INT_REG
Definition: ad7779.h:158
ad7779_sar_mux
ad7779_sar_mux
Definition: ad7779.h:218
AD7779_AVDD2B_AVSSX_ATT
@ AD7779_AVDD2B_AVSSX_ATT
Definition: ad7779.h:231
AD7779_GAIN_1
@ AD7779_GAIN_1
Definition: ad7779.h:180
AD7779_SPI_CRC_TEST_EN
#define AD7779_SPI_CRC_TEST_EN
Definition: ad7779.h:145
ad7779_do_spi_soft_reset
int32_t ad7779_do_spi_soft_reset(ad7779_dev *dev)
Definition: ad7779.c:1391
ad7779_spi_sar_read_code
int32_t ad7779_spi_sar_read_code(ad7779_dev *dev, ad7779_sar_mux mux_next_conv, uint16_t *sar_code)
Definition: ad7779.c:241
ad7779_get_dec_rate
int32_t ad7779_get_dec_rate(ad7779_dev *dev, uint16_t *int_val, uint16_t *dec_val)
Definition: ad7779.c:646
AD7779_GAIN_4
@ AD7779_GAIN_4
Definition: ad7779.h:182
ad7779_get_reference_type
int32_t ad7779_get_reference_type(ad7779_dev *dev, ad7779_ref_type *ref_type)
Definition: ad7779.c:755
ad7779_set_sar_cfg
int32_t ad7779_set_sar_cfg(ad7779_dev *dev, ad7779_state state, ad7779_sar_mux mux)
Definition: ad7779.c:1279
ad7779_ctrl_mode
ad7779_ctrl_mode
Definition: ad7779.h:152
ad7779_dev::gpio_mode0
struct no_os_gpio_desc * gpio_mode0
Definition: ad7779.h:248
AD7779_DGND_AVSSX_ATT
@ AD7779_DGND_AVSSX_ATT
Definition: ad7779.h:236
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
ad7779_dev
Definition: ad7779.h:243
AD7779_CH1
@ AD7779_CH1
Definition: ad7779.h:165
ad7779_get_reference_type
int32_t ad7779_get_reference_type(ad7779_dev *dev, ad7779_ref_type *ref_type)
Definition: ad7779.c:755
AD7779_DGND_AVSS1B_ATT
@ AD7779_DGND_AVSS1B_ATT
Definition: ad7779.h:235
AD7779_REG_CH_GAIN_LOWER_BYTE
#define AD7779_REG_CH_GAIN_LOWER_BYTE(ch)
Definition: ad7779.h:72
no_os_field_get
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
ad7771_set_sinc5_filter_state
int32_t ad7771_set_sinc5_filter_state(ad7779_dev *dev, ad7779_state state)
Definition: ad7779.c:1411
ad7779_do_single_sar_conv
int32_t ad7779_do_single_sar_conv(ad7779_dev *dev, ad7779_sar_mux mux, uint16_t *sar_code)
Definition: ad7779.c:1363
AD7779_REG_SRC_IF_LSB
#define AD7779_REG_SRC_IF_LSB
Definition: ad7779.h:89
AD7779_AVSSX_AVDD4_ATT
@ AD7779_AVSSX_AVDD4_ATT
Definition: ad7779.h:240
ad7779.h
Header file of AD7779 Driver.
AD7779_REF_BUF_NEG_EN
#define AD7779_REF_BUF_NEG_EN
Definition: ad7779.h:130
ad7779_init_param::dclk_div
ad7779_dclk_div dclk_div
Definition: ad7779.h:302
AD7779_EXT_REF
@ AD7779_EXT_REF
Definition: ad7779.h:203
AD7779_PDB_SAR
#define AD7779_PDB_SAR
Definition: ad7779.h:104
ad7779_get_offset_corr
int32_t ad7779_get_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *offset)
Definition: ad7779.c:971
no_os_gpio_set_value
int32_t no_os_gpio_set_value(struct no_os_gpio_desc *desc, uint8_t value)
Set the value of the specified GPIO.
Definition: no_os_gpio.c:160
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ad7779_get_power_mode
int32_t ad7779_get_power_mode(ad7779_dev *dev, ad7779_pwr_mode *pwr_mode)
Definition: ad7779.c:709
ad7779_set_gain_corr
int32_t ad7779_set_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t gain)
Definition: ad7779.c:1024
AD7779_SPI_SLAVE_MODE_EN
#define AD7779_SPI_SLAVE_MODE_EN
Definition: ad7779.h:117
ad7779_dev::ctrl_mode
ad7779_ctrl_mode ctrl_mode
Definition: ad7779.h:258
AD7779_DISABLE
@ AD7779_DISABLE
Definition: ad7779.h:176
ad7779_dclk_div
ad7779_dclk_div
Definition: ad7779.h:186
AD7779_DCLK_DIV_2
@ AD7779_DCLK_DIV_2
Definition: ad7779.h:188
AD7779_DCLK_DIV_128
@ AD7779_DCLK_DIV_128
Definition: ad7779.h:194
ad7779_set_state
int32_t ad7779_set_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state state)
Definition: ad7779.c:448
AD7779_CH2
@ AD7779_CH2
Definition: ad7779.h:166
ad7779_dev::sar_state
ad7779_state sar_state
Definition: ad7779.h:272
ad7779_spi_int_reg_write_mask
int32_t ad7779_spi_int_reg_write_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Definition: ad7779.c:195
ad7779_dev::gpio_sync_in
struct no_os_gpio_desc * gpio_sync_in
Definition: ad7779.h:255
ad7779_set_dclk_div
int32_t ad7779_set_dclk_div(ad7779_dev *dev, ad7779_dclk_div div)
Definition: ad7779.c:787
AD7779_CH0
@ AD7779_CH0
Definition: ad7779.h:164
ad7779_dev::dec_rate_dec
uint16_t dec_rate_dec
Definition: ad7779.h:264
AD7779_CH3
@ AD7779_CH3
Definition: ad7779.h:167
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:71
ad7779_do_single_sar_conv
int32_t ad7779_do_single_sar_conv(ad7779_dev *dev, ad7779_sar_mux mux, uint16_t *sar_code)
Definition: ad7779.c:1363
ad7779_set_spi_op_mode
int32_t ad7779_set_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode mode)
Definition: ad7779.c:281
ad7779_pwr_mode
ad7779_pwr_mode
Definition: ad7779.h:197
no_os_gpio.h
Header file of GPIO Interface.
AD7779_CH6
@ AD7779_CH6
Definition: ad7779.h:170
ad7779_get_ref_buf_op_mode
int32_t ad7779_get_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode *mode)
Definition: ad7779.c:1197
AD7779_REG_CH_CONFIG
#define AD7779_REG_CH_CONFIG(ch)
Definition: ad7779.h:54
ad7779_dev::spi_op_mode
ad7779_spi_op_mode spi_op_mode
Definition: ad7779.h:260
AD7779_CH_DISABLE
#define AD7779_CH_DISABLE(x)
Definition: ad7779.h:97
AD7779_REF1P_REF1N
@ AD7779_REF1P_REF1N
Definition: ad7779.h:221
ad7779_set_ref_buf_op_mode
int32_t ad7779_set_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode mode)
Definition: ad7779.c:1121
AD7779_AREG1CAP_AVSSX_ATT
@ AD7779_AREG1CAP_AVSSX_ATT
Definition: ad7779.h:225
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
ad7779_remove
int32_t ad7779_remove(ad7779_dev *dev)
Free the resources allocated by ad7779_init().
Definition: ad7779.c:1612
ad7779_set_gain
int32_t ad7779_set_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain gain)
Definition: ad7779.c:517
ad7779_dev::read_from_cache
bool read_from_cache
Definition: ad7779.h:275
AD7779_GAIN_8
@ AD7779_GAIN_8
Definition: ad7779.h:183
ad7779_get_offset_corr
int32_t ad7779_get_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *offset)
Definition: ad7779.c:971
ad7779_init
int32_t ad7779_init(ad7779_dev **device, ad7779_init_param init_param)
Definition: ad7779.c:1468
ad7779_spi_int_reg_read_mask
int32_t ad7779_spi_int_reg_read_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
Definition: ad7779.c:173
no_os_util.h
Header file of utility functions.
ad7779_ref_buf_op_mode
ad7779_ref_buf_op_mode
Definition: ad7779.h:212
ad7779_dev::gpio_dclk2
struct no_os_gpio_desc * gpio_dclk2
Definition: ad7779.h:254
AD7779_DCLK_CLK_DIV
#define AD7779_DCLK_CLK_DIV(x)
Definition: ad7779.h:123
ad7779_init_param
Definition: ad7779.h:279
ad7779_get_spi_op_mode
int32_t ad7779_get_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode *mode)
Definition: ad7779.c:320
AD7779_SAR_CONV
@ AD7779_SAR_CONV
Definition: ad7779.h:160
ad7779_do_spi_soft_reset
int32_t ad7779_do_spi_soft_reset(ad7779_dev *dev)
Definition: ad7779.c:1391
ad7779_get_gain
int32_t ad7779_get_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain *gain)
Definition: ad7779.c:562
AD7771_FILTER_MODE
#define AD7771_FILTER_MODE
Definition: ad7779.h:109
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
AD7779_AREG2CAP_AVSSX_ATT
@ AD7779_AREG2CAP_AVSSX_ATT
Definition: ad7779.h:226
AD7779_DCLK_DIV_4
@ AD7779_DCLK_DIV_4
Definition: ad7779.h:189
AD7779_DCLK_DIV_16
@ AD7779_DCLK_DIV_16
Definition: ad7779.h:191
AD7779_REF_OUT_AVSSX
@ AD7779_REF_OUT_AVSSX
Definition: ad7779.h:223
AD7779_HIGH_RES
@ AD7779_HIGH_RES
Definition: ad7779.h:199
AD7779_CH4
@ AD7779_CH4
Definition: ad7779.h:168
AD7779_REG_BUFFER_CONFIG_1
#define AD7779_REG_BUFFER_CONFIG_1
Definition: ad7779.h:65
AD7779_REF_BUF_ENABLED
@ AD7779_REF_BUF_ENABLED
Definition: ad7779.h:213
ad7779_dev::gain_corr
uint32_t gain_corr[8]
Definition: ad7779.h:270
ad7779_get_sar_cfg
int32_t ad7779_get_sar_cfg(ad7779_dev *dev, ad7779_state *state, ad7779_sar_mux *mux)
Definition: ad7779.c:1306
AD7779_SAR_DIAG_MODE_EN
#define AD7779_SAR_DIAG_MODE_EN
Definition: ad7779.h:110
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:121