no-OS
Macros | Functions | Variables
ad9361.c File Reference

Implementation of AD9361 Driver. More...

#include <limits.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
#include "ad9361.h"
#include "no-os/spi.h"
#include "no-os/gpio.h"
#include "no-os/delay.h"
#include "ad9361_util.h"
#include "no-os/util.h"
#include "app_config.h"
Include dependency graph for ad9361.c:

Macros

#define diff_abs(x, y)   ((x) > (y) ? (x - y) : (y - x))
 
#define NO_GAIN_TABLE   ((uint32_t)-1)
 
#define SYNTH_LUT_SIZE   53
 
#define SIZE_FULL_TABLE   77
 
#define SIZE_SPLIT_TABLE   41
 
#define ad9361_spi_readf(spi, reg, mask)   __ad9361_spi_readf(spi, reg, mask, find_first_bit(mask))
 
#define ad9361_spi_writef(spi, reg, mask, val)   __ad9361_spi_writef(spi, reg, mask, find_first_bit(mask), val)
 

Functions

int32_t ad9361_spi_readm (struct spi_desc *spi, uint32_t reg, uint8_t *rbuf, uint32_t num)
 
int32_t ad9361_spi_read (struct spi_desc *spi, uint32_t reg)
 
int32_t ad9361_spi_write (struct spi_desc *spi, uint32_t reg, uint32_t val)
 
uint32_t ad9361_validate_rf_bw (struct ad9361_rf_phy *phy, uint32_t bw)
 
int32_t ad9361_validate_rfpll (struct ad9361_rf_phy *phy, bool is_tx, uint64_t freq)
 
int32_t ad9361_find_opt (uint8_t *field, uint32_t size, uint32_t *ret_start)
 
int32_t ad9361_1rx1tx_channel_map (struct ad9361_rf_phy *phy, bool tx, int32_t channel)
 
int32_t ad9361_reset (struct ad9361_rf_phy *phy)
 
int32_t ad9361_en_dis_tx (struct ad9361_rf_phy *phy, uint32_t tx_if, uint32_t enable)
 
int32_t ad9361_en_dis_rx (struct ad9361_rf_phy *phy, uint32_t rx_if, uint32_t enable)
 
int32_t ad9361_bist_loopback (struct ad9361_rf_phy *phy, int32_t mode)
 
void ad9361_get_bist_loopback (struct ad9361_rf_phy *phy, int32_t *mode)
 
int32_t ad9361_bist_prbs (struct ad9361_rf_phy *phy, enum ad9361_bist_mode mode)
 
void ad9361_get_bist_prbs (struct ad9361_rf_phy *phy, enum ad9361_bist_mode *mode)
 
int32_t ad9361_bist_tone (struct ad9361_rf_phy *phy, enum ad9361_bist_mode mode, uint32_t freq_Hz, uint32_t level_dB, uint32_t mask)
 
void ad9361_get_bist_tone (struct ad9361_rf_phy *phy, enum ad9361_bist_mode *mode, uint32_t *freq_Hz, uint32_t *level_dB, uint32_t *mask)
 
uint32_t ad9361_gt (struct ad9361_rf_phy *phy)
 
uint32_t ad9361_to_clk (uint64_t freq)
 
uint64_t ad9361_from_clk (uint32_t freq)
 
int32_t ad9361_set_tx_atten (struct ad9361_rf_phy *phy, uint32_t atten_mdb, bool tx1, bool tx2, bool immed)
 
int32_t ad9361_get_tx_atten (struct ad9361_rf_phy *phy, uint32_t tx_num)
 
int32_t ad9361_tx_mute (struct ad9361_rf_phy *phy, uint32_t state)
 
int32_t ad9361_get_rx_gain (struct ad9361_rf_phy *phy, uint32_t rx_id, struct rf_rx_gain *rx_gain)
 
uint8_t ad9361_ensm_get_state (struct ad9361_rf_phy *phy)
 
void ad9361_ensm_force_state (struct ad9361_rf_phy *phy, uint8_t ensm_state)
 
void ad9361_ensm_restore_state (struct ad9361_rf_phy *phy, uint8_t ensm_state)
 
void ad9361_ensm_restore_prev_state (struct ad9361_rf_phy *phy)
 
int32_t ad9361_set_rx_gain (struct ad9361_rf_phy *phy, uint32_t rx_id, struct rf_rx_gain *rx_gain)
 
int32_t ad9361_set_gain_ctrl_mode (struct ad9361_rf_phy *phy, struct rf_gain_ctrl *gain_ctrl)
 
int32_t ad9361_read_rssi (struct ad9361_rf_phy *phy, struct rf_rssi *rssi)
 
int32_t ad9361_tracking_control (struct ad9361_rf_phy *phy, bool bbdc_track, bool rfdc_track, bool rxquad_track)
 
int ad9361_synth_lo_powerdown (struct ad9361_rf_phy *phy, enum synth_pd_ctrl rx, enum synth_pd_ctrl tx)
 
int32_t ad9361_set_dcxo_tune (struct ad9361_rf_phy *phy, uint32_t coarse, uint32_t fine)
 
int32_t ad9361_rf_port_setup (struct ad9361_rf_phy *phy, bool is_out, uint32_t rx_inputs, uint32_t txb)
 
int32_t ad9361_auxdac_get (struct ad9361_rf_phy *phy, int32_t dac)
 
int32_t ad9361_get_temp (struct ad9361_rf_phy *phy)
 
int32_t ad9361_get_auxadc (struct ad9361_rf_phy *phy)
 
int32_t ad9361_ensm_set_state (struct ad9361_rf_phy *phy, uint8_t ensm_state, bool pinctrl)
 
int32_t ad9361_set_trx_clock_chain (struct ad9361_rf_phy *phy, uint32_t *rx_path_clks, uint32_t *tx_path_clks)
 
int32_t ad9361_get_trx_clock_chain (struct ad9361_rf_phy *phy, uint32_t *rx_path_clks, uint32_t *tx_path_clks)
 
int32_t ad9361_calculate_rf_clock_chain (struct ad9361_rf_phy *phy, uint32_t tx_sample_rate, uint32_t rate_gov, uint32_t *rx_path_clks, uint32_t *tx_path_clks)
 
int32_t ad9361_set_trx_clock_chain_freq (struct ad9361_rf_phy *phy, uint32_t freq)
 
int32_t ad9361_set_ensm_mode (struct ad9361_rf_phy *phy, bool fdd, bool pinctrl)
 
int32_t ad9361_fastlock_load (struct ad9361_rf_phy *phy, bool tx, uint32_t profile, uint8_t *values)
 
int32_t ad9361_fastlock_store (struct ad9361_rf_phy *phy, bool tx, uint32_t profile)
 
int32_t ad9361_fastlock_recall (struct ad9361_rf_phy *phy, bool tx, uint32_t profile)
 
int32_t ad9361_fastlock_save (struct ad9361_rf_phy *phy, bool tx, uint32_t profile, uint8_t *values)
 
int32_t ad9361_mcs (struct ad9361_rf_phy *phy, int32_t step)
 
void ad9361_clear_state (struct ad9361_rf_phy *phy)
 
int32_t ad9361_setup (struct ad9361_rf_phy *phy)
 
int32_t ad9361_do_calib_run (struct ad9361_rf_phy *phy, uint32_t cal, int32_t arg)
 
int32_t ad9361_update_rf_bandwidth (struct ad9361_rf_phy *phy, uint32_t rf_rx_bw, uint32_t rf_tx_bw)
 
int32_t ad9361_load_fir_filter_coef (struct ad9361_rf_phy *phy, enum fir_dest dest, int32_t gain_dB, uint32_t ntaps, int16_t *coef)
 
int32_t ad9361_parse_fir (struct ad9361_rf_phy *phy, char *data, uint32_t size)
 
int32_t ad9361_validate_enable_fir (struct ad9361_rf_phy *phy)
 
uint32_t ad9361_clk_factor_recalc_rate (struct refclk_scale *clk_priv, uint32_t parent_rate)
 
int32_t ad9361_clk_factor_round_rate (struct refclk_scale *clk_priv, uint32_t rate, uint32_t *prate)
 
int32_t ad9361_clk_factor_set_rate (struct refclk_scale *clk_priv, uint32_t rate, uint32_t parent_rate)
 
uint32_t ad9361_bbpll_recalc_rate (struct refclk_scale *clk_priv, uint32_t parent_rate)
 
int32_t ad9361_bbpll_round_rate (struct refclk_scale *clk_priv, uint32_t rate, uint32_t *prate)
 
int32_t ad9361_bbpll_set_rate (struct refclk_scale *clk_priv, uint32_t rate, uint32_t parent_rate)
 
uint32_t ad9361_rfpll_int_recalc_rate (struct refclk_scale *clk_priv, uint32_t parent_rate)
 
int32_t ad9361_rfpll_int_round_rate (struct refclk_scale *clk_priv, uint32_t rate, uint32_t *prate)
 
int32_t ad9361_rfpll_int_set_rate (struct refclk_scale *clk_priv, uint32_t rate, uint32_t parent_rate)
 
uint32_t ad9361_rfpll_dummy_recalc_rate (struct refclk_scale *clk_priv)
 
int32_t ad9361_rfpll_dummy_set_rate (struct refclk_scale *clk_priv, uint32_t rate)
 
uint32_t ad9361_rfpll_recalc_rate (struct refclk_scale *clk_priv)
 
int32_t ad9361_rfpll_round_rate (struct refclk_scale *clk_priv, uint32_t rate)
 
int32_t ad9361_rfpll_set_rate (struct refclk_scale *clk_priv, uint32_t rate)
 
int32_t ad9361_clk_mux_set_parent (struct refclk_scale *clk_priv, uint8_t index)
 
int32_t ad9361_register_clocks (struct ad9361_rf_phy *phy)
 
int32_t ad9361_unregister_clocks (struct ad9361_rf_phy *phy)
 
int32_t ad9361_rssi_gain_step_calib (struct ad9361_rf_phy *phy)
 

Variables

const bool has_split_gt = HAVE_SPLIT_GAIN_TABLE
 
const bool have_tdd_tables = HAVE_TDD_SYNTH_TABLE
 
struct gain_table_info ad9361_adi_gt_info []
 
const char * ad9361_ensm_states []
 

Detailed Description

Implementation of AD9361 Driver.

Copyright 2014-2015(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ad9361_spi_readf

#define ad9361_spi_readf (   spi,
  reg,
  mask 
)    __ad9361_spi_readf(spi, reg, mask, find_first_bit(mask))

SPI register bits read.

Parameters
spi
regThe register address.
maskThe bits mask.
Returns
The bits value or negative error code in case of failure.

◆ ad9361_spi_writef

#define ad9361_spi_writef (   spi,
  reg,
  mask,
  val 
)    __ad9361_spi_writef(spi, reg, mask, find_first_bit(mask), val)

SPI register bits write.

Parameters
spi
regThe register address.
maskThe bits mask.
valThe bits value.
Returns
0 in case of success, negative error code otherwise.

◆ diff_abs

#define diff_abs (   x,
 
)    ((x) > (y) ? (x - y) : (y - x))

◆ NO_GAIN_TABLE

#define NO_GAIN_TABLE   ((uint32_t)-1)

◆ SIZE_FULL_TABLE

#define SIZE_FULL_TABLE   77

◆ SIZE_SPLIT_TABLE

#define SIZE_SPLIT_TABLE   41

◆ SYNTH_LUT_SIZE

#define SYNTH_LUT_SIZE   53

Function Documentation

◆ ad9361_1rx1tx_channel_map()

int32_t ad9361_1rx1tx_channel_map ( struct ad9361_rf_phy phy,
bool  tx,
int32_t  channel 
)

Select the channel mapping in 1rx1tx mode.

Parameters
phyThe AD9361 state structure.
txTX
channelChannel
Returns
The channel number.
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◆ ad9361_auxdac_get()

int32_t ad9361_auxdac_get ( struct ad9361_rf_phy phy,
int32_t  dac 
)

Get the Aux DAC value.

Parameters
phyThe AD9361 state structure.
dacThe DAC.
Returns
The value in case of success, negative error code otherwise.

◆ ad9361_bbpll_recalc_rate()

uint32_t ad9361_bbpll_recalc_rate ( struct refclk_scale clk_priv,
uint32_t  parent_rate 
)

Recalculate the clock rate.

Parameters
clk_privThe refclk_scale structure.
parent_rateThe parent clock rate.
Returns
The clock rate.
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◆ ad9361_bbpll_round_rate()

int32_t ad9361_bbpll_round_rate ( struct refclk_scale clk_priv,
uint32_t  rate,
uint32_t *  prate 
)

Calculate the closest possible clock rate that can be set.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
prateThe parent clock rate.
Returns
The closest possible clock rate that can be set.
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◆ ad9361_bbpll_set_rate()

int32_t ad9361_bbpll_set_rate ( struct refclk_scale clk_priv,
uint32_t  rate,
uint32_t  parent_rate 
)

Set the clock rate.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
parent_rateThe parent clock rate.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_bist_loopback()

int32_t ad9361_bist_loopback ( struct ad9361_rf_phy phy,
int32_t  mode 
)

BIST loopback mode.

Parameters
phyThe AD9361 state structure.
modeBIST loopback mode.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_bist_prbs()

int32_t ad9361_bist_prbs ( struct ad9361_rf_phy phy,
enum ad9361_bist_mode  mode 
)

BIST mode.

Parameters
phyThe AD9361 state structure.
modeBist mode.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_bist_tone()

int32_t ad9361_bist_tone ( struct ad9361_rf_phy phy,
enum ad9361_bist_mode  mode,
uint32_t  freq_Hz,
uint32_t  level_dB,
uint32_t  mask 
)

BIST tone.

Parameters
phyThe AD9361 state structure.
modeBist tone mode.
freq_HzBist tone frequency.
level_dBBist tone level.
maskBist reg mask.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_calculate_rf_clock_chain()

int32_t ad9361_calculate_rf_clock_chain ( struct ad9361_rf_phy phy,
uint32_t  tx_sample_rate,
uint32_t  rate_gov,
uint32_t *  rx_path_clks,
uint32_t *  tx_path_clks 
)

Calculate the RX and TX path rates to obtain the desired sample rate.

Parameters
phyThe AD9361 state structure.
tx_sample_rateThe desired sample rate.
rate_govThe rate governor option.
rx_path_clksRX path rates buffer.
tx_path_clksTX path rates buffer.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_clear_state()

void ad9361_clear_state ( struct ad9361_rf_phy phy)

Clear state.

Parameters
phyThe AD9361 state structure.
Returns
None.

◆ ad9361_clk_factor_recalc_rate()

uint32_t ad9361_clk_factor_recalc_rate ( struct refclk_scale clk_priv,
uint32_t  parent_rate 
)

Recalculate the clock rate.

Parameters
clk_privThe refclk_scale structure.
parent_rateThe parent clock rate.
Returns
The clock rate.
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◆ ad9361_clk_factor_round_rate()

int32_t ad9361_clk_factor_round_rate ( struct refclk_scale clk_priv,
uint32_t  rate,
uint32_t *  prate 
)

Calculate the closest possible clock rate that can be set.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
prateThe parent clock rate.
Returns
The closest possible clock rate that can be set.
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◆ ad9361_clk_factor_set_rate()

int32_t ad9361_clk_factor_set_rate ( struct refclk_scale clk_priv,
uint32_t  rate,
uint32_t  parent_rate 
)

Set the clock rate.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
parent_rateThe parent clock rate.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_clk_mux_set_parent()

int32_t ad9361_clk_mux_set_parent ( struct refclk_scale clk_priv,
uint8_t  index 
)

Set clock mux parent.

Parameters
clk_privThe refclk_scale structure.
indexIndex - Enable (1), disable (0) ext lo.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_do_calib_run()

int32_t ad9361_do_calib_run ( struct ad9361_rf_phy phy,
uint32_t  cal,
int32_t  arg 
)

Perform the selected calibration

Parameters
phyThe AD9361 state structure.
calThe selected calibration.
argThe argument of the calibration.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_en_dis_rx()

int32_t ad9361_en_dis_rx ( struct ad9361_rf_phy phy,
uint32_t  rx_if,
uint32_t  enable 
)

Enable/disable the desired RX channel.

Parameters
phyThe AD9361 state structure.
rx_ifThe desired channel number [1, 2].
enableEnable/disable option.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_en_dis_tx()

int32_t ad9361_en_dis_tx ( struct ad9361_rf_phy phy,
uint32_t  tx_if,
uint32_t  enable 
)

Enable/disable the desired TX channel.

Parameters
phyThe AD9361 state structure.
tx_ifThe desired channel number [1, 2].
enableEnable/disable option.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_ensm_force_state()

void ad9361_ensm_force_state ( struct ad9361_rf_phy phy,
uint8_t  ensm_state 
)

Force Enable State Machine (ENSM) to the desired state (internally used only).

Parameters
phyThe AD9361 state structure.
ensm_stateThe ENSM state [ENSM_STATE_SLEEP_WAIT, ENSM_STATE_ALERT, ENSM_STATE_TX, ENSM_STATE_TX_FLUSH, ENSM_STATE_RX, ENSM_STATE_RX_FLUSH, ENSM_STATE_FDD, ENSM_STATE_FDD_FLUSH].
Returns
None.
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◆ ad9361_ensm_get_state()

uint8_t ad9361_ensm_get_state ( struct ad9361_rf_phy phy)

Get Enable State Machine (ENSM) state.

Parameters
phyThe AD9361 state structure.
Returns
The state.
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◆ ad9361_ensm_restore_prev_state()

void ad9361_ensm_restore_prev_state ( struct ad9361_rf_phy phy)

Restore the previous Enable State Machine (ENSM) state.

Parameters
phyThe AD9361 state structure.
Returns
None.

◆ ad9361_ensm_restore_state()

void ad9361_ensm_restore_state ( struct ad9361_rf_phy phy,
uint8_t  ensm_state 
)

Restore an Enable State Machine (ENSM) state.

Parameters
phyThe AD9361 state structure.
ensm_stateThe state.
Returns
None.
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◆ ad9361_ensm_set_state()

int32_t ad9361_ensm_set_state ( struct ad9361_rf_phy phy,
uint8_t  ensm_state,
bool  pinctrl 
)

Set the desired Enable State Machine (ENSM) state.

Parameters
phyThe AD9361 state structure.
ensm_stateThe ENSM state [ENSM_STATE_SLEEP_WAIT, ENSM_STATE_ALERT, ENSM_STATE_TX, ENSM_STATE_TX_FLUSH, ENSM_STATE_RX, ENSM_STATE_RX_FLUSH, ENSM_STATE_FDD, ENSM_STATE_FDD_FLUSH].
pinctrlSet true, will enable the ENSM pin control.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_fastlock_load()

int32_t ad9361_fastlock_load ( struct ad9361_rf_phy phy,
bool  tx,
uint32_t  profile,
uint8_t *  values 
)

Fastlock load values.

Parameters
phyThe AD9361 state structure.
tx
profile
values
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_fastlock_recall()

int32_t ad9361_fastlock_recall ( struct ad9361_rf_phy phy,
bool  tx,
uint32_t  profile 
)

Fastlock recall.

Parameters
phyThe AD9361 state structure.
tx
profile
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_fastlock_save()

int32_t ad9361_fastlock_save ( struct ad9361_rf_phy phy,
bool  tx,
uint32_t  profile,
uint8_t *  values 
)

Fastlock save.

Parameters
phyThe AD9361 state structure.
tx
profile
values
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_fastlock_store()

int32_t ad9361_fastlock_store ( struct ad9361_rf_phy phy,
bool  tx,
uint32_t  profile 
)

Fastlock store.

Parameters
phyThe AD9361 state structure.
tx
profile
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_find_opt()

int32_t ad9361_find_opt ( uint8_t *  field,
uint32_t  size,
uint32_t *  ret_start 
)

Find optimal value.

Parameters
field
size
ret_start
Returns
The optimal delay in case of success, negative error code otherwise.

◆ ad9361_from_clk()

uint64_t ad9361_from_clk ( uint32_t  freq)

Shift back the frequency value, so it reflects the real value. Note: PLL operates between 47 .. 6000 MHz which is > 2^32.

Parameters
freqThe frequency value [Hz].
Returns
The shifted frequency value.
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◆ ad9361_get_auxadc()

int32_t ad9361_get_auxadc ( struct ad9361_rf_phy phy)

Get the Aux ADC value.

Parameters
phyThe AD9361 state structure.
Returns
The value in case of success, negative error code otherwise.

◆ ad9361_get_bist_loopback()

void ad9361_get_bist_loopback ( struct ad9361_rf_phy phy,
int32_t *  mode 
)

Get BIST loopback mode.

Parameters
phyThe AD9361 state structure.
modeBIST loopback mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_get_bist_prbs()

void ad9361_get_bist_prbs ( struct ad9361_rf_phy phy,
enum ad9361_bist_mode mode 
)

Get BIST mode settings.

Parameters
phyThe AD9361 state structure.
modeBist mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_get_bist_tone()

void ad9361_get_bist_tone ( struct ad9361_rf_phy phy,
enum ad9361_bist_mode mode,
uint32_t *  freq_Hz,
uint32_t *  level_dB,
uint32_t *  mask 
)

Get BIST tone settings.

Parameters
phyThe AD9361 state structure.
modeBist tone mode.
freq_HzBist tone frequency.
level_dBBist tone level.
maskBist reg mask.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_get_rx_gain()

int32_t ad9361_get_rx_gain ( struct ad9361_rf_phy phy,
uint32_t  rx_id,
struct rf_rx_gain rx_gain 
)

Get current RX gain for the selected channel.

Parameters
phyThe AD9361 state structure.
rx_idThe desired channel number (0, 1).
rx_gainA rf_rx_gain struct to store the RF gain.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_get_temp()

int32_t ad9361_get_temp ( struct ad9361_rf_phy phy)

Get the measured temperature of the device.

Parameters
phyThe AD9361 state structure.
Returns
The measured temperature of the device.
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◆ ad9361_get_trx_clock_chain()

int32_t ad9361_get_trx_clock_chain ( struct ad9361_rf_phy phy,
uint32_t *  rx_path_clks,
uint32_t *  tx_path_clks 
)

Get the RX and TX path rates.

Parameters
phyThe AD9361 state structure.
rx_path_clksRX path rates buffer.
tx_path_clksTX path rates buffer.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_get_tx_atten()

int32_t ad9361_get_tx_atten ( struct ad9361_rf_phy phy,
uint32_t  tx_num 
)

Get the attenuation for the selected TX channel.

Parameters
phyThe AD9361 state structure.
tx_numThe selected channel [1, 2].
Returns
The attenuation value [mdB] or negative error code in case of failure.
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◆ ad9361_gt()

uint32_t ad9361_gt ( struct ad9361_rf_phy phy)

Return the current gain table index.

Parameters
phyThe AD9361 state structure.
Returns
The current gain table index or 0 if the table was not chosen.

◆ ad9361_load_fir_filter_coef()

int32_t ad9361_load_fir_filter_coef ( struct ad9361_rf_phy phy,
enum fir_dest  dest,
int32_t  gain_dB,
uint32_t  ntaps,
int16_t *  coef 
)

Load the FIR filter coefficients.

Parameters
phyThe AD9361 state structure.
destDestination identifier (RX1,2 / TX1,2).
gain_dBGain option.
ntapsNumber of filter Taps.
coefPointer to filter coefficients.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_mcs()

int32_t ad9361_mcs ( struct ad9361_rf_phy phy,
int32_t  step 
)

Multi Chip Sync (MCS) config.

Parameters
phyThe AD9361 state structure.
stepMCS step.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_parse_fir()

int32_t ad9361_parse_fir ( struct ad9361_rf_phy phy,
char *  data,
uint32_t  size 
)

Parse the FIR filter file/buffer.

Parameters
phyThe AD9361 state structure.
dataPointer to buffer.
sizeBuffer size.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_read_rssi()

int32_t ad9361_read_rssi ( struct ad9361_rf_phy phy,
struct rf_rssi rssi 
)

Get the RSSI.

Parameters
phyThe AD9361 state structure.
rssiA rf_rssi struct to store the RSSI.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_register_clocks()

int32_t ad9361_register_clocks ( struct ad9361_rf_phy phy)

Register and initialize all the system clocks.

Parameters
phyThe AD9361 state structure.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_reset()

int32_t ad9361_reset ( struct ad9361_rf_phy phy)

AD9361 Device Reset

Parameters
phyThe AD9361 state structure.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_rf_port_setup()

int32_t ad9361_rf_port_setup ( struct ad9361_rf_phy phy,
bool  is_out,
uint32_t  rx_inputs,
uint32_t  txb 
)

Setup the RF port. Note: val 0 (RX1A_N & RX1A_P) and (RX2A_N & RX2A_P) enabled; balanced 1 (RX1B_N & RX1B_P) and (RX2B_N & RX2B_P) enabled; balanced 2 (RX1C_N & RX1C_P) and (RX2C_N & RX2C_P) enabled; balanced

3 RX1A_N and RX2A_N enabled; unbalanced 4 RX1A_P and RX2A_P enabled; unbalanced 5 RX1B_N and RX2B_N enabled; unbalanced 6 RX1B_P and RX2B_P enabled; unbalanced 7 RX1C_N and RX2C_N enabled; unbalanced 8 RX1C_P and RX2C_P enabled; unbalanced 9 TX_MON1 10 TX_MON2 11 TX_MON1 & TX_MON2

Parameters
phyThe AD9361 state structure.
is_outTX RF output port enabled.
rx_inputsRX input option identifier
txbTX output option identifier
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_rfpll_dummy_recalc_rate()

uint32_t ad9361_rfpll_dummy_recalc_rate ( struct refclk_scale clk_priv)

Recalculate the clock rate.

Parameters
clk_privThe refclk_scale structure.
Returns
The clock rate.
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◆ ad9361_rfpll_dummy_set_rate()

int32_t ad9361_rfpll_dummy_set_rate ( struct refclk_scale clk_priv,
uint32_t  rate 
)

Set the clock rate.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_rfpll_int_recalc_rate()

uint32_t ad9361_rfpll_int_recalc_rate ( struct refclk_scale clk_priv,
uint32_t  parent_rate 
)

Recalculate the clock rate.

Parameters
clk_privThe refclk_scale structure.
parent_rateThe parent clock rate.
Returns
The clock rate.
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◆ ad9361_rfpll_int_round_rate()

int32_t ad9361_rfpll_int_round_rate ( struct refclk_scale clk_priv,
uint32_t  rate,
uint32_t *  prate 
)

Calculate the closest possible clock rate that can be set.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
prateThe parent clock rate.
Returns
The closest possible clock rate that can be set.
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◆ ad9361_rfpll_int_set_rate()

int32_t ad9361_rfpll_int_set_rate ( struct refclk_scale clk_priv,
uint32_t  rate,
uint32_t  parent_rate 
)

Set the clock rate.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
parent_rateThe parent clock rate.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_rfpll_recalc_rate()

uint32_t ad9361_rfpll_recalc_rate ( struct refclk_scale clk_priv)

Recalculate the clock rate.

Parameters
clk_privThe refclk_scale structure.
Returns
The clock rate.
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◆ ad9361_rfpll_round_rate()

int32_t ad9361_rfpll_round_rate ( struct refclk_scale clk_priv,
uint32_t  rate 
)

Calculate the closest possible clock rate that can be set.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
Returns
The closest possible clock rate that can be set.
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◆ ad9361_rfpll_set_rate()

int32_t ad9361_rfpll_set_rate ( struct refclk_scale clk_priv,
uint32_t  rate 
)

Set the clock rate.

Parameters
clk_privThe refclk_scale structure.
rateThe clock rate.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_rssi_gain_step_calib()

int32_t ad9361_rssi_gain_step_calib ( struct ad9361_rf_phy phy)

Perform an RSSI gain step calibration. Note: Before running the function, provide a single tone within the channel bandwidth and monitor the received data. Adjust the tone amplitude until the received data is within a few dB of full scale but not overloading.

Parameters
phyThe AD9361 state structure.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_set_dcxo_tune()

int32_t ad9361_set_dcxo_tune ( struct ad9361_rf_phy phy,
uint32_t  coarse,
uint32_t  fine 
)

Setup the DCXO tune.

Parameters
phyThe AD9361 state structure.
coarseThe DCXO tune coarse.
fineThe DCXO tune fine.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_set_ensm_mode()

int32_t ad9361_set_ensm_mode ( struct ad9361_rf_phy phy,
bool  fdd,
bool  pinctrl 
)

Internal ENSM mode options helper function.

Parameters
phyThe AD9361 state structure.
fdd
pinctrl
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_set_gain_ctrl_mode()

int32_t ad9361_set_gain_ctrl_mode ( struct ad9361_rf_phy phy,
struct rf_gain_ctrl gain_ctrl 
)

Set the gain control mode.

Parameters
phyThe AD9361 state structure.
gain_ctrlA rf_gain_ctrl struct that contains the the desired channel information and the gain control mode.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_set_rx_gain()

int32_t ad9361_set_rx_gain ( struct ad9361_rf_phy phy,
uint32_t  rx_id,
struct rf_rx_gain rx_gain 
)

Set the RX gain for the selected channel.

Parameters
phyThe AD9361 state structure.
rx_idThe desired channel number (0, 1).
rx_gainThe rf_rx_gain struct containing the RF gain.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_set_trx_clock_chain()

int32_t ad9361_set_trx_clock_chain ( struct ad9361_rf_phy phy,
uint32_t *  rx_path_clks,
uint32_t *  tx_path_clks 
)

Set the RX and TX path rates.

Parameters
phyThe AD9361 state structure.
rx_path_clksRX path rates buffer.
tx_path_clksTX path rates buffer.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_set_trx_clock_chain_freq()

int32_t ad9361_set_trx_clock_chain_freq ( struct ad9361_rf_phy phy,
uint32_t  freq 
)

Set the desired sample rate.

Parameters
phyThe AD9361 state structure.
freqThe desired sample rate.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_set_tx_atten()

int32_t ad9361_set_tx_atten ( struct ad9361_rf_phy phy,
uint32_t  atten_mdb,
bool  tx1,
bool  tx2,
bool  immed 
)

Set the attenuation for the selected TX channels.

Parameters
phyThe AD9361 state structure.
atten_mdbAttenuation value [mdB].
tx1Set true, the attenuation of the TX1 will be affected.
tx2Set true, the attenuation of the TX2 will be affected.
immedSet true, an immediate update will take place.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_setup()

int32_t ad9361_setup ( struct ad9361_rf_phy phy)

Setup the AD9361 device.

Parameters
phyThe AD9361 state structure.
Returns
0 in case of success, negative error code otherwise.

◆ ad9361_spi_read()

int32_t ad9361_spi_read ( struct spi_desc spi,
uint32_t  reg 
)

SPI register read.

Parameters
spi
regThe register address.
Returns
The register value or negative error code in case of failure.
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◆ ad9361_spi_readm()

int32_t ad9361_spi_readm ( struct spi_desc spi,
uint32_t  reg,
uint8_t *  rbuf,
uint32_t  num 
)

SPI multiple bytes register read.

Parameters
spi
regThe register address.
rbufThe data buffer.
numThe number of bytes to read.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_spi_write()

int32_t ad9361_spi_write ( struct spi_desc spi,
uint32_t  reg,
uint32_t  val 
)

SPI register write.

Parameters
spi
regThe register address.
valThe value of the register.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_synth_lo_powerdown()

int ad9361_synth_lo_powerdown ( struct ad9361_rf_phy phy,
enum synth_pd_ctrl  rx,
enum synth_pd_ctrl  tx 
)

Power down the TX and/or RX Local Oscillators.

Parameters
phyThe AD9361 state structure.
rxThe RX LO setting.
txThe TX LO setting.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_to_clk()

uint32_t ad9361_to_clk ( uint64_t  freq)

Shift the real frequency value, so it fits type unsigned long Note: PLL operates between 47 .. 6000 MHz which is > 2^32.

Parameters
freqThe frequency value [Hz].
Returns
The shifted frequency value.
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◆ ad9361_tracking_control()

int32_t ad9361_tracking_control ( struct ad9361_rf_phy phy,
bool  bbdc_track,
bool  rfdc_track,
bool  rxquad_track 
)

Setup RX tracking calibrations.

Parameters
phyThe AD9361 state structure.
bbdc_trackSet true, will enable the BBDC tracking.
rfdc_trackSet true, will enable the RFDC tracking.
rxquad_trackSet true, will enable the RXQUAD tracking.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_tx_mute()

int32_t ad9361_tx_mute ( struct ad9361_rf_phy phy,
uint32_t  state 
)

Mute TX.

Parameters
phyThe AD9361 state structure.
stateThe state - 0 mute; 1 - unmute.
Returns
0 in case of success
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◆ ad9361_unregister_clocks()

int32_t ad9361_unregister_clocks ( struct ad9361_rf_phy phy)

Unregister all the system clocks.

Parameters
phyThe AD9361 state structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_update_rf_bandwidth()

int32_t ad9361_update_rf_bandwidth ( struct ad9361_rf_phy phy,
uint32_t  rf_rx_bw,
uint32_t  rf_tx_bw 
)

Set the RF bandwidth.

Parameters
phyThe AD9361 state structure.
rf_rx_bwThe desired RX bandwidth [Hz].
rf_tx_bwThe desired TX bandwidth [Hz].
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_validate_enable_fir()

int32_t ad9361_validate_enable_fir ( struct ad9361_rf_phy phy)

Validate FIR filter configuration - on pass enable.

Parameters
phyThe AD9361 state structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad9361_validate_rf_bw()

uint32_t ad9361_validate_rf_bw ( struct ad9361_rf_phy phy,
uint32_t  bw 
)

Validate RF BW frequency.

Parameters
phyThe AD9361 state structure.
bwThe RF BW frequency.
Returns
The validated RF BW frequency.
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◆ ad9361_validate_rfpll()

int32_t ad9361_validate_rfpll ( struct ad9361_rf_phy phy,
bool  is_tx,
uint64_t  freq 
)

Validate RF PLL frequency.

Parameters
phyThe AD9361 state structure.
is_txTX enabled.
freqThe RF PLL frequency.
Returns
0 in case of success, negative error code otherwise.

Variable Documentation

◆ ad9361_adi_gt_info

struct gain_table_info ad9361_adi_gt_info[]

◆ ad9361_ensm_states

const char* ad9361_ensm_states[]
Initial value:
= {
"sleep", "", "", "", "", "alert", "tx", "tx flush",
"rx", "rx_flush", "fdd", "fdd_flush"
}

State machine modes.

◆ has_split_gt

const bool has_split_gt = HAVE_SPLIT_GAIN_TABLE

◆ have_tdd_tables

const bool have_tdd_tables = HAVE_TDD_SYNTH_TABLE