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parameters.h File Reference

Parameters Definitions. More...

#include <xparameters.h>
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Macros

#define AXI_PWMGEN_BASEADDR   XPAR_SPI_TRIGGER_GEN_BASEADDR
 
#define ADAQ7980_SPI_ENG_REF_CLK_FREQ_HZ   XPAR_PS7_SPI_0_SPI_CLK_FREQ_HZ
 
#define ADAQ7980_DMA_BASEADDR   XPAR_AXI_ADAQ7980_DMA_BASEADDR
 
#define ADAQ7980_SPI_ENGINE_BASEADDR   XPAR_SPI_AXI_BASEADDR
 
#define SPI_ADAQ7980_CS   0
 
#define GPIO_DEVICE_ID   XPAR_PS7_GPIO_0_DEVICE_ID
 
#define GPIO_OFFSET   32 + 54
 
#define GPIO_0   GPIO_OFFSET + 0
 
#define GPIO_1   GPIO_OFFSET + 1
 
#define GPIO_2   GPIO_OFFSET + 2
 
#define GPIO_3   GPIO_OFFSET + 3
 
#define GPIO_4   GPIO_OFFSET + 4
 
#define GPIO_5   GPIO_OFFSET + 5
 
#define GPIO_6   GPIO_OFFSET + 6
 
#define GPIO_7   GPIO_OFFSET + 7
 
#define GPIO_REF_PUB   GPIO_OFFSET + 8
 
#define GPIO_RBUF_PUB   GPIO_OFFSET + 9
 
#define ADC_DDR_BASEADDR   XPAR_DDR_MEM_BASEADDR + 0x800000
 

Detailed Description

Parameters Definitions.

Author
Cristian Pop (crist.nosp@m.ian..nosp@m.pop@a.nosp@m.nalo.nosp@m.g.com)

Copyright 2020(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ADAQ7980_DMA_BASEADDR

#define ADAQ7980_DMA_BASEADDR   XPAR_AXI_ADAQ7980_DMA_BASEADDR

◆ ADAQ7980_SPI_ENG_REF_CLK_FREQ_HZ

#define ADAQ7980_SPI_ENG_REF_CLK_FREQ_HZ   XPAR_PS7_SPI_0_SPI_CLK_FREQ_HZ

◆ ADAQ7980_SPI_ENGINE_BASEADDR

#define ADAQ7980_SPI_ENGINE_BASEADDR   XPAR_SPI_AXI_BASEADDR

◆ ADC_DDR_BASEADDR

#define ADC_DDR_BASEADDR   XPAR_DDR_MEM_BASEADDR + 0x800000

◆ AXI_PWMGEN_BASEADDR

#define AXI_PWMGEN_BASEADDR   XPAR_SPI_TRIGGER_GEN_BASEADDR

◆ GPIO_0

#define GPIO_0   GPIO_OFFSET + 0

◆ GPIO_1

#define GPIO_1   GPIO_OFFSET + 1

◆ GPIO_2

#define GPIO_2   GPIO_OFFSET + 2

◆ GPIO_3

#define GPIO_3   GPIO_OFFSET + 3

◆ GPIO_4

#define GPIO_4   GPIO_OFFSET + 4

◆ GPIO_5

#define GPIO_5   GPIO_OFFSET + 5

◆ GPIO_6

#define GPIO_6   GPIO_OFFSET + 6

◆ GPIO_7

#define GPIO_7   GPIO_OFFSET + 7

◆ GPIO_DEVICE_ID

#define GPIO_DEVICE_ID   XPAR_PS7_GPIO_0_DEVICE_ID

◆ GPIO_OFFSET

#define GPIO_OFFSET   32 + 54

◆ GPIO_RBUF_PUB

#define GPIO_RBUF_PUB   GPIO_OFFSET + 9

◆ GPIO_REF_PUB

#define GPIO_REF_PUB   GPIO_OFFSET + 8

◆ SPI_ADAQ7980_CS

#define SPI_ADAQ7980_CS   0