no-OS
adf4153.h
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1 /**************************************************************************/
41 #ifndef __ADF4153_H__
42 #define __ADF4153_H__
43 
44 /*****************************************************************************/
45 /****************************** Include Files ********************************/
46 /*****************************************************************************/
47 #include <stdint.h>
48 #include "no_os_gpio.h"
49 #include "no_os_spi.h"
50 
51 /*****************************************************************************/
52 /* Device specific MACROs */
53 /*****************************************************************************/
54 /* GPIOs */
55 #define ADF4153_LE_OUT no_os_gpio_direction_output(dev->gpio_le, \
56  NO_OS_GPIO_HIGH)
57 #define ADF4153_LE_LOW no_os_gpio_set_value(dev->gpio_le, \
58  NO_OS_GPIO_LOW)
59 #define ADF4153_LE_HIGH no_os_gpio_set_value(dev->gpio_le, \
60  NO_OS_GPIO_HIGH)
61 
62 #define ADF4153_CE_OUT no_os_gpio_direction_output(dev->gpio_ce, \
63  NO_OS_GPIO_HIGH)
64 #define ADF4153_CE_LOW no_os_gpio_set_value(dev->gpio_ce, \
65  NO_OS_GPIO_LOW)
66 #define ADF4153_CE_HIGH no_os_gpio_set_value(dev->gpio_ce, \
67  NO_OS_GPIO_HIGH)
68 
69 #define ADF4153_LE2_OUT no_os_gpio_direction_output(dev->gpio_le2, \
70  NO_OS_GPIO_HIGH)
71 #define ADF4153_LE2_LOW no_os_gpio_set_value(dev->gpio_le2, \
72  NO_OS_GPIO_LOW)
73 #define ADF4153_LE2_HIGH no_os_gpio_set_value(dev->gpio_le2, \
74  NO_OS_GPIO_HIGH)
75 
76 #define ADF4153_CE2_OUT no_os_gpio_direction_output(dev->gpio_ce2, \
77  NO_OS_GPIO_HIGH)
78 #define ADF4153_CE2_LOW no_os_gpio_set_value(dev->gpio_ce2, \
79  NO_OS_GPIO_LOW)
80 #define ADF4153_CE2_HIGH no_os_gpio_set_value(dev->gpio_ce2, \
81  NO_OS_GPIO_HIGH)
82 
83 /* Control Bits */
84 #define ADF4153_CTRL_MASK 0x3
85 
86 #define ADF4153_CTRL_N_DIVIDER 0 /* N Divider Register */
87 #define ADF4153_CTRL_R_DIVIDER 1 /* R Divider Register */
88 #define ADF4153_CTRL_CONTROL 2 /* Control Register */
89 #define ADF4153_CTRL_NOISE_SPUR 3 /* Noise and Spur Reg*/
90 
91 /* N Divider Register */
92 
93 /* 12-bit fractional value */
94 #define ADF4153_R0_FRAC_OFFSET 2
95 #define ADF4153_R0_FRAC_MASK 0xFFFul
96 #define ADF4153_R0_FRAC(x) ((x) & ADF4153_R0_FRAC_MASK) \
97  << ADF4153_R0_FRAC_OFFSET
98 /* 9-bit integer value */
99 #define ADF4153_R0_INT_OFFSET 14
100 #define ADF4153_R0_INT_MASK 0x1FFul
101 #define ADF4153_R0_INT(x) ((x) & ADF4153_R0_INT_MASK) \
102  << ADF4153_R0_INT_OFFSET
103 
104 /* Fast-Lock */
105 #define ADF4153_R0_FASTLOCK_OFFSET 23
106 #define ADF4153_R0_FASTLOCK_MASK 0x1
107 #define ADF4153_R0_FASTLOCK(x) ((x) & ADF4153_R0_FASTLOCK_MASK) \
108  << ADF4153_R0_FASTLOCK_OFFSET
109 
110 /* R Divider Register */
111 
112 /* 12-bit interpolator modulus value */
113 #define ADF4153_R1_MOD_OFFSET 2
114 #define ADF4153_R1_MOD_MASK 0xFFFul
115 #define ADF4153_R1_MOD(x) ((x) & ADF4153_R1_MOD_MASK) \
116  << ADF4153_R1_MOD_OFFSET
117 /* 4-bit R Counter */
118 #define ADF4153_R1_RCOUNTER_OFFSET 14
119 #define ADF4153_R1_RCOUNTER_MASK 0xFul
120 #define ADF4153_R1_RCOUNTER(x) ((x) & ADF4153_R1_RCOUNTER_MASK) \
121  << ADF4153_R1_RCOUNTER_OFFSET
122 /* Prescale */
123 #define ADF4153_R1_PRESCALE_OFFSET 18
124 #define ADF4153_R1_PRESCALE_MASK 0x1ul
125 #define ADF4153_R1_PRESCALE(x) ((x) & ADF4153_R1_PRESCALE_MASK) \
126  << ADF4153_R1_PRESCALE_OFFSET
127 /* MUXOUT */
128 #define ADF4153_R1_MUXOUT_OFFSET 20
129 #define ADF4153_R1_MUXOUT_MASK 0x7
130 #define ADF4153_R1_MUXOUT(x) ((x) & ADF4153_R1_MUXOUT_MASK) \
131  << ADF4153_R1_MUXOUT_OFFSET
132 /* Load Control */
133 #define ADF4153_R1_LOAD_OFFSET 23
134 #define ADF4153_R1_LOAD_MASK 0x1
135 #define ADF4153_R1_LOAD(x) ((x) & ADF4153_R1_LOAD_MASK) \
136  << ADF4153_R1_LOAD_OFFSET
137 
138 /* Control Register */
139 
140 /* Counter Reset */
141 #define ADF4153_R2_COUNTER_RST_OFFSET 2
142 #define ADF4153_R2_COUNTER_RST_MASK 0x1ul
143 #define ADF4153_R2_COUNTER_RST(x) ((x) & ADF4153_R2_COUNTER_RST_MASK)\
144  << ADF4153_R2_COUNTER_RST_OFFSET
145 /* CP Three-State */
146 #define ADF4153_R2_CP_3STATE_OFFSET 3
147 #define ADF4153_R2_CP_3STATE_MASK 0x1
148 #define ADF4153_R2_CP_3STATE(x) ((x) & ADF4153_R2_CP_3STATE_MASK) \
149  << ADF4153_R2_CP_3STATE_OFFSET
150 /* Power-down */
151 #define ADF4153_R2_POWER_DOWN_OFFSET 4
152 #define ADF4153_R2_POWER_DOWN_MASK 0x1
153 #define ADF4153_R2_POWER_DOWN(x) ((x) & ADF4153_R2_POWER_DOWN_MASK) \
154  << ADF4153_R2_POWER_DOWN_OFFSET
155 /* LDP */
156 #define ADF4153_R2_LDP_OFFSET 5
157 #define ADF4153_R2_LDP_MASK 0x1
158 #define ADF4153_R2_LDP(x) ((x) & ADF4153_R2_LDP_MASK) \
159  << ADF4153_R2_LDP_OFFSET
160 /* PD Polarity */
161 #define ADF4153_R2_PD_POL_OFFSET 6
162 #define ADF4153_R2_PD_POL_MASK 0x1
163 #define ADF4153_R2_PD_POL(x) ((x) & ADF4153_R2_PD_POL_MASK) \
164  << ADF4153_R2_PD_POL_OFFSET
165 /* CP Current Settings and CP/2 */
166 #define ADF4153_R2_CP_CURRENT_OFFSET 7
167 #define ADF4153_R2_CP_CURRENT_MASK 0xF
168 #define ADF4153_R2_CP_CURRENT(x) ((x) & ADF4153_R2_CP_CURRENT_MASK) \
169  << ADF4153_R2_CP_CURRENT_OFFSET
170 /* Reference doubler */
171 #define ADF4153_R2_REF_DOUBLER_OFFSET 11
172 #define ADF4153_R2_REF_DOUBLER_MASK 0x1
173 #define ADF4153_R2_REF_DOUBLER(x) ((x) & ADF4153_R2_REF_DOUBLER_MASK)\
174  << ADF4153_R2_REF_DOUBLER_OFFSET
175 /* Resync */
176 #define ADF4153_R2_RESYNC_OFFSET 12
177 #define ADF4153_R2_RESYNC_MASK 0x7
178 #define ADF4153_R2_RESYNC(x) ((x) & ADF4153_R2_RESYNC_MASK) \
179  << ADF4153_R2_RESYNC_OFFSET
180 
181 /* Noise and spur register */
182 
183 /* Noise and spur mode */
184 #define ADF4153_R3_NOISE_SPURG_MASK 0x3C4
185 #define ADF4153_R3_NOISE_SPURG(x) ( (((x) << 0x2) & 0x7) | \
186  (((x) >> 0x1) << 0x6) ) &\
187  ADF4153_R3_NOISE_SPURG_MASK
188 
189 /* Fast-Lock definitions */
190 #define ADF4153_FASTLOCK_DISABLED 0
191 #define ADF4153_FASTLOCK_ENABLED 1
192 /* Prescale definitions */
193 #define ADF4153_PRESCALER_4_5 0
194 #define ADF4153_PRESCALER_8_9 1
195 /* Muxout definitions */
196 #define ADF4153_MUXOUT_THREESTATE 0
197 #define ADF4153_MUXOUT_DIGITAL_LOCK 1
198 #define ADF4153_MUXOUT_NDIV_OUTPUT 2
199 #define ADF4153_MUXOUT_LOGICHIGH 3
200 #define ADF4153_MUXOUT_RDIV_OUTPUT 4
201 #define ADF4153_MUXOUT_ANALOG_LOCK 5
202 #define ADF4153_MUXOUT_FASTLOCK 6
203 #define ADF4153_MUXOUT_LOGICLOW 7
204 /* Load Control definitions */
205 #define ADF4153_LOAD_NORMAL 0
206 #define ADF4153_LOAD_RESYNC 1
207 /* Counter Reset Definitions */
208 #define ADF4153_CR_DISABLED 0
209 #define ADF4153_CR_ENABLED 1
210 /* CP Three-state definitions */
211 #define ADF4153_CP_DISABLED 0
212 #define ADF4153_CP_THREE_STATE 1
213 /* Power-down definitions */
214 #define ADF4153_PD_DISABLED 0
215 #define ADF4153_PD_ENABLED 1
216 /* LDP definitions */
217 #define ADF4153_LDP_24 0
218 #define ADF4153_LDP_40 1
219 /* PD Polarity definitions */
220 #define ADF4153_PD_POL_NEGATIV 0
221 #define ADF4153_PD_POL_POSITIVE 1
222 /* CR Current Settings definitions */
223 #define ADF4153_CP_CURRENT_0_63 0
224 #define ADF4153_CP_CURRENT_1_25 1
225 #define ADF4153_CP_CURRENT_1_88 2
226 #define ADF4153_CP_CURRENT_2_50 3
227 #define ADF4153_CP_CURRENT_3_13 4
228 #define ADF4153_CP_CURRENT_3_75 5
229 #define ADF4153_CP_CURRENT_4_38 6
230 #define ADF4153_CP_CURRENT_5_00 7
231 #define ADF4153_CP2_CURRENT_0_31 8
232 #define ADF4153_CP2_CURRENT_0_63 9
233 #define ADF4153_CP2_CURRENT_0_94 10
234 #define ADF4153_CP2_CURRENT_1_25 11
235 #define ADF4153_CP2_CURRENT_1_57 12
236 #define ADF4153_CP2_CURRENT_1_88 13
237 #define ADF4153_CP2_CURRENT_2_19 14
238 #define ADF4153_CP2_CURRENT_2_50 15
239 
240 /* Reference doubler definition */
241 #define ADF4153_REF_DOUBLER_DIS 0
242 #define ADF4153_REF_DOUBLER_EN 1
243 /* Noise and Spur mode definitions */
244 #define ADF4153_LOW_SPUR_MODE 0b00000
245 #define ADF4153_LOW_NOISE_SPUR 0b11100
246 #define ADF4153_LOWEST_NOISE 0b11111
247 
248 /*****************************************************************************/
249 /************************** Types Declarations *******************************/
250 /*****************************************************************************/
251 
259 
260  /* Reference Input Frequency*/
261  uint32_t ref_in;
262  /* Channel resolution or Channel spacing */
263  uint32_t channel_spacing;
264 
265  /* N Divider */
269  uint16_t frac_value : 12;
273  uint16_t int_value : 9;
275  uint8_t fastlock : 1;
276 
277  /* R Divider */
281  uint16_t mod_value : 12;
286  uint8_t r_counter : 4;
291  uint8_t prescaler : 1;
293  uint8_t muxout : 3;
298  uint8_t load_control : 1;
299 
300  /* Control Register */
302  uint8_t counter_reset : 1;
306  uint8_t cp_three_state : 1;
308  uint8_t power_down : 1;
310  uint8_t ldp : 1;
312  uint8_t pd_polarity : 1;
316  uint8_t cp_current : 4;
320  uint8_t ref_doubler : 1;
324  uint8_t resync : 4;
325 
326  /* Noise and Spur register */
330  uint8_t noise_spur : 5;
331 
332 };
333 
334 struct adf4153_dev {
335  /* SPI */
337  /* GPIO */
342  /* Device Settings */
344  /* RF input frequency limits */
347  /* Maximum PFD frequency */
349  /* VCO out frequency limits */
352  /* maximum interpolator modulus value */
353  uint16_t adf4153_mod_max;
354 
355  /* Internal buffers for each latch */
356  uint32_t r0; /* the actual value of N Divider Register */
357  uint32_t r1; /* the actual value of R Divider Register */
358  uint32_t r2; /* the actual value of Control Register */
359  uint32_t r3; /* the actual value of Noise and Spur Reg*/
360 };
361 
363  /* SPI */
365  /* GPIO */
370  /* Device Settings */
372 };
373 
374 /*****************************************************************************/
375 /* Functions Prototypes */
376 /*****************************************************************************/
377 /* Initialize the communication with the device */
378 int8_t adf4153_init(struct adf4153_dev **device,
380 
381 /* Free the resources allocated by adf4153_init(). */
382 int32_t adf4153_remove(struct adf4153_dev *dev);
383 
384 /* Update register function */
385 void adf4153_update_latch(struct adf4153_dev *dev,
386  uint32_t latch_data);
387 
388 /* Return the value of a desired latch */
389 uint32_t adf4153_read_latch(struct adf4153_dev *dev,
390  uint8_t latch_type);
391 
392 /* Set the frequency to a desired value */
393 uint64_t adf4153_set_frequency(struct adf4153_dev *dev,
394  uint64_t frequency);
395 
396 /* Return the value of the channel spacing */
397 uint32_t adf4153_get_channel_spacing(struct adf4153_dev *dev);
398 
399 #endif // __ADF4153_H__
ADF4153_R1_MOD
#define ADF4153_R1_MOD(x)
Definition: adf4153.h:115
ADF4153_R2_RESYNC_MASK
#define ADF4153_R2_RESYNC_MASK
Definition: adf4153.h:177
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
adf4153_settings_t::mod_value
uint16_t mod_value
Definition: adf4153.h:281
adf4153_init
int8_t adf4153_init(struct adf4153_dev **device, struct adf4153_init_param init_param)
Initialize SPI and Initial Values for ADF4106 Board.
Definition: adf4153.c:73
adf4153_get_channel_spacing
uint32_t adf4153_get_channel_spacing(struct adf4153_dev *dev)
Return the value of the channel spacing.
Definition: adf4153.c:407
adf4153_read_latch
uint32_t adf4153_read_latch(struct adf4153_dev *dev, uint8_t latch_type)
Return the value of a desired latch.
Definition: adf4153.c:252
adf4153_settings_t::power_down
uint8_t power_down
Definition: adf4153.h:308
ADF4153_R1_MOD_MASK
#define ADF4153_R1_MOD_MASK
Definition: adf4153.h:114
adf4153_init_param::gpio_ce2
struct no_os_gpio_init_param gpio_ce2
Definition: adf4153.h:369
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
ADF4153_LE_HIGH
#define ADF4153_LE_HIGH
Definition: adf4153.h:59
ADF4153_R2_COUNTER_RST_MASK
#define ADF4153_R2_COUNTER_RST_MASK
Definition: adf4153.h:142
DATA_MASK_LSB8
#define DATA_MASK_LSB8
Definition: adf4153.c:54
no_os_spi.h
Header file of SPI Interface.
adf4153_settings_t::load_control
uint8_t load_control
Definition: adf4153.h:298
ADF4153_R1_RCOUNTER
#define ADF4153_R1_RCOUNTER(x)
Definition: adf4153.h:120
adf4153_update_latch
void adf4153_update_latch(struct adf4153_dev *dev, uint32_t latch_data)
Update one of the latch via the SPI interface.
Definition: adf4153.c:205
adf4153_dev::gpio_le2
struct no_os_gpio_desc * gpio_le2
Definition: adf4153.h:340
adf4153_dev::r3
uint32_t r3
Definition: adf4153.h:359
adf4153_settings_t::channel_spacing
uint32_t channel_spacing
Definition: adf4153.h:263
adf4153_dev::gpio_ce
struct no_os_gpio_desc * gpio_ce
Definition: adf4153.h:339
ADF4153_CTRL_N_DIVIDER
#define ADF4153_CTRL_N_DIVIDER
Definition: adf4153.h:86
adf4153.h
Header file of adf4153 driver.
ADF4153_CR_DISABLED
#define ADF4153_CR_DISABLED
Definition: adf4153.h:208
ADF4153_R0_FASTLOCK
#define ADF4153_R0_FASTLOCK(x)
Definition: adf4153.h:107
adf4153_settings_t::int_value
uint16_t int_value
Definition: adf4153.h:273
adf4153_dev::r0
uint32_t r0
Definition: adf4153.h:356
adf4153_settings_t::frac_value
uint16_t frac_value
Definition: adf4153.h:269
device
Definition: ad9361_util.h:75
adf4153_settings_t::noise_spur
uint8_t noise_spur
Definition: adf4153.h:330
adf4153_init_param::gpio_le2
struct no_os_gpio_init_param gpio_le2
Definition: adf4153.h:368
ADF4153_CR_ENABLED
#define ADF4153_CR_ENABLED
Definition: adf4153.h:209
ADF4153_R2_CP_CURRENT
#define ADF4153_R2_CP_CURRENT(x)
Definition: adf4153.h:168
DATA_OFFSET_MSB8
#define DATA_OFFSET_MSB8
Definition: adf4153.c:51
adf4153_dev::adf4153_pfd_max_frq
uint32_t adf4153_pfd_max_frq
Definition: adf4153.h:348
adf4153_dev::adf4153_mod_max
uint16_t adf4153_mod_max
Definition: adf4153.h:353
adf4153_settings_t
Definition: adf4153.h:258
adf4153_init
int8_t adf4153_init(struct adf4153_dev **device, struct adf4153_init_param init_param)
Initialize SPI and Initial Values for ADF4106 Board.
Definition: adf4153.c:73
ADF4153_LOAD_RESYNC
#define ADF4153_LOAD_RESYNC
Definition: adf4153.h:206
ADF4153_R1_LOAD
#define ADF4153_R1_LOAD(x)
Definition: adf4153.h:135
ADF4153_R2_PD_POL
#define ADF4153_R2_PD_POL(x)
Definition: adf4153.h:163
adf4153_dev::spi_desc
no_os_spi_desc * spi_desc
Definition: adf4153.h:336
adf4153_dev::gpio_le
struct no_os_gpio_desc * gpio_le
Definition: adf4153.h:338
adf4153_init_param::gpio_le
struct no_os_gpio_init_param gpio_le
Definition: adf4153.h:366
adf4153_settings_t::counter_reset
uint8_t counter_reset
Definition: adf4153.h:302
adf4153_dev::adf4153_rfin_min_frq
uint32_t adf4153_rfin_min_frq
Definition: adf4153.h:345
ADF4153_R2_CP_3STATE
#define ADF4153_R2_CP_3STATE(x)
Definition: adf4153.h:148
ADF4153_R2_POWER_DOWN
#define ADF4153_R2_POWER_DOWN(x)
Definition: adf4153.h:153
ADF4153_CE_OUT
#define ADF4153_CE_OUT
Definition: adf4153.h:62
adf4153_settings_t::fastlock
uint8_t fastlock
Definition: adf4153.h:275
adf4153_update_latch
void adf4153_update_latch(struct adf4153_dev *dev, uint32_t latch_data)
Update one of the latch via the SPI interface.
Definition: adf4153.c:205
ADF4153_LE_LOW
#define ADF4153_LE_LOW
Definition: adf4153.h:57
DATA_OFFSET_MID8
#define DATA_OFFSET_MID8
Definition: adf4153.c:53
adf4153_init_param::spi_init
no_os_spi_init_param spi_init
Definition: adf4153.h:364
ADF4153_R0_FRAC
#define ADF4153_R0_FRAC(x)
Definition: adf4153.h:96
adf4153_dev::adf4153_vco_min_frq
uint32_t adf4153_vco_min_frq
Definition: adf4153.h:350
adf4153_settings_t::ref_doubler
uint8_t ref_doubler
Definition: adf4153.h:320
adf4153_set_frequency
uint64_t adf4153_set_frequency(struct adf4153_dev *dev, uint64_t frequency)
Sets the output frequency.
Definition: adf4153.c:307
adf4153_init_param::adf4153_st
struct adf4153_settings_t adf4153_st
Definition: adf4153.h:371
adf4153_dev::gpio_ce2
struct no_os_gpio_desc * gpio_ce2
Definition: adf4153.h:341
adf4153_settings_t::ref_in
uint32_t ref_in
Definition: adf4153.h:261
adf4153_settings_t::ldp
uint8_t ldp
Definition: adf4153.h:310
ADF4153_PRESCALER_4_5
#define ADF4153_PRESCALER_4_5
Definition: adf4153.h:193
DATA_MASK_MSB8
#define DATA_MASK_MSB8
Definition: adf4153.c:50
ADF4153_R2_REF_DOUBLER_OFFSET
#define ADF4153_R2_REF_DOUBLER_OFFSET
Definition: adf4153.h:171
ADF4153_CTRL_R_DIVIDER
#define ADF4153_CTRL_R_DIVIDER
Definition: adf4153.h:87
ADF4153_R2_COUNTER_RST
#define ADF4153_R2_COUNTER_RST(x)
Definition: adf4153.h:143
ADF4153_R1_PRESCALE_MASK
#define ADF4153_R1_PRESCALE_MASK
Definition: adf4153.h:124
adf4153_dev
Definition: adf4153.h:334
ADF4153_PRESCALER_8_9
#define ADF4153_PRESCALER_8_9
Definition: adf4153.h:194
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
ADF4153_R0_INT
#define ADF4153_R0_INT(x)
Definition: adf4153.h:101
adf4153_read_latch
uint32_t adf4153_read_latch(struct adf4153_dev *dev, uint8_t latch_type)
Return the value of a desired latch.
Definition: adf4153.c:252
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
adf4153_settings_t::cp_three_state
uint8_t cp_three_state
Definition: adf4153.h:306
ADF4153_R2_RESYNC
#define ADF4153_R2_RESYNC(x)
Definition: adf4153.h:178
adf4153_get_channel_spacing
uint32_t adf4153_get_channel_spacing(struct adf4153_dev *dev)
Return the value of the channel spacing.
Definition: adf4153.c:407
ADF4153_CTRL_NOISE_SPUR
#define ADF4153_CTRL_NOISE_SPUR
Definition: adf4153.h:89
CEIL
#define CEIL(a, b)
Definition: adf4153.c:48
ADF4153_LOAD_NORMAL
#define ADF4153_LOAD_NORMAL
Definition: adf4153.h:205
ADF4153_CE_HIGH
#define ADF4153_CE_HIGH
Definition: adf4153.h:66
adf4153_settings_t::pd_polarity
uint8_t pd_polarity
Definition: adf4153.h:312
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
ADF4153_R1_PRESCALE
#define ADF4153_R1_PRESCALE(x)
Definition: adf4153.h:125
adf4153_dev::adf4153_rfin_max_frq
uint32_t adf4153_rfin_max_frq
Definition: adf4153.h:346
adf4153_remove
int32_t adf4153_remove(struct adf4153_dev *dev)
Free the resources allocated by adf4153_init().
Definition: adf4153.c:181
ADF4153_R1_MUXOUT
#define ADF4153_R1_MUXOUT(x)
Definition: adf4153.h:130
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
adf4153_tune_rcounter
uint32_t adf4153_tune_rcounter(struct adf4153_dev *dev, uint16_t *r_counter)
Increases the R counter value until the ADF4106_PDF_MAX_FREQ is greater than PFD frequency.
Definition: adf4153.c:282
DATA_MASK_MID8
#define DATA_MASK_MID8
Definition: adf4153.c:52
adf4153_settings_t::cp_current
uint8_t cp_current
Definition: adf4153.h:316
ADF4153_R2_REF_DOUBLER
#define ADF4153_R2_REF_DOUBLER(x)
Definition: adf4153.h:173
adf4153_settings_t::r_counter
uint8_t r_counter
Definition: adf4153.h:286
adf4153_settings_t::resync
uint8_t resync
Definition: adf4153.h:324
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:70
adf4153_set_frequency
uint64_t adf4153_set_frequency(struct adf4153_dev *dev, uint64_t frequency)
Sets the output frequency.
Definition: adf4153.c:307
no_os_gpio.h
Header file of GPIO Interface.
adf4153_dev::r1
uint32_t r1
Definition: adf4153.h:357
ADF4153_R1_RCOUNTER_MASK
#define ADF4153_R1_RCOUNTER_MASK
Definition: adf4153.h:119
ADF4153_LE_OUT
#define ADF4153_LE_OUT
Definition: adf4153.h:55
adf4153_settings_t::muxout
uint8_t muxout
Definition: adf4153.h:293
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
ADF4153_R2_LDP
#define ADF4153_R2_LDP(x)
Definition: adf4153.h:158
ADF4153_CTRL_CONTROL
#define ADF4153_CTRL_CONTROL
Definition: adf4153.h:88
adf4153_dev::adf4153_st
struct adf4153_settings_t adf4153_st
Definition: adf4153.h:343
FREQ_2_GHZ
#define FREQ_2_GHZ
Definition: adf4153.c:58
DATA_OFFSET_LSB8
#define DATA_OFFSET_LSB8
Definition: adf4153.c:55
ADF4153_R0_INT_MASK
#define ADF4153_R0_INT_MASK
Definition: adf4153.h:100
adf4153_init_param::gpio_ce
struct no_os_gpio_init_param gpio_ce
Definition: adf4153.h:367
adf4153_dev::adf4153_vco_max_frq
uint64_t adf4153_vco_max_frq
Definition: adf4153.h:351
adf4153_remove
int32_t adf4153_remove(struct adf4153_dev *dev)
Free the resources allocated by adf4153_init().
Definition: adf4153.c:181
adf4153_settings_t::prescaler
uint8_t prescaler
Definition: adf4153.h:291
adf4153_init_param
Definition: adf4153.h:362
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
adf4153_dev::r2
uint32_t r2
Definition: adf4153.h:358
ADF4153_R0_FRAC_MASK
#define ADF4153_R0_FRAC_MASK
Definition: adf4153.h:95