no-OS
adf4350.h
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1 /***************************************************************************/
40 #ifndef __ADF4350_H__
41 #define __ADF4350_H__
42 
43 /******************************************************************************/
44 /***************************** Include Files **********************************/
45 /******************************************************************************/
46 #include <stdint.h>
47 #include "no_os_spi.h"
48 
49 /******************************************************************************/
50 /********************** Macros and Constants Definitions **********************/
51 /******************************************************************************/
52 
53 /* Channels */
54 #define ADF4350_RX_CHANNEL 0
55 #define ADF4350_TX_CHANNEL 1
56 
57 /* Registers */
58 #define ADF4350_REG0 0
59 #define ADF4350_REG1 1
60 #define ADF4350_REG2 2
61 #define ADF4350_REG3 3
62 #define ADF4350_REG4 4
63 #define ADF4350_REG5 5
64 
65 /* REG0 Bit Definitions */
66 #define ADF4350_REG0_FRACT(x) (((x) & 0xFFF) << 3)
67 #define ADF4350_REG0_INT(x) (((x) & 0xFFFF) << 15)
68 
69 /* REG1 Bit Definitions */
70 #define ADF4350_REG1_MOD(x) (((x) & 0xFFF) << 3)
71 #define ADF4350_REG1_PHASE(x) (((x) & 0xFFF) << 15)
72 #define ADF4350_REG1_PRESCALER (1 << 27)
73 
74 /* REG2 Bit Definitions */
75 #define ADF4350_REG2_COUNTER_RESET_EN (1 << 3)
76 #define ADF4350_REG2_CP_THREESTATE_EN (1 << 4)
77 #define ADF4350_REG2_POWER_DOWN_EN (1 << 5)
78 #define ADF4350_REG2_PD_POLARITY_POS (1 << 6)
79 #define ADF4350_REG2_LDP_6ns (1 << 7)
80 #define ADF4350_REG2_LDP_10ns (0 << 7)
81 #define ADF4350_REG2_LDF_FRACT_N (0 << 8)
82 #define ADF4350_REG2_LDF_INT_N (1 << 8)
83 #define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x) (((((x)-312) / 312) & 0xF) << 9)
84 #define ADF4350_REG2_DOUBLE_BUFF_EN (1 << 13)
85 #define ADF4350_REG2_10BIT_R_CNT(x) ((x) << 14)
86 #define ADF4350_REG2_RDIV2_EN (1 << 24)
87 #define ADF4350_REG2_RMULT2_EN (1 << 25)
88 #define ADF4350_REG2_MUXOUT(x) ((x) << 26)
89 #define ADF4350_REG2_NOISE_MODE(x) (((x) & 0x3) << 29)
90 
91 /* REG3 Bit Definitions */
92 #define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3)
93 #define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16)
94 #define ADF4350_REG3_12BIT_CSR_EN (1 << 18)
95 #define ADF4351_REG3_CHARGE_CANCELLATION_EN (1 << 21)
96 #define ADF4351_REG3_ANTI_BACKLASH_3ns_EN (1 << 22)
97 #define ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH (1 << 23)
98 
99 /* REG4 Bit Definitions */
100 #define ADF4350_REG4_OUTPUT_PWR(x) ((x) << 3)
101 #define ADF4350_REG4_RF_OUT_EN (1 << 5)
102 #define ADF4350_REG4_AUX_OUTPUT_PWR(x) ((x) << 6)
103 #define ADF4350_REG4_AUX_OUTPUT_EN (1 << 8)
104 #define ADF4350_REG4_AUX_OUTPUT_FUND (1 << 9)
105 #define ADF4350_REG4_AUX_OUTPUT_DIV (0 << 9)
106 #define ADF4350_REG4_MUTE_TILL_LOCK_EN (1 << 10)
107 #define ADF4350_REG4_VCO_PWRDOWN_EN (1 << 11)
108 #define ADF4350_REG4_8BIT_BAND_SEL_CLKDIV(x) ((x) << 12)
109 #define ADF4350_REG4_RF_DIV_SEL(x) ((x) << 20)
110 #define ADF4350_REG4_FEEDBACK_DIVIDED (0 << 23)
111 #define ADF4350_REG4_FEEDBACK_FUND (1 << 23)
112 
113 /* REG5 Bit Definitions */
114 #define ADF4350_REG5_LD_PIN_MODE_LOW (0 << 22)
115 #define ADF4350_REG5_LD_PIN_MODE_DIGITAL (1 << 22)
116 #define ADF4350_REG5_LD_PIN_MODE_HIGH (3 << 22)
117 
118 /* Specifications */
119 #define ADF4350_MAX_OUT_FREQ 4400000000ULL /* Hz */
120 #define ADF4350_MIN_OUT_FREQ 34375000 /* Hz */
121 #define ADF4350_MIN_VCO_FREQ 2200000000ULL /* Hz */
122 #define ADF4350_MAX_FREQ_45_PRESC 3000000000ULL /* Hz */
123 #define ADF4350_MAX_FREQ_PFD 32000000 /* Hz */
124 #define ADF4350_MAX_BANDSEL_CLK 125000 /* Hz */
125 #define ADF4350_MAX_FREQ_REFIN 250000000 /* Hz */
126 #define ADF4350_MAX_MODULUS 4095
127 #define ADF4350_MAX_R_CNT 1023
128 
129 /******************************************************************************/
130 /************************ Types Definitions ***********************************/
131 /******************************************************************************/
133  uint32_t clkin;
134  uint32_t channel_spacing;
136 
137  uint16_t ref_div_factor; /* 10-bit R counter */
138  uint8_t ref_doubler_en;
139  uint8_t ref_div2_en;
140 
145 };
146 
147 typedef struct {
148  /* SPI */
150 
151  /* Device settings */
152  uint32_t clkin;
153  uint32_t channel_spacing;
158 
159  /* r2_user_settings */
164  uint32_t muxout_select;
166 
167  /* r3_user_settings */
174 
175  /* r4_user_settings */
179  uint32_t output_power;
182 
183 typedef struct {
186  uint32_t clkin;
187  uint32_t chspc; /* Channel Spacing */
188  uint32_t fpfd; /* Phase Frequency Detector */
189  uint32_t min_out_freq;
190  uint32_t r0_fract;
191  uint32_t r0_int;
192  uint32_t r1_mod;
193  uint32_t r4_rf_div_sel;
194  uint32_t regs[6];
195  uint32_t regs_hw[6];
196  uint32_t val;
197 } adf4350_dev;
198 
199 /******************************************************************************/
200 /************************ Functions Declarations ******************************/
201 /******************************************************************************/
206 int32_t adf4350_write(adf4350_dev *dev,
207  uint32_t data);
210  int64_t Hz);
213  int32_t Hz);
216  int64_t Hz);
219  int32_t pwd);
220 
221 #endif // __ADF4350_H__
adf4350_platform_data::gpio_lock_detect
int32_t gpio_lock_detect
Definition: adf4350.h:144
ADF4350_MAX_BANDSEL_CLK
#define ADF4350_MAX_BANDSEL_CLK
Definition: adf4350.h:124
adf4350_init_param::reference_div_factor
uint32_t reference_div_factor
Definition: adf4350.h:155
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
adf4350_init_param::muxout_select
uint32_t muxout_select
Definition: adf4350.h:164
adf4350_dev::regs
uint32_t regs[6]
Definition: adf4350.h:194
no_os_spi.h
Header file of SPI Interface.
adf4350_init_param::spi_init
no_os_spi_init_param spi_init
Definition: adf4350.h:149
ADF4350_MIN_OUT_FREQ
#define ADF4350_MIN_OUT_FREQ
Definition: adf4350.h:120
ADF4350_REG2_RDIV2_EN
#define ADF4350_REG2_RDIV2_EN
Definition: adf4350.h:86
ADF4351_REG3_ANTI_BACKLASH_3ns_EN
#define ADF4351_REG3_ANTI_BACKLASH_3ns_EN
Definition: adf4350.h:96
adf4350_out_altvoltage0_refin_frequency
int64_t adf4350_out_altvoltage0_refin_frequency(adf4350_dev *dev, int64_t Hz)
Sets PLL 0 REFin frequency in Hz.
Definition: adf4350.c:404
adf4350_init_param::lock_detect_precision_6ns_enable
uint8_t lock_detect_precision_6ns_enable
Definition: adf4350.h:161
adf4350_dev::spi_desc
no_os_spi_desc * spi_desc
Definition: adf4350.h:184
ADF4350_REG2_10BIT_R_CNT
#define ADF4350_REG2_10BIT_R_CNT(x)
Definition: adf4350.h:85
ADF4350_REG2_PD_POLARITY_POS
#define ADF4350_REG2_PD_POLARITY_POS
Definition: adf4350.h:78
adf4350_init_param::aux_output_enable
uint8_t aux_output_enable
Definition: adf4350.h:176
adf4350_set_freq
int64_t adf4350_set_freq(adf4350_dev *dev, uint64_t freq)
Sets the ADF4350 frequency.
Definition: adf4350.c:148
ADF4350_REG2
#define ADF4350_REG2
Definition: adf4350.h:60
ADF4350_MAX_FREQ_PFD
#define ADF4350_MAX_FREQ_PFD
Definition: adf4350.h:123
adf4350_write
int32_t adf4350_write(adf4350_dev *dev, uint32_t data)
Writes 4 bytes of data to ADF4350.
Definition: adf4350.c:56
adf4350_dev::r0_int
uint32_t r0_int
Definition: adf4350.h:191
device
Definition: ad9361_util.h:75
ADF4350_REG3_12BIT_CSR_EN
#define ADF4350_REG3_12BIT_CSR_EN
Definition: adf4350.h:94
ADF4350_REG4_RF_DIV_SEL
#define ADF4350_REG4_RF_DIV_SEL(x)
Definition: adf4350.h:109
adf4350_out_altvoltage0_refin_frequency
int64_t adf4350_out_altvoltage0_refin_frequency(adf4350_dev *dev, int64_t Hz)
Sets PLL 0 REFin frequency in Hz.
Definition: adf4350.c:404
ADF4350_REG4_8BIT_BAND_SEL_CLKDIV
#define ADF4350_REG4_8BIT_BAND_SEL_CLKDIV(x)
Definition: adf4350.h:108
adf4350_out_altvoltage0_frequency
int64_t adf4350_out_altvoltage0_frequency(adf4350_dev *dev, int64_t Hz)
Stores PLL 0 frequency in Hz.
Definition: adf4350.c:372
ADF4350_REG1_MOD
#define ADF4350_REG1_MOD(x)
Definition: adf4350.h:70
adf4350_platform_data::ref_doubler_en
uint8_t ref_doubler_en
Definition: adf4350.h:138
adf4350_init_param::phase_detector_polarity_positive_enable
uint8_t phase_detector_polarity_positive_enable
Definition: adf4350.h:160
adf4350_platform_data::r4_user_settings
uint32_t r4_user_settings
Definition: adf4350.h:143
ADF4350_REG4_AUX_OUTPUT_FUND
#define ADF4350_REG4_AUX_OUTPUT_FUND
Definition: adf4350.h:104
ADF4350_REG1_PRESCALER
#define ADF4350_REG1_PRESCALER
Definition: adf4350.h:72
adf4350_platform_data::ref_div2_en
uint8_t ref_div2_en
Definition: adf4350.h:139
ADF4350_MAX_R_CNT
#define ADF4350_MAX_R_CNT
Definition: adf4350.h:127
adf4350_init_param::band_select_clock_mode_high_enable
uint8_t band_select_clock_mode_high_enable
Definition: adf4350.h:171
adf4350_sync_config
int32_t adf4350_sync_config(adf4350_dev *dev)
Updates the registers values.
Definition: adf4350.c:76
adf4350_init_param::anti_backlash_3ns_enable
uint8_t anti_backlash_3ns_enable
Definition: adf4350.h:170
adf4350_init_param::lock_detect_function_integer_n_enable
uint8_t lock_detect_function_integer_n_enable
Definition: adf4350.h:162
adf4350_tune_r_cnt
int32_t adf4350_tune_r_cnt(adf4350_dev *dev, uint16_t r_cnt)
Increases the R counter value until the ADF4350_MAX_FREQ_PFD is greater than PFD frequency.
Definition: adf4350.c:110
ADF4350_REG3_12BIT_CLKDIV
#define ADF4350_REG3_12BIT_CLKDIV(x)
Definition: adf4350.h:92
adf4350_init_param::aux_output_power
uint32_t aux_output_power
Definition: adf4350.h:180
adf4350_dev::r0_fract
uint32_t r0_fract
Definition: adf4350.h:190
ADF4350_REG2_DOUBLE_BUFF_EN
#define ADF4350_REG2_DOUBLE_BUFF_EN
Definition: adf4350.h:84
adf4350_init_param
Definition: adf4350.h:147
adf4350_dev::clkin
uint32_t clkin
Definition: adf4350.h:186
adf4350_dev::r1_mod
uint32_t r1_mod
Definition: adf4350.h:192
adf4350_init_param::output_power
uint32_t output_power
Definition: adf4350.h:179
ADF4351_REG3_CHARGE_CANCELLATION_EN
#define ADF4351_REG3_CHARGE_CANCELLATION_EN
Definition: adf4350.h:95
ADF4350_REG2_NOISE_MODE
#define ADF4350_REG2_NOISE_MODE(x)
Definition: adf4350.h:89
adf4350_out_altvoltage0_frequency_resolution
int32_t adf4350_out_altvoltage0_frequency_resolution(adf4350_dev *dev, int32_t Hz)
Stores PLL 0 frequency resolution/channel spacing in Hz.
Definition: adf4350.c:386
adf4350_init_param::cycle_slip_reduction_enable
uint8_t cycle_slip_reduction_enable
Definition: adf4350.h:168
ADF4350_REG4_FEEDBACK_FUND
#define ADF4350_REG4_FEEDBACK_FUND
Definition: adf4350.h:111
adf4350_write
int32_t adf4350_write(adf4350_dev *dev, uint32_t data)
Writes 4 bytes of data to ADF4350.
Definition: adf4350.c:56
ADF4350_REG0_INT
#define ADF4350_REG0_INT(x)
Definition: adf4350.h:67
adf4350.h
Header file of ADF4350 Driver.
ADF4350_REG2_LDP_6ns
#define ADF4350_REG2_LDP_6ns
Definition: adf4350.h:79
ADF4350_MAX_OUT_FREQ
#define ADF4350_MAX_OUT_FREQ
Definition: adf4350.h:119
adf4350_platform_data::r2_user_settings
uint32_t r2_user_settings
Definition: adf4350.h:141
ADF4350_REG0_FRACT
#define ADF4350_REG0_FRACT(x)
Definition: adf4350.h:66
adf4350_platform_data::clkin
uint32_t clkin
Definition: adf4350.h:133
adf4350_init_param::aux_output_fundamental_enable
uint8_t aux_output_fundamental_enable
Definition: adf4350.h:177
adf4350_init_param::clkin
uint32_t clkin
Definition: adf4350.h:152
ADF4350_REG2_LDF_INT_N
#define ADF4350_REG2_LDF_INT_N
Definition: adf4350.h:82
adf4350_dev
Definition: adf4350.h:183
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
ADF4350_MIN_VCO_FREQ
#define ADF4350_MIN_VCO_FREQ
Definition: adf4350.h:121
adf4350_platform_data::power_up_frequency
uint64_t power_up_frequency
Definition: adf4350.h:135
gcd
uint32_t gcd(uint32_t x, uint32_t y)
Computes the greatest common divider of two numbers.
Definition: adf4350.c:127
adf4350_platform_data::r3_user_settings
uint32_t r3_user_settings
Definition: adf4350.h:142
adf4350_init_param::charge_cancellation_enable
uint8_t charge_cancellation_enable
Definition: adf4350.h:169
ADF4350_REG2_CHARGE_PUMP_CURR_uA
#define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x)
Definition: adf4350.h:83
adf4350_out_altvoltage0_frequency_resolution
int32_t adf4350_out_altvoltage0_frequency_resolution(adf4350_dev *dev, int32_t Hz)
Stores PLL 0 frequency resolution/channel spacing in Hz.
Definition: adf4350.c:386
ADF4350_REG4_AUX_OUTPUT_PWR
#define ADF4350_REG4_AUX_OUTPUT_PWR(x)
Definition: adf4350.h:102
ADF4350_MAX_FREQ_45_PRESC
#define ADF4350_MAX_FREQ_45_PRESC
Definition: adf4350.h:122
adf4350_platform_data::ref_div_factor
uint16_t ref_div_factor
Definition: adf4350.h:137
adf4350_setup
int32_t adf4350_setup(adf4350_dev **device, adf4350_init_param init_param)
Initializes the ADF4350.
Definition: adf4350.c:278
adf4350_out_altvoltage0_frequency
int64_t adf4350_out_altvoltage0_frequency(adf4350_dev *dev, int64_t Hz)
Stores PLL 0 frequency in Hz.
Definition: adf4350.c:372
adf4350_dev::regs_hw
uint32_t regs_hw[6]
Definition: adf4350.h:195
ADF4350_REG4
#define ADF4350_REG4
Definition: adf4350.h:62
adf4350_init_param::reference_doubler_enable
uint8_t reference_doubler_enable
Definition: adf4350.h:156
ADF4350_REG1_PHASE
#define ADF4350_REG1_PHASE(x)
Definition: adf4350.h:71
ADF4350_REG2_RMULT2_EN
#define ADF4350_REG2_RMULT2_EN
Definition: adf4350.h:87
ADF4350_REG5
#define ADF4350_REG5
Definition: adf4350.h:63
adf4350_init_param::low_spur_mode_enable
uint8_t low_spur_mode_enable
Definition: adf4350.h:165
adf4350_init_param::mute_till_lock_enable
uint8_t mute_till_lock_enable
Definition: adf4350.h:178
adf4350_init_param::charge_pump_current
uint32_t charge_pump_current
Definition: adf4350.h:163
adf4350_platform_data
Definition: adf4350.h:132
ADF4350_MAX_MODULUS
#define ADF4350_MAX_MODULUS
Definition: adf4350.h:126
adf4350_dev::r4_rf_div_sel
uint32_t r4_rf_div_sel
Definition: adf4350.h:193
adf4350_init_param::channel_spacing
uint32_t channel_spacing
Definition: adf4350.h:153
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ADF4350_REG0
#define ADF4350_REG0
Definition: adf4350.h:58
ADF4350_REG4_MUTE_TILL_LOCK_EN
#define ADF4350_REG4_MUTE_TILL_LOCK_EN
Definition: adf4350.h:106
ADF4350_REG2_MUXOUT
#define ADF4350_REG2_MUXOUT(x)
Definition: adf4350.h:88
adf4350_init_param::clk_divider_mode
uint32_t clk_divider_mode
Definition: adf4350.h:173
adf4350_init_param::reference_div2_enable
uint8_t reference_div2_enable
Definition: adf4350.h:157
ADF4350_REG3
#define ADF4350_REG3
Definition: adf4350.h:61
adf4350_out_altvoltage0_powerdown
int32_t adf4350_out_altvoltage0_powerdown(adf4350_dev *dev, int32_t pwd)
Powers down the PLL.
Definition: adf4350.c:424
adf4350_dev::pdata
struct adf4350_platform_data * pdata
Definition: adf4350.h:185
ADF4350_REG2_POWER_DOWN_EN
#define ADF4350_REG2_POWER_DOWN_EN
Definition: adf4350.h:77
ADF4350_REG4_RF_OUT_EN
#define ADF4350_REG4_RF_OUT_EN
Definition: adf4350.h:101
adf4350_dev::min_out_freq
uint32_t min_out_freq
Definition: adf4350.h:189
adf4350_platform_data::channel_spacing
uint32_t channel_spacing
Definition: adf4350.h:134
ADF4350_REG3_12BIT_CLKDIV_MODE
#define ADF4350_REG3_12BIT_CLKDIV_MODE(x)
Definition: adf4350.h:93
ADF4350_REG1
#define ADF4350_REG1
Definition: adf4350.h:59
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
adf4350_dev::val
uint32_t val
Definition: adf4350.h:196
ADF4350_REG4_OUTPUT_PWR
#define ADF4350_REG4_OUTPUT_PWR(x)
Definition: adf4350.h:100
adf4350_setup
int32_t adf4350_setup(adf4350_dev **device, adf4350_init_param init_param)
Initializes the ADF4350.
Definition: adf4350.c:278
ADF4350_REG5_LD_PIN_MODE_DIGITAL
#define ADF4350_REG5_LD_PIN_MODE_DIGITAL
Definition: adf4350.h:115
adf4350_init_param::power_up_frequency
uint32_t power_up_frequency
Definition: adf4350.h:154
adf4350_init_param::clk_divider_12bit
uint32_t clk_divider_12bit
Definition: adf4350.h:172
adf4350_dev::chspc
uint32_t chspc
Definition: adf4350.h:187
ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH
#define ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH
Definition: adf4350.h:97
adf4350_dev::fpfd
uint32_t fpfd
Definition: adf4350.h:188
adf4350_out_altvoltage0_powerdown
int32_t adf4350_out_altvoltage0_powerdown(adf4350_dev *dev, int32_t pwd)
Powers down the PLL.
Definition: adf4350.c:424
ADF4350_REG4_AUX_OUTPUT_EN
#define ADF4350_REG4_AUX_OUTPUT_EN
Definition: adf4350.h:103
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112