no-OS
adf4377.h
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1 /***************************************************************************/
40 #ifndef ADF4377_H_
41 #define ADF4377_H_
42 
43 /******************************************************************************/
44 /***************************** Include Files **********************************/
45 /******************************************************************************/
46 #include <stdint.h>
47 #include <stdbool.h>
48 #include "no_os_spi.h"
49 #include "no_os_gpio.h"
50 #include "no_os_util.h"
51 
52 /******************************************************************************/
53 /********************** Macros and Constants Definitions **********************/
54 /******************************************************************************/
55 
56 /* Registers Control Bits */
57 #define ADF4377_REG(x) (x)
58 
59 /* ADF4377 REG0000 Map */
60 #define ADF4377_SOFT_RESET_R_MSK NO_OS_BIT(7)
61 #define ADF4377_SOFT_RESET_R(x) no_os_field_prep(ADF4377_SOFT_RESET_R_MSK, x)
62 #define ADF4377_SOFT_RESET_MSK NO_OS_BIT(0)
63 #define ADF4377_SOFT_RESET(x) no_os_field_prep(ADF4377_SOFT_RESET_MSK, x)
64 #define ADF4377_LSB_FIRST_R_MSK NO_OS_BIT(6)
65 #define ADF4377_LSB_FIRST_R(x) no_os_field_prep(ADF4377_LSB_FIRST_R_MSK, x)
66 #define ADF4377_LSB_FIRST_MSK NO_OS_BIT(1)
67 #define ADF4377_LSB_FIRST(x) no_os_field_prep(ADF4377_LSB_FIRST_MSK, x)
68 #define ADF4377_ADDRESS_ASC_R_MSK NO_OS_BIT(5)
69 #define ADF4377_ADDRESS_ASC_R(x) no_os_field_prep(ADF4377_ADDRESS_ASC_R_MSK, x)
70 #define ADF4377_ADDRESS_ASC_MSK NO_OS_BIT(2)
71 #define ADF4377_ADDRESS_ASC(x) no_os_field_prep(ADF4377_ADDRESS_ASC_MSK, x)
72 #define ADF4377_SDO_ACTIVE_R_MSK NO_OS_BIT(4)
73 #define ADF4377_SDO_ACTIVE_R(x) no_os_field_prep(ADF4377_SDO_ACTIVE_R_MSK, x)
74 #define ADF4377_SDO_ACTIVE_MSK NO_OS_BIT(3)
75 #define ADF4377_SDO_ACTIVE(x) no_os_field_prep(ADF4377_SDO_ACTIVE_MSK, x)
76 
77 /* ADF4377 REG0000 Bit Definition */
78 #define ADF4377_SDO_ACTIVE_SPI_3W 0x0
79 #define ADF4377_SDO_ACTIVE_SPI_4W 0x1
80 
81 #define ADF4377_ADDR_ASC_AUTO_DECR 0x0
82 #define ADF4377_ADDR_ASC_AUTO_INCR 0x1
83 
84 #define ADF4377_LSB_FIRST_MSB 0x0
85 #define ADF4377_LSB_FIRST_LSB 0x1
86 
87 #define ADF4377_SOFT_RESET_N_OP 0x0
88 #define ADF4377_SOFT_RESET_EN 0x1
89 
90 /* ADF4377 REG0001 Map */
91 #define ADF4377_SINGLE_INSTR_MSK NO_OS_BIT(7)
92 #define ADF4377_SINGLE_INSTR(x) no_os_field_prep(ADF4377_SINGLE_INSTRUCTION_MSK, x)
93 #define ADF4377_MASTER_RB_CTRL_MSK NO_OS_BIT(5)
94 #define ADF4377_MASTER_RB_CTRL(x) no_os_field_prep(ADF4377_MASTER_RB_CTRL_MSK, x)
95 
96 /* ADF4377 REG0001 Bit Definition */
97 #define ADF4377_SPI_STREAM_EN 0x0
98 #define ADF4377_SPI_STREAM_DIS 0x1
99 
100 #define ADF4377_RB_SLAVE_REG 0x0
101 #define ADF4377_RB_MASTER_REG 0x1
102 
103 /* ADF4377 REG0003 Bit Definition */
104 #define ADF4377_CHIP_TYPE 0x06
105 
106 /* ADF4377 REG0004 Bit Definition */
107 #define ADF4377_PRODUCT_ID_LSB 0x0005
108 
109 /* ADF4377 REG0005 Bit Definition */
110 #define ADF4377_PRODUCT_ID_MSB 0x0005
111 
112 /* ADF4377 REG000A Map */
113 #define ADF4377_SCRATCHPAD_MSK NO_OS_GENMASK(7, 0)
114 #define ADF4377_SCRATCHPAD(x) no_os_field_prep(ADF4377_SCRATCHPAD_MSK, x)
115 
116 /* ADF4377 REG000B Bit Definition */
117 #define ADF4377_SPI_REVISION 0x01
118 
119 /* ADF4377 REG000C Bit Definition */
120 #define ADF4377_VENDOR_ID_LSB 0x456
121 
122 /* ADF4377 REG000D Bit Definition */
123 #define ADF4377_VENDOR_ID_MSB 0x456
124 
125 /* ADF4377 REG000F Bit Definition */
126 #define ADF4377_R00F_RSV1 0x14
127 
128 /* ADF4377 REG0010 Map*/
129 #define ADF4377_N_INT_LSB_MSK NO_OS_GENMASK(7, 0)
130 #define ADF4377_N_INT_LSB(x) no_os_field_prep(ADF4377_N_INT_LSB_MSK, x)
131 
132 /* ADF4377 REG0011 Map*/
133 #define ADF4377_EN_AUTOCAL_MSK NO_OS_BIT(7)
134 #define ADF4377_EN_AUTOCAL(x) no_os_field_prep(ADF4377_EN_AUTOCAL_MSK, x)
135 #define ADF4377_EN_RDBLR_MSK NO_OS_BIT(6)
136 #define ADF4377_EN_RDBLR(x) no_os_field_prep(ADF4377_EN_RDBLR_MSK, x)
137 #define ADF4377_DCLK_DIV2_MSK NO_OS_GENMASK(5,4)
138 #define ADF4377_DCLK_DIV2(x) no_os_field_prep(ADF4377_DCLK_DIV2_MSK, x)
139 #define ADF4377_N_INT_MSB_MSK NO_OS_GENMASK(3,0)
140 #define ADF4377_N_INT_MSB(x) no_os_field_prep(ADF4377_N_INT_MSB_MSK, x)
141 
142 /* ADF4377 REG0011 Bit Definition */
143 #define ADF4377_VCO_CALIB_DIS 0x0
144 #define ADF4377_VCO_CALIB_EN 0x1
145 
146 #define ADF4377_REF_DBLR_DIS 0x0
147 #define ADF4377_REF_DBLR_EN 0x1
148 
149 #define ADF4377_DCLK_DIV2_1 0x0
150 #define ADF4377_DCLK_DIV2_2 0x1
151 #define ADF4377_DCLK_DIV2_4 0x2
152 #define ADF4377_DCLK_DIV2_8 0x3
153 
154 /* ADF4377 REG0012 Map*/
155 #define ADF4377_CLKOUT_DIV_MSK NO_OS_GENMASK(7, 6)
156 #define ADF4377_CLKOUT_DIV(x) no_os_field_prep(ADF4377_CLKOUT_DIV_MSK, x)
157 #define ADF4377_R_DIV_MSK NO_OS_GENMASK(5, 0)
158 #define ADF4377_R_DIV(x) no_os_field_prep(ADF4377_R_DIV_MSK, x)
159 
160 /* ADF4377 REG0012 Bit Definition */
161 #define ADF4377_CLKOUT_DIV_1 0x0
162 #define ADF4377_CLKOUT_DIV_2 0x1
163 #define ADF4377_CLKOUT_DIV_4 0x2
164 #define ADF4377_CLKOUT_DIV_8 0x3
165 
166 #define ADF4377_MIN_R_DIV 0x00
167 #define ADF4378_MAX_R_DIV 0x3F
168 
169 /* ADF4377 REG0013 Map */
170 #define ADF4377_M_VCO_CORE_MSK NO_OS_GENMASK(5,4)
171 #define ADF4377_M_VCO_CORE(x) no_os_field_prep(ADF4377_M_VCO_CORE_MSK, x)
172 #define ADF4377_M_VCO_BIAS_MSK NO_OS_GENMASK(3,0)
173 #define ADF4377_M_VCO_BIAS(x) no_os_field_prep(ADF4377_M_VCO_BIAS_MSK, x)
174 
175 /* ADF4377 REG0013 Bit Definition */
176 #define ADF4377_M_VCO_0 0x0
177 #define ADF4377_M_VCO_1 0x1
178 #define ADF4377_M_VCO_2 0x2
179 #define ADF4377_M_VCO_3 0x3
180 
181 #define M_VCO_BIAS_MIN 0xF
182 #define M_VCO_BIAS_MAX 0x0
183 
184 /* ADF4377 REG0014 Map */
185 #define ADF4377_M_VCO_BAND_MSK NO_OS_GENMASK(7,0)
186 #define ADF4377_M_VCO_BAND(x) no_os_field_prep(ADF4377_M_VCO_BAND_MSK, x)
187 
188 /* ADF4377 REG0014 Bit Definition */
189 #define ADF4377_VCO_BAND_MIN 0xFF
190 #define ADF4377_VCO_BAND_MAX 0x00
191 
192 /* ADF4377 REG0015 Map */
193 #define ADF4377_BLEED_I_LSB_MSK NO_OS_GENMASK(7, 6)
194 #define ADF4377_BLEED_I_LSB(x) no_os_field_prep(ADF4377_BLEED_I_LSB_MSK, x)
195 #define ADF4377_BLEED_POL_MSK NO_OS_BIT(5)
196 #define ADF4377_BLEED_POL(x) no_os_field_prep(ADF4377_BLEED_POL_MSK, x)
197 #define ADF4377_EN_BLEED_MSK NO_OS_BIT(4)
198 #define ADF4377_EN_BLEED(x) no_os_field_prep(ADF4377_EN_BLEED_MSK, x)
199 #define ADF4377_CP_I_MSK NO_OS_GENMASK(3, 0)
200 #define ADF4377_CP_I(x) no_os_field_prep(ADF4377_CP_I_MSK, x)
201 
202 /* ADF4377 REG0015 Bit Description */
203 #define ADF4377_CURRENT_SINK 0x0
204 #define ADF4377_CURRENT_SOURCE 0x1
205 
206 #define ADF4377_CP_0MA7 0x0
207 #define ADF4377_CP_0MA9 0x1
208 #define ADF4377_CP_1MA1 0x2
209 #define ADF4377_CP_1MA3 0x3
210 #define ADF4377_CP_1MA4 0x4
211 #define ADF4377_CP_1MA8 0x5
212 #define ADF4377_CP_2MA2 0x6
213 #define ADF4377_CP_2MA5 0x7
214 #define ADF4377_CP_2MA9 0x8
215 #define ADF4377_CP_3MA6 0x9
216 #define ADF4377_CP_4MA3 0xA
217 #define ADF4377_CP_5MA0 0xB
218 #define ADF4377_CP_5MA7 0xC
219 #define ADF4377_CP_7MA2 0xD
220 #define ADF4377_CP_8MA6 0xE
221 #define ADF4377_CP_10MA1 0xF
222 
223 /* ADF4377 REG0016 Map */
224 #define ADF4377_BLEED_I_MSB_MSK NO_OS_GENMASK(7, 0)
225 #define ADF4377_BLEED_I_MSB(x) no_os_field_prep(ADF4377_BLEED_I_MSB_MSK, x)
226 
227 /* ADF4377 REG0017 Map */
228 #define ADF4377_INV_CLKOUT_MSK NO_OS_BIT(7)
229 #define ADF4377_INV_CLKOUT(x) no_os_field_prep(ADF4377_INV_CLKOUT_MSK, x)
230 #define ADF4377_N_DEL_MSK NO_OS_GENMASK(6, 0)
231 #define ADF4377_N_DEL(x) no_os_field_prep(ADF4377_N_DEL_MSK, x)
232 
233 /* ADF4377 REG0018 Map */
234 #define ADF4377_CMOS_OV_MSK NO_OS_BIT(7)
235 #define ADF4377_CMOS_OV(x) no_os_field_prep(ADF4377_CMOS_OV_MSK, x)
236 #define ADF4377_R_DEL_MSK NO_OS_GENMASK(6, 0)
237 #define ADF4377_R_DEL(x) no_os_field_prep(ADF4377_R_DEL_MSK, x)
238 
239 /* ADF4377 REG0018 Bit Definition */
240 #define ADF4377_1V8_LOGIC 0x0
241 #define ADF4377_3V3_LOGIC 0x1
242 
243 #define ADF4377_R_DEL_MIN 0x00
244 #define ADF4377_R_DEL_MAX 0x7F
245 
246 /* ADF4377 REG0019 Map */
247 #define ADF4377_CLKOUT2_OP_MSK NO_OS_GENMASK(7, 6)
248 #define ADF4377_CLKOUT2_OP(x) no_os_field_prep(ADF4377_CLKOUT2_OP_MSK, x)
249 #define ADF4377_CLKOUT1_OP_MSK NO_OS_GENMASK(5, 4)
250 #define ADF4377_CLKOUT1_OP(x) no_os_field_prep(ADF4377_CLKOUT1_OP_MSK, x)
251 #define ADF4377_PD_CLK_MSK NO_OS_BIT(3)
252 #define ADF4377_PD_CLK(x) no_os_field_prep(ADF4377_PD_CLK_MSK, x)
253 #define ADF4377_PD_RDET_MSK NO_OS_BIT(2)
254 #define ADF4377_PD_RDET(x) no_os_field_prep(ADF4377_PD_RDET_MSK, x)
255 #define ADF4377_PD_ADC_MSK NO_OS_BIT(1)
256 #define ADF4377_PD_ADC(x) no_os_field_prep(ADF4377_PD_ADC_MSK, x)
257 #define ADF4377_PD_CALADC_MSK NO_OS_BIT(0)
258 #define ADF4377_PD_CALADC(x) no_os_field_prep(ADF4377_PD_CALADC_MSK, x)
259 
260 /* ADF4377 REG0019 Bit Definition */
261 #define ADF4377_CLKOUT_320MV 0x0
262 #define ADF4377_CLKOUT_420MV 0x1
263 #define ADF4377_CLKOUT_530MV 0x2
264 #define ADF4377_CLKOUT_640MV 0x3
265 
266 #define ADF4377_PD_CLK_N_OP 0x0
267 #define ADF4377_PD_CLK_PD 0x1
268 
269 #define ADF4377_PD_RDET_N_OP 0x0
270 #define ADF4377_PD_RDET_PD 0x1
271 
272 #define ADF4377_PD_ADC_N_OP 0x0
273 #define ADF4377_PD_ADC_PD 0x1
274 
275 #define ADF4377_PD_CALADC_N_OP 0x0
276 #define ADF4377_PD_CALADC_PD 0x1
277 
278 /* ADF4377 REG001A Map */
279 #define ADF4377_PD_ALL_MSK NO_OS_BIT(7)
280 #define ADF4377_PD_ALL(x) no_os_field_prep(ADF4377_PD_ALL_MSK, x)
281 #define ADF4377_PD_RDIV_MSK NO_OS_BIT(6)
282 #define ADF4377_PD_RDIV(x) no_os_field_prep(ADF4377_PD_RDIV_MSK, x)
283 #define ADF4377_PD_NDIV_MSK NO_OS_BIT(5)
284 #define ADF4377_PD_NDIV(x) no_os_field_prep(ADF4377_PD_NDIV_MSK, x)
285 #define ADF4377_PD_VCO_MSK NO_OS_BIT(4)
286 #define ADF4377_PD_VCO(x) no_os_field_prep(ADF4377_PD_VCO_MSK, x)
287 #define ADF4377_PD_LD_MSK NO_OS_BIT(3)
288 #define ADF4377_PD_LD(x) no_os_field_prep(ADF4377_PD_LD_MSK, x)
289 #define ADF4377_PD_PFDCP_MSK NO_OS_BIT(2)
290 #define ADF4377_PD_PFDCP(x) no_os_field_prep(ADF4377_PD_PFDCP_MSK, x)
291 #define ADF4377_PD_CLKOUT1_MSK NO_OS_BIT(1)
292 #define ADF4377_PD_CLKOUT1(x) no_os_field_prep(ADF4377_PD_CLKOUT1_MSK, x)
293 #define ADF4377_PD_CLKOUT2_MSK NO_OS_BIT(0)
294 #define ADF4377_PD_CLKOUT2(x) no_os_field_prep(ADF4377_PD_CLKOUT2_MSK, x)
295 
296 /* ADF4377 REG001A Bit Definition */
297 #define ADF4377_PD_ALL_N_OP 0x0
298 #define ADF4377_PD_ALL_PD 0x1
299 
300 #define ADF4377_PD_RDIV_N_OP 0x0
301 #define ADF4377_PD_RDIV_PD 0x1
302 
303 #define ADF4377_PD_NDIV_N_OP 0x0
304 #define ADF4377_PD_NDIV_PD 0x1
305 
306 #define ADF4377_PD_VCO_N_OP 0x0
307 #define ADF4377_PD_VCO_PD 0x1
308 
309 #define ADF4377_PD_LD_N_OP 0x0
310 #define ADF4377_PD_LD_PD 0x1
311 
312 #define ADF4377_PD_PFDCP_N_OP 0x0
313 #define ADF4377_PD_PFDCP_PD 0x1
314 
315 #define ADF4377_PD_CLKOUT1_N_OP 0x0
316 #define ADF4377_PD_CLKOUT1_PD 0x1
317 
318 #define ADF4377_PD_CLKOUT2_N_OP 0x0
319 #define ADF4377_PD_CLKOUT2_PD 0x1
320 
321 /* ADF4377 REG001B Map */
322 #define ADF4377_EN_LOL_MSK NO_OS_BIT(7)
323 #define ADF4377_EN_LOL(x) no_os_field_prep(ADF4377_EN_LOL_MSK, x)
324 #define ADF4377_LDWIN_PW_MSK NO_OS_BIT(6)
325 #define ADF4377_LDWIN_PW(x) no_os_field_prep(ADF4377_LDWIN_PW_MSK, x)
326 #define ADF4377_EN_LDWIN_MSK NO_OS_BIT(5)
327 #define ADF4377_EN_LDWIN(x) no_os_field_prep(ADF4377_EN_LDWIN_MSK, x)
328 #define ADF4377_LD_COUNT_MSK NO_OS_GENMASK(4, 0)
329 #define ADF4377_LD_COUNT(x) no_os_field_prep(ADF4377_LD_COUNT_MSK, x)
330 
331 /* ADF4377 REG001B Bit Definition */
332 
333 #define ADF4377_LDWIN_PW_NARROW 0x0
334 #define ADF4377_LDWIN_PW_WIDE 0x1
335 
336 /* ADF4377 REG001C Map */
337 #define ADF4377_EN_DNCLK_MSK NO_OS_BIT(7)
338 #define ADF4377_EN_DNCLK(x) no_os_field_prep(ADF4377_EN_DNCLK_MSK, x)
339 #define ADF4377_EN_DRCLK_MSK NO_OS_BIT(6)
340 #define ADF4377_EN_DRCLK(x) no_os_field_prep(ADF4377_EN_DRCLK_MSK, x)
341 #define ADF4377_RST_LD_MSK NO_OS_BIT(2)
342 #define ADF4377_RST_LD(x) no_os_field_prep(ADF4377_RST_LD_MSK, x)
343 #define ADF4377_R01C_RSV1_MSK NO_OS_BIT(0)
344 #define ADF4377_R01C_RSV1(x) no_os_field_prep(ADF4377_R01C_RSV1_MSK, x)
345 
346 /* ADF4377 REG001C Bit Definition */
347 #define ADF4377_EN_DNCLK_OFF 0x0
348 #define ADF4377_EN_DNCLK_ON 0x1
349 
350 #define ADF4377_EN_DRCLK_OFF 0x0
351 #define ADF4377_EN_DRCLK_ON 0x1
352 
353 #define ADF4377_RST_LD_INACTIVE 0x0
354 #define ADF4377_RST_LD_ACTIVE 0x1
355 
356 /* ADF4377 REG001D Map */
357 #define ADF4377_MUXOUT_MSK NO_OS_GENMASK(7, 4)
358 #define ADF4377_MUXOUT(x) no_os_field_prep(ADF4377_MUXOUT_MSK, x)
359 #define ADF4377_EN_CPTEST_MSK NO_OS_BIT(2)
360 #define ADF4377_EN_CPTEST(x) no_os_field_prep(ADF4377_EN_CPTEST_MSK, x)
361 #define ADF4377_CP_DOWN_MSK NO_OS_BIT(1)
362 #define ADF4377_CP_DOWN(x) no_os_field_prep(ADF4377_CP_DOWN_MSK, x)
363 #define ADF4377_CP_UP_MSK NO_OS_BIT(0)
364 #define ADF4377_CP_UP(x) no_os_field_prep(ADF4377_CP_UP_MSK, x)
365 
366 /* ADF4377 REG001D Bit Definitons */
367 #define ADF4377_MUXOUT_HIGH_Z 0x0
368 #define ADF4377_MUXOUT_LKDET 0x1
369 #define ADF4377_MUXOUT_LOW 0x2
370 #define ADF4377_MUXOUT_DIV_RCLK_2 0x4
371 #define ADF4377_MUXOUT_DIV_NCLK_2 0x5
372 #define ADF4377_MUXOUT_HIGH 0x8
373 
374 #define ADF4377_EN_CPTEST_OFF 0x0
375 #define ADF4377_EN_CPTEST_ON 0x1
376 
377 #define ADF4377_CP_DOWN_OFF 0x0
378 #define ADF4377_CP_DOWN_ON 0x1
379 
380 #define ADF4377_CP_UP_OFF 0x0
381 #define ADF4377_CP_UP_ON 0x1
382 
383 /* ADF4377 REG001F Map */
384 #define ADF4377_BST_REF_MSK NO_OS_BIT(7)
385 #define ADF4377_BST_REF(x) no_os_field_prep(ADF4377_BST_REF_MSK, x)
386 #define ADF4377_FILT_REF_MSK NO_OS_BIT(6)
387 #define ADF4377_FILT_REF(x) no_os_field_prep(ADF4377_FILT_REF_MSK, x)
388 #define ADF4377_REF_SEL_MSK NO_OS_BIT(5)
389 #define ADF4377_REF_SEL(x) no_os_field_prep(ADF4377_REF_SEL_MSK, x)
390 #define ADF4377_R01F_RSV1_MSK NO_OS_GENMASK(2, 0)
391 #define ADF4377_R01F_RSV1(x) no_os_field_prep(ADF4377_R01F_RSV1_MSK, x)
392 
393 /* ADF4377 REG001F Bit Description */
394 #define ADF4377_BST_LARGE_REF_IN 0x0
395 #define ADF4377_BST_SMALL_REF_IN 0x1
396 
397 #define ADF4377_FILT_REF_OFF 0x0
398 #define ADF4377_FILT_REF_ON 0x1
399 
400 #define ADF4377_REF_SEL_DMA 0x0
401 #define ADF4377_REF_SEL_LNA 0x1
402 
403 /* ADF4377 REG0020 Map */
404 #define ADF4377_RST_SYS_MSK NO_OS_BIT(4)
405 #define ADF4377_RST_SYS(x) no_os_field_prep(ADF4377_RST_SYS_MSK, x)
406 #define ADF4377_EN_ADC_CLK_MSK NO_OS_BIT(3)
407 #define ADF4377_EN_ADC_CLK(x) no_os_field_prep(ADF4377_EN_ADC_CLK_MSK, x)
408 #define ADF4377_R020_RSV1_MSK NO_OS_BIT(0)
409 #define ADF4377_R020_RSV1(x) no_os_field_prep(ADF4377_R020_RSV1_MSK, x)
410 
411 /* ADF4377 REG0020 Bit Description */
412 #define ADF4377_RST_SYS_INACTIVE 0x0
413 #define ADF4377_RST_SYS_ACTIVE 0x1
414 
415 /* ADF4377 REG0021 Map */
416 #define ADF4377_R021_RSV1 0xD3
417 
418 /* ADF4377 REG0022 Map */
419 #define ADF4377_R022_RSV1 0x32
420 
421 /* ADF4377 REG0023 Map */
422 #define ADF4377_R023_RSV1 0x18
423 
424 /* ADF4377 REG0024 Map */
425 #define ADF4377_DCLK_MODE_MSK NO_OS_BIT(2)
426 #define ADF4377_DCLK_MODE(x) no_os_field_prep(ADF4377_DCLK_MODE_MSK, x)
427 
428 /* ADF4377 REG0025 Map */
429 #define ADF4377_CLKODIV_DB_MSK NO_OS_BIT(7)
430 #define ADF4377_CLKODIV_DB(x) no_os_field_prep(ADF4377_CLKODIV_DB_MSK, x)
431 #define ADF4377_DCLK_DB_MSK NO_OS_BIT(6)
432 #define ADF4377_DCLK_DB(x) no_os_field_prep(ADF4377_DCLK_DB_MSK, x)
433 #define ADF4377_R025_RSV1_MSK NO_OS_BIT(4) | NO_OS_BIT(2) | NO_OS_BIT(1)
434 #define ADF4377_R025_RSV1(x) no_os_field_prep(ADF4377_R025_RSV1_MSK, x)
435 
436 /* ADF4377 REG0026 Map */
437 #define ADF4377_VCO_BAND_DIV_MSK NO_OS_GENMASK(7, 0)
438 #define ADF4377_VCO_BAND_DIV(x) no_os_field_prep(ADF4377_VCO_BAND_DIV_MSK, x)
439 
440 /* ADF4377 REG0026 Bit Definition */
441 #define ADF4377_VCO_BAND_DIV_MIN 0x00
442 #define ADF4377_VCO_BAND_DIV_MAX 0xFF
443 
444 /* ADF4377 REG0027 Map */
445 #define ADF4377_SYNTH_LOCK_TO_LSB_MSK NO_OS_GENMASK(7, 0)
446 #define ADF4377_SYNTH_LOCK_TO_LSB(x) no_os_field_prep(ADF4377_SYNTH_LOCK_TO_LSB_MSK, x)
447 
448 /* ADF4377 REG0028 Map */
449 #define ADF4377_O_VCO_DB_MSK NO_OS_BIT(7)
450 #define ADF4377_O_VCO_DB(x) no_os_field_prep(ADF4377_O_VCO_DB_MSK, x)
451 #define ADF4377_SYNTH_LOCK_TO_MSB_MSK NO_OS_GENMASK(6, 0)
452 #define ADF4377_SYNTH_LOCK_TO_MSB(x) no_os_field_prep(ADF4377_SYNTH_LOCK_TO_MSB_MSK, x)
453 
454 /* ADF4377 REG0029 Map */
455 #define ADF4377_VCO_ALC_TO_LSB_MSK NO_OS_GENMASK(7, 0)
456 #define ADF4377_VCO_ALC_TO_LSB(x) no_os_field_prep(ADF4377_VCO_ALC_TO_LSB_MSK, x)
457 
458 /* ADF4377 REG002A Map */
459 #define ADF4377_DEL_CTRL_DB_MSK NO_OS_BIT(7)
460 #define ADF4377_DEL_CTRL_DB(x) no_os_field_prep(ADF4377_DEL_CTRL_DB_MSK, x)
461 #define ADF4377_VCO_ALC_TO_MSB_MSK NO_OS_GENMASK(6, 0)
462 #define ADF4377_VCO_ALC_TO_MSB(x) no_os_field_prep(ADF4377_VCO_ALC_TO_MSB_MSK, x)
463 
464 /* ADF4377 REG002C Map */
465 #define ADF4377_R02C_RSV1 0xC0
466 
467 /* ADF4377 REG002D Map */
468 #define ADF4377_ADC_CLK_DIV_MSK NO_OS_GENMASK(7, 0)
469 #define ADF4377_ADC_CLK_DIV(x) no_os_field_prep(ADF4377_ADC_CLK_DIV_MSK, x)
470 
471 /* ADF4377 REG002E Map */
472 #define ADF4377_EN_ADC_CNV_MSK NO_OS_BIT(7)
473 #define ADF4377_EN_ADC_CNV(x) no_os_field_prep(ADF4377_EN_ADC_CNV_MSK, x)
474 #define ADF4377_EN_ADC_MSK NO_OS_BIT(1)
475 #define ADF4377_EN_ADC(x) no_os_field_prep(ADF4377_EN_ADC_MSK, x)
476 #define ADF4377_ADC_A_CONV_MSK NO_OS_BIT(0)
477 #define ADF4377_ADC_A_CONV(x) no_os_field_prep(ADF4377_ADC_A_CONV_MSK, x)
478 
479 /* ADF4377 REG002E Bit Definition */
480 #define ADF4377_ADC_A_CONV_ADC_ST_CNV 0x0
481 #define ADF4377_ADC_A_CONV_VCO_CALIB 0x1
482 
483 /* ADF4377 REG002F Map */
484 #define ADF4377_DCLK_DIV1_MSK NO_OS_GENMASK(1, 0)
485 #define ADF4377_DCLK_DIV1(x) no_os_field_prep(ADF4377_DCLK_DIV1_MSK, x)
486 
487 /* ADF4377 REG002F Bit Definition */
488 #define ADF4377_DCLK_DIV1_1 0x0
489 #define ADF4377_DCLK_DIV1_2 0x1
490 #define ADF4377_DCLK_DIV1_8 0x2
491 #define ADF4377_DCLK_DIV1_32 0x3
492 
493 /* ADF4377 REG0031 Map */
494 #define ADF4377_R031_RSV1 0x09
495 
496 /* ADF4377 REG0032 Map */
497 #define ADF4377_ADC_CLK_SEL_MSK NO_OS_BIT(6)
498 #define ADF4377_ADC_CLK_SEL(x) no_os_field_prep(ADF4377_ADC_CLK_SEL_MSK, x)
499 #define ADF4377_R032_RSV1_MSK NO_OS_BIT(3) | NO_OS_BIT(0)
500 #define ADF4377_R032_RSV1(x) no_os_field_prep(ADF4377_R032_RSV1_MSK, x)
501 
502 /* ADF4377 REG0032 Bit Definition */
503 #define ADF4377_ADC_CLK_SEL_N_OP 0x0
504 #define ADF4377_ADC_CLK_SEL_SPI_CLK 0x1
505 
506 /* ADF4377 REG0033 Map */
507 #define ADF4377_R033_RSV1 0x18
508 
509 /* ADF4377 REG0034 Map */
510 #define ADF4377_R034_RSV1 0x08
511 
512 /* ADF4377 REG003A Map */
513 #define ADF4377_R03A_RSV1 0x5C
514 
515 /* ADF4377 REG003B Map */
516 #define ADF4377_R03B_RSV1 0x2B
517 
518 /* ADF4377 REG003D Map */
519 #define ADF4377_O_VCO_BAND_MSK NO_OS_BIT(3)
520 #define ADF4377_O_VCO_BAND(x) no_os_field_prep(ADF4377_O_VCO_BAND_MSK, x)
521 #define ADF4377_O_VCO_CORE_MSK NO_OS_BIT(2)
522 #define ADF4377_O_VCO_CORE(x) no_os_field_prep(ADF4377_O_VCO_CORE_MSK, x)
523 #define ADF4377_O_VCO_BIAS_MSK NO_OS_BIT(1)
524 #define ADF4377_O_VCO_BIAS(x) no_os_field_prep(ADF4377_O_VCO_BIAS_MSK, x)
525 
526 /* ADF4377 REG003D Bit Definition */
527 #define ADF4377_O_VCO_BAND_VCO_CALIB 0x0
528 #define ADF4377_O_VCO_BAND_M_VCO 0x1
529 
530 #define ADF4377_O_VCO_CORE_VCO_CALIB 0x0
531 #define ADF4377_O_VCO_CORE_M_VCO 0x1
532 
533 #define ADF4377_O_VCO_BIAS_VCO_CALIB 0x0
534 #define ADF4377_O_VCO_BIAS_M_VCO 0x1
535 
536 /* ADF4377 REG0042 Map */
537 #define ADF4377_R042_RSV1 0x05
538 
539 /* ADF4377 REG0045 Map */
540 #define ADF4377_ADC_ST_CNV_MSK NO_OS_BIT(0)
541 #define ADF4377_ADC_ST_CNV(x) no_os_field_prep(ADF4377_ADC_ST_CNV_MSK, x)
542 
543 /* ADF4377 REG0049 Map */
544 #define ADF4377_EN_CLK2_MSK NO_OS_BIT(7)
545 #define ADF4377_EN_CLK2(x) no_os_field_prep(ADF4377_EN_CLK2_MSK, x)
546 #define ADF4377_EN_CLK1_MSK NO_OS_BIT(6)
547 #define ADF4377_EN_CLK1(x) no_os_field_prep(ADF4377_EN_CLK1_MSK, x)
548 #define ADF4377_REF_OK_MSK NO_OS_BIT(3)
549 #define ADF4377_REF_OK(x) no_os_field_prep(ADF4377_REF_OK_MSK, x)
550 #define ADF4377_ADC_BUSY_MSK NO_OS_BIT(2)
551 #define ADF4377_ADC_BUSY(x) no_os_field_prep(ADF4377_ADC_BUSY_MSK, x)
552 #define ADF4377_FSM_BUSY_MSK NO_OS_BIT(1)
553 #define ADF4377_FSM_BUSY(x) no_os_field_prep(ADF4377_FSM_BUSY_MSK, x)
554 #define ADF4377_LOCKED_MSK NO_OS_BIT(0)
555 #define ADF4377_LOCKED(x) no_os_field_prep(ADF4377_LOCKED_MSK, x)
556 
557 /* ADF4377 REG004B Map */
558 #define ADF4377_VCO_CORE_MSK NO_OS_GENMASK(1, 0)
559 #define ADF4377_VCO_CORE(x) no_os_field_prep(ADF4377_VCO_CORE_MSK, x)
560 
561 /* ADF4377 REG004C Map */
562 #define ADF4377_CHIP_TEMP_LSB_MSK NO_OS_GENMASK(7, 0)
563 #define ADF4377_CHIP_TEMP_LSB(x) no_os_field_prep(ADF4377_CHIP_TEMP_LSB_MSK, x)
564 
565 /* ADF4377 REG004D Map */
566 #define ADF4377_CHIP_TEMP_MSB_MSK NO_OS_BIT(0)
567 #define ADF4377_CHIP_TEMP_MSB(x) no_os_field_prep(ADF4377_CHIP_TEMP_MSB_MSK, x)
568 
569 /* ADF4377 REG004F Map */
570 #define ADF4377_VCO_BAND_MSK NO_OS_GENMASK(7, 0)
571 #define ADF4377_VCO_BAND(x) no_os_field_prep(ADF4377_VCO_BAND_MSK, x)
572 
573 /* ADF4377 REG0054 Map */
574 #define ADF4377_CHIP_VERSION_MSK NO_OS_GENMASK(7, 0)
575 #define ADF4377_CHIP_VERSION(x) no_os_field_prep(ADF4377_CHIP_VERSION_MSK, x)
576 
577 /* Specifications */
578 #define ADF4377_SPI_WRITE_CMD 0x0
579 #define ADF4377_SPI_READ_CMD NO_OS_BIT(7)
580 #define ADF4377_BUFF_SIZE_BYTES 3
581 #define ADF4377_MAX_VCO_FREQ 12800000000ull /* Hz */
582 #define ADF4377_MIN_VCO_FREQ 6400000000ull /* Hz */
583 #define ADF4377_MAX_REFIN_FREQ 1000000000 /* Hz */
584 #define ADF4377_MIN_REFIN_FREQ 10000000 /* Hz */
585 #define ADF4377_MAX_FREQ_PFD 500000000 /* Hz */
586 #define ADF4377_MIN_FREQ_PFD 3000000 /* Hz */
587 #define ADF4377_MAX_CLKPN_FREQ ADF4377_MAX_VCO_FREQ /* Hz */
588 #define ADF4377_MIN_CLKPN_FREQ (ADF4377_MIN_VCO_FREQ / 8) /* Hz */
589 #define ADF4377_FREQ_PFD_80MHZ 80000000
590 #define ADF4377_FREQ_PFD_125MHZ 125000000
591 #define ADF4377_FREQ_PFD_160MHZ 160000000
592 #define ADF4377_FREQ_PFD_250MHZ 250000000
593 #define ADF4377_FREQ_PFD_320MHZ 320000000
594 
595 /* ADF4377 Extra Definitions */
596 #define ADF4377_SPI_SCRATCHPAD_TEST_A 0xA5u
597 #define ADF4377_SPI_SCRATCHPAD_TEST_B 0x5Au
598 #define ADF4377_SPI_DUMMY_DATA 0x00
599 #define ADF4377_CHECK_RANGE(freq, range) \
600  ((freq > ADF4377_MAX_ ## range) || (freq < ADF4377_MIN_ ## range))
601 
602 /******************************************************************************/
603 /*************************** Types Declarations *******************************/
604 /******************************************************************************/
605 
611  ADF4377 = 0x05,
612  ADF4378 = 0x06
613 };
614 
631  bool spi4wire;
633  uint32_t clkin_freq;
635  uint64_t f_clk;
637  uint8_t cp_i;
639  uint32_t muxout_select;
641  uint8_t ref_doubler_en;
643  uint8_t clkout_op;
644 };
645 
650 struct adf4377_dev {
662  bool spi4wire;
664  uint32_t f_pfd;
666  uint64_t f_clk;
668  uint64_t f_vco;
670  uint32_t clkin_freq;
672  uint8_t cp_i;
674  uint8_t muxout_default;
676  uint8_t ref_doubler_en;
678  uint32_t ref_div_factor;
680  uint8_t clkout_div_sel;
682  uint16_t n_int;
684  uint8_t clkout_op;
685 };
686 
687 /******************************************************************************/
688 /************************ Functions Declarations ******************************/
689 /******************************************************************************/
690 
692 int32_t adf4377_spi_write(struct adf4377_dev *dev, uint8_t reg_addr,
693  uint8_t data);
694 
695 /* ADF4377 Register Update */
696 int32_t adf4377_spi_write_mask(struct adf4377_dev *dev, uint8_t reg_addr,
697  uint8_t mask, uint8_t data);
698 
700 int32_t adf4377_spi_read(struct adf4377_dev *dev, uint8_t reg_addr,
701  uint8_t *data);
702 
703 /* Software Reset */
704 int32_t adf4377_soft_reset(struct adf4377_dev *dev);
705 
706 /* ADF4377 Scratchpad check */
707 int32_t adf4377_check_scratchpad(struct adf4377_dev *dev);
708 
709 /* Set Output frequency */
710 int32_t adf4377_set_freq(struct adf4377_dev *dev, uint64_t freq);
711 
713 int32_t adf4377_init(struct adf4377_dev **device,
715 
717 int32_t adf4377_remove(struct adf4377_dev *dev);
718 
719 #endif /* ADF4377_H_ */
ADF4377_EN_DNCLK_ON
#define ADF4377_EN_DNCLK_ON
Definition: adf4377.h:348
ADF4377_R020_RSV1
#define ADF4377_R020_RSV1(x)
Definition: adf4377.h:409
ADF4377_FREQ_PFD_125MHZ
#define ADF4377_FREQ_PFD_125MHZ
Definition: adf4377.h:590
adf4377_dev::f_pfd
uint32_t f_pfd
Definition: adf4377.h:664
ADF4377_CLKOUT1_OP
#define ADF4377_CLKOUT1_OP(x)
Definition: adf4377.h:250
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
adf4377_dev::ref_doubler_en
uint8_t ref_doubler_en
Definition: adf4377.h:676
ADF4377_CLKOUT_DIV
#define ADF4377_CLKOUT_DIV(x)
Definition: adf4377.h:156
ADF4377_PD_CLKOUT1
#define ADF4377_PD_CLKOUT1(x)
Definition: adf4377.h:292
adf4377_dev::clkout_div_sel
uint8_t clkout_div_sel
Definition: adf4377.h:680
ADF4377_ADC_A_CONV_VCO_CALIB
#define ADF4377_ADC_A_CONV_VCO_CALIB
Definition: adf4377.h:481
ADF4377_PD_ALL_N_OP
#define ADF4377_PD_ALL_N_OP
Definition: adf4377.h:297
adf4377_dev::f_vco
uint64_t f_vco
Definition: adf4377.h:668
ADF4377_SYNTH_LOCK_TO_MSB_MSK
#define ADF4377_SYNTH_LOCK_TO_MSB_MSK
Definition: adf4377.h:451
adf4377_spi_write
int32_t adf4377_spi_write(struct adf4377_dev *dev, uint8_t reg_addr, uint8_t data)
Writes data to ADF4377 over SPI.
Definition: adf4377.c:59
ADF4377_EN_DRCLK
#define ADF4377_EN_DRCLK(x)
Definition: adf4377.h:340
ADF4377_R01F_RSV1_MSK
#define ADF4377_R01F_RSV1_MSK
Definition: adf4377.h:390
ADF4377_PD_LD
#define ADF4377_PD_LD(x)
Definition: adf4377.h:288
adf4377_init_param::cp_i
uint8_t cp_i
Definition: adf4377.h:637
ADF4377_SPI_SCRATCHPAD_TEST_B
#define ADF4377_SPI_SCRATCHPAD_TEST_B
Definition: adf4377.h:597
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
adf4377_spi_read
int32_t adf4377_spi_read(struct adf4377_dev *dev, uint8_t reg_addr, uint8_t *data)
Reads data from ADF4377 over SPI.
Definition: adf4377.c:108
ADF4377_R03B_RSV1
#define ADF4377_R03B_RSV1
Definition: adf4377.h:516
ADF4377_N_INT_LSB
#define ADF4377_N_INT_LSB(x)
Definition: adf4377.h:130
ADF4377_CLKOUT2_OP_MSK
#define ADF4377_CLKOUT2_OP_MSK
Definition: adf4377.h:247
ADF4377_N_INT_MSB
#define ADF4377_N_INT_MSB(x)
Definition: adf4377.h:140
adf4377_init_param
ADF4377 Initialization Parameters structure.
Definition: adf4377.h:619
no_os_spi.h
Header file of SPI Interface.
ADF4377_R01C_RSV1
#define ADF4377_R01C_RSV1(x)
Definition: adf4377.h:344
ADF4377_ADC_CLK_DIV
#define ADF4377_ADC_CLK_DIV(x)
Definition: adf4377.h:469
ADF4377_EN_DRCLK_MSK
#define ADF4377_EN_DRCLK_MSK
Definition: adf4377.h:339
ADF4377_LSB_FIRST_R
#define ADF4377_LSB_FIRST_R(x)
Definition: adf4377.h:65
ADF4377_CLKOUT2_OP
#define ADF4377_CLKOUT2_OP(x)
Definition: adf4377.h:248
adf4377_init
int32_t adf4377_init(struct adf4377_dev **device, struct adf4377_init_param *init_param)
Initializes the ADF4377.
Definition: adf4377.c:519
no_os_delay.h
Header file of Delay functions.
adf4377_init_param::clkin_freq
uint32_t clkin_freq
Definition: adf4377.h:633
ADF4377_SDO_ACTIVE_R
#define ADF4377_SDO_ACTIVE_R(x)
Definition: adf4377.h:73
ADF4377_PD_NDIV
#define ADF4377_PD_NDIV(x)
Definition: adf4377.h:284
ADF4377_CLKOUT_DIV_MSK
#define ADF4377_CLKOUT_DIV_MSK
Definition: adf4377.h:155
adf4377_soft_reset
int32_t adf4377_soft_reset(struct adf4377_dev *dev)
Software reset.
Definition: adf4377.c:250
adf4377_remove
int32_t adf4377_remove(struct adf4377_dev *dev)
Free resoulces allocated for ADF4377.
Definition: adf4377.c:650
ADF4377_DCLK_DIV2
#define ADF4377_DCLK_DIV2(x)
Definition: adf4377.h:138
ADF4377_EN_AUTOCAL_MSK
#define ADF4377_EN_AUTOCAL_MSK
Definition: adf4377.h:133
ADF4377_SYNTH_LOCK_TO_MSB
#define ADF4377_SYNTH_LOCK_TO_MSB(x)
Definition: adf4377.h:452
ADF4377_VCO_ALC_TO_MSB_MSK
#define ADF4377_VCO_ALC_TO_MSB_MSK
Definition: adf4377.h:461
adf4377.h
Header file for adf4377 Driver.
ADF4377_EN_AUTOCAL
#define ADF4377_EN_AUTOCAL(x)
Definition: adf4377.h:134
device
Definition: ad9361_util.h:75
ADF4377_R032_RSV1
#define ADF4377_R032_RSV1(x)
Definition: adf4377.h:500
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
ADF4377_R025_RSV1_MSK
#define ADF4377_R025_RSV1_MSK
Definition: adf4377.h:433
adf4377_init_param::ref_doubler_en
uint8_t ref_doubler_en
Definition: adf4377.h:641
ADF4377_ADC_BUSY
#define ADF4377_ADC_BUSY(x)
Definition: adf4377.h:551
ADF4377_BUFF_SIZE_BYTES
#define ADF4377_BUFF_SIZE_BYTES
Definition: adf4377.h:580
ADF4377_EN_ADC_CLK_MSK
#define ADF4377_EN_ADC_CLK_MSK
Definition: adf4377.h:406
ADF4377_R01C_RSV1_MSK
#define ADF4377_R01C_RSV1_MSK
Definition: adf4377.h:343
adf4377_dev::clkin_freq
uint32_t clkin_freq
Definition: adf4377.h:670
ADF4377_DCLK_DIV2_2
#define ADF4377_DCLK_DIV2_2
Definition: adf4377.h:150
ADF4377_N_INT_MSB_MSK
#define ADF4377_N_INT_MSB_MSK
Definition: adf4377.h:139
ADF4377_SOFT_RESET_EN
#define ADF4377_SOFT_RESET_EN
Definition: adf4377.h:88
ADF4377_R033_RSV1
#define ADF4377_R033_RSV1
Definition: adf4377.h:507
ADF4377_CP_I
#define ADF4377_CP_I(x)
Definition: adf4377.h:200
adf4377_init_param::f_clk
uint64_t f_clk
Definition: adf4377.h:635
ADF4377_FREQ_PFD_160MHZ
#define ADF4377_FREQ_PFD_160MHZ
Definition: adf4377.h:591
ADF4377_ADDRESS_ASC_R
#define ADF4377_ADDRESS_ASC_R(x)
Definition: adf4377.h:69
adf4377_dev::gpio_enclk2
struct no_os_gpio_desc * gpio_enclk2
Definition: adf4377.h:656
adf4377_dev::muxout_default
uint8_t muxout_default
Definition: adf4377.h:674
adf4377_dev
ADF4377 Device Descriptor.
Definition: adf4377.h:650
ADF4377_DCLK_DIV1_1
#define ADF4377_DCLK_DIV1_1
Definition: adf4377.h:488
ADF4377_PD_CLKOUT2_N_OP
#define ADF4377_PD_CLKOUT2_N_OP
Definition: adf4377.h:318
ADF4377_EN_ADC_CNV
#define ADF4377_EN_ADC_CNV(x)
Definition: adf4377.h:473
no_os_error.h
Error codes definition.
NO_OS_DIV_ROUND_UP
#define NO_OS_DIV_ROUND_UP(x, y)
Definition: no_os_util.h:56
ADF4377_EN_ADC_CNV_MSK
#define ADF4377_EN_ADC_CNV_MSK
Definition: adf4377.h:472
ADF4377_SPI_SCRATCHPAD_TEST_A
#define ADF4377_SPI_SCRATCHPAD_TEST_A
Definition: adf4377.h:596
ADF4377_FSM_BUSY
#define ADF4377_FSM_BUSY(x)
Definition: adf4377.h:553
ADF4377_PD_LD_N_OP
#define ADF4377_PD_LD_N_OP
Definition: adf4377.h:309
ADF4377_CHECK_RANGE
#define ADF4377_CHECK_RANGE(freq, range)
Definition: adf4377.h:599
ADF4377_R022_RSV1
#define ADF4377_R022_RSV1
Definition: adf4377.h:419
ADF4377_R021_RSV1
#define ADF4377_R021_RSV1
Definition: adf4377.h:416
ADF4377_DCLK_DIV2_1
#define ADF4377_DCLK_DIV2_1
Definition: adf4377.h:149
ADF4377_EN_DRCLK_ON
#define ADF4377_EN_DRCLK_ON
Definition: adf4377.h:351
adf4377_dev::gpio_enclk1
struct no_os_gpio_desc * gpio_enclk1
Definition: adf4377.h:654
adf4377_dev::n_int
uint16_t n_int
Definition: adf4377.h:682
ADF4377_FREQ_PFD_80MHZ
#define ADF4377_FREQ_PFD_80MHZ
Definition: adf4377.h:589
ADF4377_SOFT_RESET
#define ADF4377_SOFT_RESET(x)
Definition: adf4377.h:63
adf4377_dev::spi4wire
bool spi4wire
Definition: adf4377.h:662
ADF4377_R_DIV
#define ADF4377_R_DIV(x)
Definition: adf4377.h:158
ADF4377_PD_ALL
#define ADF4377_PD_ALL(x)
Definition: adf4377.h:280
ADF4377_SDO_ACTIVE
#define ADF4377_SDO_ACTIVE(x)
Definition: adf4377.h:75
ADF4377_R020_RSV1_MSK
#define ADF4377_R020_RSV1_MSK
Definition: adf4377.h:408
adf4377_dev::gpio_ce
struct no_os_gpio_desc * gpio_ce
Definition: adf4377.h:658
ADF4377_R034_RSV1
#define ADF4377_R034_RSV1
Definition: adf4377.h:510
ADF4377_CLKOUT1_OP_MSK
#define ADF4377_CLKOUT1_OP_MSK
Definition: adf4377.h:249
adf4377_init_param::muxout_select
uint32_t muxout_select
Definition: adf4377.h:639
ADF4377_EN_ADC_MSK
#define ADF4377_EN_ADC_MSK
Definition: adf4377.h:474
adf4377_dev::cp_i
uint8_t cp_i
Definition: adf4377.h:672
ADF4377_EN_RDBLR_MSK
#define ADF4377_EN_RDBLR_MSK
Definition: adf4377.h:135
ADF4377_DCLK_DIV1
#define ADF4377_DCLK_DIV1(x)
Definition: adf4377.h:485
ADF4377_PD_CLKOUT2
#define ADF4377_PD_CLKOUT2(x)
Definition: adf4377.h:294
no_os_spi_desc::bit_order
enum no_os_spi_bit_order bit_order
Definition: no_os_spi.h:142
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:132
ADF4377_EN_DNCLK_OFF
#define ADF4377_EN_DNCLK_OFF
Definition: adf4377.h:347
ADF4377_PD_VCO
#define ADF4377_PD_VCO(x)
Definition: adf4377.h:286
ADF4377_EN_RDBLR
#define ADF4377_EN_RDBLR(x)
Definition: adf4377.h:136
ADF4377_SOFT_RESET_R
#define ADF4377_SOFT_RESET_R(x)
Definition: adf4377.h:61
adf4377_init
int32_t adf4377_init(struct adf4377_dev **device, struct adf4377_init_param *init_param)
Initializes the ADF4377.
Definition: adf4377.c:519
adf4377_spi_write_mask
int32_t adf4377_spi_write_mask(struct adf4377_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Update ADF4377 register.
Definition: adf4377.c:85
adf4377_dev::dev_id
enum adf4377_dev_id dev_id
Definition: adf4377.h:660
ADF4377
@ ADF4377
Definition: adf4377.h:611
ADF4377_MIN_VCO_FREQ
#define ADF4377_MIN_VCO_FREQ
Definition: adf4377.h:582
ADF4377_PD_VCO_N_OP
#define ADF4377_PD_VCO_N_OP
Definition: adf4377.h:306
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
ADF4377_DCLK_DIV2_MSK
#define ADF4377_DCLK_DIV2_MSK
Definition: adf4377.h:137
ADF4377_EN_DRCLK_OFF
#define ADF4377_EN_DRCLK_OFF
Definition: adf4377.h:350
ADF4377_MUXOUT
#define ADF4377_MUXOUT(x)
Definition: adf4377.h:358
adf4377_soft_reset
int32_t adf4377_soft_reset(struct adf4377_dev *dev)
Software reset.
Definition: adf4377.c:250
ADF4377_EN_ADC_CLK
#define ADF4377_EN_ADC_CLK(x)
Definition: adf4377.h:407
adf4377_spi_write
int32_t adf4377_spi_write(struct adf4377_dev *dev, uint8_t reg_addr, uint8_t data)
Writes data to ADF4377 over SPI.
Definition: adf4377.c:59
ADF4377_R02C_RSV1
#define ADF4377_R02C_RSV1
Definition: adf4377.h:465
adf4377_init_param::spi_init
struct no_os_spi_init_param * spi_init
Definition: adf4377.h:621
ADF4377_LSB_FIRST
#define ADF4377_LSB_FIRST(x)
Definition: adf4377.h:67
ADF4377_R042_RSV1
#define ADF4377_R042_RSV1
Definition: adf4377.h:537
ADF4377_MUXOUT_MSK
#define ADF4377_MUXOUT_MSK
Definition: adf4377.h:357
ADF4377_SOFT_RESET_R_MSK
#define ADF4377_SOFT_RESET_R_MSK
Definition: adf4377.h:60
ADF4377_PD_PFDCP
#define ADF4377_PD_PFDCP(x)
Definition: adf4377.h:290
adf4377_check_scratchpad
int32_t adf4377_check_scratchpad(struct adf4377_dev *dev)
ADF4377 SPI Scratchpad check.
Definition: adf4377.c:138
ADF4377_R023_RSV1
#define ADF4377_R023_RSV1
Definition: adf4377.h:422
adf4377_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: adf4377.h:652
ADF4377_R032_RSV1_MSK
#define ADF4377_R032_RSV1_MSK
Definition: adf4377.h:499
ADF4377_R01F_RSV1
#define ADF4377_R01F_RSV1(x)
Definition: adf4377.h:391
adf4377_spi_read
int32_t adf4377_spi_read(struct adf4377_dev *dev, uint8_t reg_addr, uint8_t *data)
Reads data from ADF4377 over SPI.
Definition: adf4377.c:108
ADF4378
@ ADF4378
Definition: adf4377.h:612
ADF4377_R_DIV_MSK
#define ADF4377_R_DIV_MSK
Definition: adf4377.h:157
adf4377_init_param::clkout_op
uint8_t clkout_op
Definition: adf4377.h:643
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
ADF4377_FREQ_PFD_250MHZ
#define ADF4377_FREQ_PFD_250MHZ
Definition: adf4377.h:592
ADF4377_ADDRESS_ASC
#define ADF4377_ADDRESS_ASC(x)
Definition: adf4377.h:71
ADF4377_R031_RSV1
#define ADF4377_R031_RSV1
Definition: adf4377.h:494
ADF4377_R025_RSV1
#define ADF4377_R025_RSV1(x)
Definition: adf4377.h:434
ADF4377_SOFT_RESET_MSK
#define ADF4377_SOFT_RESET_MSK
Definition: adf4377.h:62
ADF4377_MAX_FREQ_PFD
#define ADF4377_MAX_FREQ_PFD
Definition: adf4377.h:585
ADF4377_VCO_BAND_DIV
#define ADF4377_VCO_BAND_DIV(x)
Definition: adf4377.h:438
adf4377_init_param::spi4wire
bool spi4wire
Definition: adf4377.h:631
ADF4377_R00F_RSV1
#define ADF4377_R00F_RSV1
Definition: adf4377.h:126
adf4377_init_param::gpio_enclk2_param
struct no_os_gpio_init_param * gpio_enclk2_param
Definition: adf4377.h:627
adf4377_spi_write_mask
int32_t adf4377_spi_write_mask(struct adf4377_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Update ADF4377 register.
Definition: adf4377.c:85
ADF4377_VCO_ALC_TO_MSB
#define ADF4377_VCO_ALC_TO_MSB(x)
Definition: adf4377.h:462
ADF4377_EN_DNCLK_MSK
#define ADF4377_EN_DNCLK_MSK
Definition: adf4377.h:337
ADF4377_CHIP_TYPE
#define ADF4377_CHIP_TYPE
Definition: adf4377.h:104
ADF4377_FREQ_PFD_320MHZ
#define ADF4377_FREQ_PFD_320MHZ
Definition: adf4377.h:593
ADF4377_SPI_DUMMY_DATA
#define ADF4377_SPI_DUMMY_DATA
Definition: adf4377.h:598
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:70
ADF4377_ADDR_ASC_AUTO_DECR
#define ADF4377_ADDR_ASC_AUTO_DECR
Definition: adf4377.h:81
ADF4377_PD_CLKOUT1_N_OP
#define ADF4377_PD_CLKOUT1_N_OP
Definition: adf4377.h:315
no_os_gpio.h
Header file of GPIO Interface.
adf4377_dev::clkout_op
uint8_t clkout_op
Definition: adf4377.h:684
ADF4377_PD_RDIV_N_OP
#define ADF4377_PD_RDIV_N_OP
Definition: adf4377.h:300
ADF4377_DCLK_DIV1_2
#define ADF4377_DCLK_DIV1_2
Definition: adf4377.h:489
ADF4377_CP_I_MSK
#define ADF4377_CP_I_MSK
Definition: adf4377.h:199
ADF4377_PD_RDIV
#define ADF4377_PD_RDIV(x)
Definition: adf4377.h:282
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
adf4377_check_scratchpad
int32_t adf4377_check_scratchpad(struct adf4377_dev *dev)
ADF4377 SPI Scratchpad check.
Definition: adf4377.c:138
ADF4377_REG
#define ADF4377_REG(x)
Definition: adf4377.h:57
adf4377_remove
int32_t adf4377_remove(struct adf4377_dev *dev)
Free resoulces allocated for ADF4377.
Definition: adf4377.c:650
no_os_util.h
Implementation of utility functions.
adf4377_init_param::gpio_enclk1_param
struct no_os_gpio_init_param * gpio_enclk1_param
Definition: adf4377.h:625
adf4377_set_freq
int32_t adf4377_set_freq(struct adf4377_dev *dev, uint64_t freq)
Definition: adf4377.c:280
adf4377_dev::f_clk
uint64_t f_clk
Definition: adf4377.h:666
ADF4377_SPI_WRITE_CMD
#define ADF4377_SPI_WRITE_CMD
Definition: adf4377.h:578
ADF4377_ADC_A_CONV_MSK
#define ADF4377_ADC_A_CONV_MSK
Definition: adf4377.h:476
adf4377_dev_id
adf4377_dev_id
ID of Devices supported by the driver.
Definition: adf4377.h:610
adf4377_init_param::dev_id
enum adf4377_dev_id dev_id
Definition: adf4377.h:629
ADF4377_R03A_RSV1
#define ADF4377_R03A_RSV1
Definition: adf4377.h:513
ADF4377_PD_PFDCP_N_OP
#define ADF4377_PD_PFDCP_N_OP
Definition: adf4377.h:312
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
ADF4377_DCLK_MODE
#define ADF4377_DCLK_MODE(x)
Definition: adf4377.h:426
adf4377_dev::ref_div_factor
uint32_t ref_div_factor
Definition: adf4377.h:678
ADF4377_SYNTH_LOCK_TO_LSB
#define ADF4377_SYNTH_LOCK_TO_LSB(x)
Definition: adf4377.h:446
no_os_bit_swap_constant_8
#define no_os_bit_swap_constant_8(x)
Definition: no_os_util.h:100
ADF4377_SPI_READ_CMD
#define ADF4377_SPI_READ_CMD
Definition: adf4377.h:579
ADF4377_PD_NDIV_N_OP
#define ADF4377_PD_NDIV_N_OP
Definition: adf4377.h:303
ADF4377_EN_ADC
#define ADF4377_EN_ADC(x)
Definition: adf4377.h:475
ADF4377_DCLK_DIV1_MSK
#define ADF4377_DCLK_DIV1_MSK
Definition: adf4377.h:484
adf4377_set_freq
int32_t adf4377_set_freq(struct adf4377_dev *dev, uint64_t freq)
Definition: adf4377.c:280
ADF4377_EN_DNCLK
#define ADF4377_EN_DNCLK(x)
Definition: adf4377.h:338
ADF4377_VCO_CALIB_EN
#define ADF4377_VCO_CALIB_EN
Definition: adf4377.h:144
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
ADF4377_VCO_ALC_TO_LSB
#define ADF4377_VCO_ALC_TO_LSB(x)
Definition: adf4377.h:456
ADF4377_ADC_A_CONV
#define ADF4377_ADC_A_CONV(x)
Definition: adf4377.h:477
ADF4377_DCLK_MODE_MSK
#define ADF4377_DCLK_MODE_MSK
Definition: adf4377.h:425
no_os_gpio_get_optional
int32_t no_os_gpio_get_optional(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Get the value of an optional GPIO.
Definition: no_os_gpio.c:75
adf4377_init_param::gpio_ce_param
struct no_os_gpio_init_param * gpio_ce_param
Definition: adf4377.h:623