no-OS
adf5902.h
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1 /***************************************************************************/
40 #ifndef SRC_ADF5902_H_
41 #define SRC_ADF5902_H_
42 
43 /******************************************************************************/
44 /***************************** Include Files **********************************/
45 /******************************************************************************/
46 #include <stdint.h>
47 #include "no_os_spi.h"
48 #include "no_os_gpio.h"
49 
50 /******************************************************************************/
51 /********************** Macros and Constants Definitions **********************/
52 /******************************************************************************/
53 
54 /* Registers Control Bits */
55 #define ADF5902_REG0 0x0
56 #define ADF5902_REG1 0x1
57 #define ADF5902_REG2 0x2
58 #define ADF5902_REG3 0x3
59 #define ADF5902_REG4 0x4
60 #define ADF5902_REG5 0x5
61 #define ADF5902_REG6 0x6
62 #define ADF5902_REG7 0x7
63 #define ADF5902_REG8 0x8
64 #define ADF5902_REG9 0x9
65 #define ADF5902_REG10 0xA
66 #define ADF5902_REG11 0xB
67 #define ADF5902_REG12 0xC
68 #define ADF5902_REG13 0xD
69 #define ADF5902_REG14 0xE
70 #define ADF5902_REG15 0xF
71 #define ADF5902_REG16 0x10
72 #define ADF5902_REG17 0x11
73 
74 /* Register 0 Map */
75 #define ADF5902_REG0_PLO(x) (((x) & 0x1) << 5)
76 #define ADF5902_REG0_PTX1(x) (((x) & 0x1) << 6)
77 #define ADF5902_REG0_PTX2(x) (((x) & 0x1) << 7)
78 #define ADF5902_REG0_PADC(x) (((x) & 0x1) << 8)
79 #define ADF5902_REG0_VCAL(x) (((x) & 0x1) << 9)
80 #define ADF5902_REG0_PVCO(x) (((x) & 0x1) << 10)
81 #define ADF5902_REG0_TX1C(x) (((x) & 0x1) << 11)
82 #define ADF5902_REG0_TX2C(x) (((x) & 0x1) << 12)
83 #define ADF5902_REG0_RESERVED (0x4007F << 13)
84 
85 /* Register 0 Bit Definitions */
86 #define ADF5902_POWER_DOWN_LO 0x0
87 #define ADF5902_POWER_UP_LO 0x1
88 
89 #define ADF5902_POWER_DOWN_TX1 0x0
90 #define ADF5902_POWER_UP_TX1 0x1
91 
92 #define ADF5902_POWER_DOWN_TX2 0x0
93 #define ADF5902_POWER_UP_TX2 0x1
94 
95 #define ADF5902_POWER_DOWN_ADC 0x0
96 #define ADF5902_POWER_UP_ADC 0x1
97 
98 #define ADF5902_VCO_NORMAL_OP 0x0
99 #define ADF5902_VCO_FULL_CAL 0x1
100 
101 #define ADF5902_POWER_DOWN_VCO 0x0
102 #define ADF5902_POWER_UP_VCO 0x1
103 
104 #define ADF5902_TX1_NORMAL_OP 0x0
105 #define ADF5902_TX1_AMP_CAL 0x1
106 
107 #define ADF5902_TX2_NORMAL_OP 0x0
108 #define ADF5902_TX2_AMP_CAL 0x1
109 
110 /* Register 1 Map */
111 #define ADF5902_REG1_TX_AMP_CAL_REF(x) (((x) & 0xFF) << 5)
112 #define ADF5902_REG1_RESERVED (0x7FFBF << 13)
113 
114 /* Register 1 Bit Definitions */
115 #define ADF5902_TX_AMP_CAL_MIN_REF_CODE 0x00
116 #define ADF5902_TX_AMP_CAL_MAX_REF_CODE 0xFF
117 
118 /* Register 2 Map */
119 #define ADF5902_REG2_ADC_CLK_DIV(x) (((x) & 0xFF) << 5)
120 #define ADF5902_REG2_ADC_AVG(x) (((x) & 0x3) << 13)
121 #define ADF5902_REG2_ADC_START(x) (((x) & 0x1) << 15)
122 #define ADF5902_REG2_RESERVED (0x2 << 16)
123 
124 /* Register 2 Bit Definitions */
125 #define ADF5902_ADC_MIN_CLK_DIVIDER 0x1
126 #define ADF5902_ADC_MAX_CLK_DIVIDER 0x7F
127 
128 #define ADF5902_ADC_AVG_1 0x0
129 #define ADF5902_ADC_AVG_2 0x1
130 #define ADF5902_ADC_AVG_3 0x2
131 #define ADF5902_ADC_AVG_4 0x3
132 
133 #define ADF5902_ADC_NORMAL_OP 0x0
134 #define ADF5902_START_ADC_CONV 0x1
135 
136 /* Register 3 Map */
137 #define ADF5902_REG3_READBACK_CTRL(x) (((x) & 0x3F) << 5)
138 #define ADF5902_REG3_IO_LVL(x) (((x) & 0x1) << 11)
139 #define ADF5902_REG3_MUXOUT(x) (((x) & 0xF) << 12)
140 #define ADF5902_REG3_RESERVED (0x189 << 16)
141 
142 /* Register 3 Bit Definitions */
143 #define ADF5902_REG_RB_NONE 0x0
144 #define ADF5902_REG0_RB 0x1
145 #define ADF5902_REG1_RB 0x2
146 #define ADF5902_REG2_RB 0x3
147 #define ADF5902_REG3_RB 0x4
148 #define ADF5902_REG4_RB 0x5
149 #define ADF5902_REG5_RB 0x6
150 #define ADF5902_REG6_RB 0x7
151 #define ADF5902_REG7_RB 0x8
152 #define ADF5902_REG8_RB 0x9
153 #define ADF5902_REG9_RB 0xA
154 #define ADF5902_REG10_RB 0xB
155 #define ADF5902_REG11_RB 0xC
156 #define ADF5902_REG12_RB 0xD
157 #define ADF5902_REG13_SEL_0_RB 0xE
158 #define ADF5902_REG14_SEL_0_RB 0xF
159 #define ADF5902_REG15_SEL_0_RB 0x10
160 #define ADF5902_REG16_SEL_0_RB 0x11
161 #define ADF5902_REG17_RB 0x12
162 #define ADF5902_ADC_RB 0x16
163 #define ADF5902_FREQ_RB 0x1A
164 #define ADF5902_REG13_SEL_1_RB 0x33
165 #define ADF5902_REG14_SEL_1_RB 0x34
166 #define ADF5902_REG15_SEL_1_RB 0x35
167 #define ADF5902_REG16_SEL_1_RB 0x36
168 #define ADF5902_REG13_SEL_2_RB 0x37
169 #define ADF5902_REG14_SEL_2_RB 0x38
170 #define ADF5902_REG15_SEL_2_RB 0x39
171 #define ADF5902_REG16_SEL_2_RB 0x3A
172 #define ADF5902_REG13_SEL_3_RB 0x3B
173 #define ADF5902_REG14_SEL_3_RB 0x3C
174 #define ADF5902_REG15_SEL_3_RB 0x3D
175 #define ADF5902_REG16_SEL_3_RB 0x3F
176 
177 #define ADF5902_IO_LVL_1V8 0x0
178 #define ADF5902_IO_LVL_3V3 0x1
179 
180 #define ADF5902_MUXOUT_TRISTATE_OUT 0x0
181 #define ADF5902_MUXOUT_LOGIC_HIGH 0x1
182 #define ADF5902_MUXOUT_LOGIC_LOW 0x2
183 #define ADF5902_MUXOUT_R_DIV_OUT 0x3
184 #define ADF5902_MUXOUT_N_DIV_OUT 0x4
185 #define ADF5902_MUXOUT_CAL_BUSY 0x7
186 #define ADF5902_MUXOUT_R_DIV_OUT_2 0xB
187 #define ADF5902_MUXOUT_N_DIV_OUT_2 0xC
188 #define ADF5902_MUXOUT_RAMP_STATUS 0xF
189 
190 /* Register 4 Map */
191 #define ADF5902_REG4_TEST_BUS(x) (((x) & 0x7FFF) << 5)
192 #define ADF5902_REG4_RESERVED (0x0 << 16)
193 
194 /* Register 4 Bit Definitions */
195 #define ADF5902_TEST_BUS_NONE 0x0000
196 #define ADF5902_RAMP_COMPL_TO_MUXOUT 0x00C0
197 #define ADF5902_RAMP_DOWN_TO_MUXOUT 0x0100
198 #define ADF5902_TEMP_SENS_TO_ATEST 0x0503
199 #define ADF5902_TEMP_SENS_TO_ADC 0x0903
200 
201 /* Register 5 Map */
202 #define ADF5902_REG5_FRAC_MSB_WORD(x) (((x) & 0xFFF) << 5)
203 #define ADF5902_REG5_INTEGER_WORD(x) (((x) & 0xFFF) << 17)
204 #define ADF5902_REG5_RAMP_ON(x) (((x) & 0x1) << 29)
205 #define ADF5902_REG5_RESERVED (0x0 << 30)
206 
207 /* Register 5 Bit Definitions */
208 #define ADF5902_MIN_FRAC_MSB_WORD 0x000
209 #define ADF5902_MAX_FRAC_MSB_WORD 0xFFF
210 
211 #define ADF5902_MIN_INT_MSB_WORD 0x000
212 #define ADF5902_MAX_INT_MSB_WORD 0xFFF
213 
214 #define ADF5902_RAMP_ON_DISABLED 0x0
215 #define ADF5902_RAMP_ON_ENABLED 0x1
216 
217 /* Register 6 Map */
218 #define ADF5902_REG6_FRAC_LSB_WORD(x) (((x) & 0x1FFF) << 5)
219 #define ADF5902_REG6_RESERVED (0x0 << 18)
220 
221 /* Register 6 Bit Definitions */
222 #define ADF5902_MIN_FRAC_LSB_WORD 0x000
223 #define ADF5902_MAX_FRAC_LSB_WORD 0x1FFF
224 
225 /* Register 7 Map */
226 #define ADF5902_REG7_R_DIVIDER(x) (((x) & 0x1F) << 5)
227 #define ADF5902_REG7_REF_DOUBLER(x) (((x) & 0x1) << 10)
228 #define ADF5902_REG7_R_DIV_2(x) (((x) & 0x1) << 11)
229 #define ADF5902_REG7_CLK_DIV(x) (((x) & 0xFFF) << 12)
230 #define ADF5902_REG7_MASTER_RESET(x) (((x) & 0x1) << 25)
231 #define ADF5902_REG7_RESERVED ((0x0 << 26) | (0x1 << 24))
232 
233 /* Register 7 Bit Definitions */
234 #define ADF5902_MIN_R_DIVIDER 0x01
235 #define ADF5902_MAX_R_DIVIDER 0x1F
236 
237 #define ADF5902_R_DIV_2_DISABLE 0x0
238 #define ADF5902_R_DIV_2_ENABLE 0x1
239 
240 #define ADF5902_REF_DOUBLER_DISABLE 0x0
241 #define ADF5902_REF_DOUBLER_ENABLE 0x1
242 
243 #define ADF5902_MIN_CLK_DIVIDER 0x000
244 #define ADF5902_MAX_CLK_DIVIDER 0xFFF
245 
246 #define ADF5902_MASTER_RESET_DISABLE 0x0
247 #define ADF5902_MASTER_RESET_ENABLE 0x1
248 
249 /* Register 8 Map */
250 #define ADF5902_REG8_FREQ_CAL_DIV(x) (((x) & 0x3FF) << 5)
251 #define ADF5902_REG8_RESERVED (0x8000 << 15)
252 
253 /* Register 8 Bit Definitions */
254 #define ADF5902_MIN_FREQ_CAL_DIV 0x000
255 #define ADF5902_MAX_FREQ_CAL_DIV 0x3FF
256 
257 /* Register 9 Map */
258 #define ADF5902_REG9_RESERVED_CALIB (0x15105C9 << 5)
259 #define ADF5902_REG9_RESERVED_NORMAL (0x14005C9 << 5)
260 
261 /* Register 10 Map */
262 #define ADF5902_REG10_RESERVED (0xE99532 << 5)
263 
264 /* Register 11 Map */
265 #define ADF5902_REG11_CNTR_RESET(x) (((x) & 0x1) << 5)
266 #define ADF5902_REG11_RAMP_MODE(x) (((x) & 0x3) << 7)
267 #define ADF5902_REG11_SING_FULL_TRI(x) (((x) & 0x1) << 9)
268 #define ADF5902_REG11_SD_RESET(x) (((x) & 0x1) << 11)
269 #define ADF5902_REG11_RESERVED ((0x0 << 6) | (0x0 << 10) | (0x0 << 12))
270 
271 /* Register 11 Bit Definitions */
272 #define ADF5902_CNTR_RESET_DISABLE 0x0
273 #define ADF5902_CNTR_RESET_ENABLE 0x1
274 
275 #define ADF5902_CONT_SAWTOOTH 0x0
276 #define ADF5902_SAWTOOTH_BURST 0x1
277 #define ADF5902_CONTINUOUS_TRIANGULAR 0x2
278 #define ADF5902_SINGLE_RAMP_BURST 0x3
279 
280 #define ADF5902_SINGLE_FULL_TRI_DISBLE 0x0
281 #define ADF5902_SINGLE_FULL_TRI_ENABLE 0x1
282 
283 #define ADF5902_SD_RESET_ENABLE 0x0
284 #define ADF5902_SD_RESET_DISABLE 0x1
285 
286 /* Register 12 Map */
287 #define ADF5902_REG12_CP_TRISTATE(x) (((x) & 0x1) << 15)
288 #define ADF5902_REG12_CHARGE_PUMP(x) (((x) & 0xF) << 17)
289 #define ADF5902_REG12_RESERVED ((0x0 << 5) | (0x1 << 16) | (0x2 << 21))
290 
291 /* Register 12 Bit Definition */
292 #define ADF5902_CP_TRISTATE_DISABLE 0x0
293 #define ADF5902_CP_TRISTATE_ENABLE 0x1
294 
295 #define ADF5902_CP_CURRENT_280UA 0x0
296 #define ADF5902_CP_CURRENT_560UA 0x1
297 #define ADF5902_CP_CURRENT_840UA 0x2
298 #define ADF5902_CP_CURRENT_1MA12 0x3
299 #define ADF5902_CP_CURRENT_1MA40 0x4
300 #define ADF5902_CP_CURRENT_1MA68 0x5
301 #define ADF5902_CP_CURRENT_1MA96 0x6
302 #define ADF5902_CP_CURRENT_2MA24 0x7
303 #define ADF5902_CP_CURRENT_2MA52 0x8
304 #define ADF5902_CP_CURRENT_2MA80 0x9
305 #define ADF5902_CP_CURRENT_3MA08 0xA
306 #define ADF5902_CP_CURRENT_3MA36 0xB
307 #define ADF5902_CP_CURRENT_3MA64 0xC
308 #define ADF5902_CP_CURRENT_3MA92 0xD
309 #define ADF5902_CP_CURRENT_4MA20 0xE
310 #define ADF5902_CP_CURRENT_4MA48 0xF
311 
312 /* Register 13 Map */
313 #define ADF5902_REG13_CLK_DIV_SEL(x) (((x) & 0x3) << 5)
314 #define ADF5902_REG13_CLK_DIV_2(x) (((x) & 0xFFF) << 7)
315 #define ADF5902_REG13_CLK_DIV_MODE(x) (((x) & 0x3) << 19)
316 #define ADF5902_REG13_LE_SEL(x) (((x) & 0x1) << 21)
317 #define ADF5902_REG13_RESERVED (0x0 << 22)
318 
319 /* Register 13 Bit Definitions */
320 #define ADF5902_CLK_DIV_SEL_0 0x0
321 #define ADF5902_CLK_DIV_SEL_1 0x1
322 #define ADF5902_CLK_DIV_SEL_2 0x2
323 #define ADF5902_CLK_DIV_SEL_3 0x3
324 
325 #define ADF5902_MIN_CLK_DIV_2 0x000
326 #define ADF5902_MAX_CLK_DIV_2 0xFFF
327 
328 #define ADF5902_CLK_DIV_OFF 0x0
329 #define ADF5902_FREQ_MEASURE 0x2
330 #define ADF5902_RAMP_DIV 0x3
331 
332 #define ADF5902_LE_FROM_PIN 0x0
333 #define ADF5902_LE_SYNC_REFIN 0x1
334 
335 /* Register 14 Map */
336 #define ADF5902_REG14_DEV_WORD(x) (((x) & 0xFFFF) << 5)
337 #define ADF5902_REG14_DEV_OFFSET(x) (((x) & 0xF) << 21)
338 #define ADF5902_REG14_DEV_SEL(x) (((x) & 0x3) << 25)
339 #define ADF5902_REG14_TX_RAMP_CLK(x) (((x) & 0x1) << 30)
340 #define ADF5902_REG14_TX_DATA_INV(x) (((x) & 0x1) << 31)
341 #define ADF5902_REG14_RESERVED (0x0 << 27)
342 
343 /* Register 14 Bit Definitions */
344 #define ADF5902_MAX_DEV_WORD 0x7FFF
345 #define ADF5902_MIN_DEV_WORD (int16_t)0x8000
346 
347 #define ADF5902_MAX_DEV_OFFSET 0x9
348 #define ADF5902_MIN_DEV_OFFSET 0x0
349 
350 #define ADF5902_DEV_SEL_0 0x0
351 #define ADF5902_DEV_SEL_1 0x1
352 #define ADF5902_DEV_SEL_2 0x2
353 #define ADF5902_DEV_SEL_3 0x3
354 
355 #define ADF5902_TX_RAMP_CLK_DIV 0x0
356 #define ADF5902_TX_RAMP_TX_DATA_PIN 0x1
357 
358 #define AD5902_TX_DATA_INV_DISABLE 0x0
359 #define AD5902_TX_DATA_INV_ENABLE 0x1
360 
361 /* Register 15 Map */
362 #define ADF5902_REG15_STEP_WORD(x) (((x) & 0xFFFFF) << 5)
363 #define ADF5902_REG15_STEP_SEL(x) (((x) & 0x3) << 25)
364 #define ADF5902_REG15_RESERVED (0x0 << 27)
365 
366 /* Register 15 Bit Definition */
367 #define ADF5902_MIN_STEP_WORD 0x00000
368 #define ADF5902_MAX_STEP_WORD 0xFFFFF
369 
370 #define ADF5902_STEP_SEL_0 0x0
371 #define ADF5902_STEP_SEL_1 0x1
372 #define ADF5902_STEP_SEL_2 0x2
373 #define ADF5902_STEP_SEL_3 0x3
374 
375 /* Register 16 Map */
376 #define ADF5902_REG16_DEL_START_WORD(x) (((x) & 0xFFF) << 5)
377 #define ADF5902_REG16_RAMP_DEL(x) (((x) & 0x1) << 19)
378 #define ADF5902_REG16_TX_DATA_TRIG(x) (((x) & 0x1) << 20)
379 #define ADF5902_REG16_DEL_SEL(x) (((x) & 0x3) << 23)
380 #define ADF5902_REG16_RESERVED ((0x0 << 17) | (0x0 << 21) | (0x1 << 25))
381 
382 #define ADF5902_MIN_DELAY_START_WRD 0x000
383 #define ADF5902_MAX_DELAY_START_WRD 0xFFF
384 
385 #define ADF5902_RAMP_DEL_DISABLE 0x0
386 #define ADF5902_RAMP_DEL_ENABLE 0x1
387 
388 #define ADF5902_TX_DATA_TRIG_DISABLE 0x0
389 #define ADF5902_TX_DATA_TRIG_ENABLE 0x1
390 
391 #define ADF5902_DEL_SEL_0 0x0
392 #define ADF5902_DEL_SEL_1 0x1
393 #define ADF5902_DEL_SEL_2 0x2
394 #define ADF5902_DEL_SEL_3 0x3
395 
396 /* Register 17 Map */
397 #define ADF5902_REG17_RESERVED (0x0 << 5)
398 
400 #define ADF5902_MAX_VCO_FREQ 24250000000ull
401 #define ADF5902_MIN_VCO_FREQ 24000000000ull
402 #define ADF5902_MIN_REFIN_FREQ 10000000
403 #define ADF5902_MAX_REFIN_FREQ 260000000
404 #define ADF5902_MAX_FREQ_PFD 110000000
405 #define ADF5902_MAX_SLOPE_NO 4
406 #define ADF5902_MAX_DELAY_WORD_NO 4
407 #define ADF5902_MAX_CLK2_DIV_NO 4
408 #define ADF5902_VLSB 0.00733f
409 #define ADF5902_VOFF 0.699f
410 #define ADF5902_VGAIN 0.0064f
411 #define ADF5902_SPI_DUMMY_DATA 0x0
412 #define ADF5902_FREQ_CAL_DIV_100KHZ 100000
413 #define ADF5902_CLK1_DIV_25KHZ 25000
414 #define ADF5902_ADC_CLK_DIV_1MHZ 1000000
415 #define ADF5902_BUFF_SIZE_BYTES 4
416 #define ADF5902_FRAC_MSB_MSK 0xFFF
417 #define ADF5902_FRAC_LSB_MSK 0x1FFF
418 
419 /******************************************************************************/
420 /*************************** Types Declarations *******************************/
421 /******************************************************************************/
422 
423 struct slope {
424  /* Deviation Word */
425  int16_t dev_word;
426  /* Deviation Offset */
427  uint8_t dev_offset;
428  /* Step Word */
429  uint32_t step_word;
430 };
431 
433  /* SPI Initialization parameters */
435  /* GPIO Chip Enable */
437  /* Reference input frequency */
438  uint64_t ref_in;
439  /* Output frequency of the internal VCO */
440  uint64_t rf_out;
441  /* Reference doubler enable */
442  uint8_t ref_doubler_en;
443  /* Reference divide by 2 bit */
444  uint8_t ref_div2_en;
445  /* ADC Average value */
446  uint8_t adc_avg;
447  /* Transmitter Amplitude Calibration Reference Code */
448  uint8_t tx_amp_cal_ref;
449  /* Ramp delay enable */
450  uint8_t ramp_delay_en;
451  /* TX Data trigger */
452  uint8_t tx_trig_en;
453  /* Delay words number */
454  uint8_t delay_words_no;
455  /* Delay Words */
457  /* Number of deviaton parameters */
458  uint8_t slopes_no;
459  /* Slope structure */
460  struct slope *slopes;
461  /* Tx Data Ramp Clock */
462  uint8_t tx_ramp_clk;
463  /* Tx Data Invert */
464  uint8_t tx_data_invert;
465  /* Ramp Status */
466  uint16_t ramp_status;
467  /* Clock divider (CLK1) divider value in Ramp mode */
468  uint16_t clk1_div_ramp;
469  /* 12-bit Clock Divider number */
470  uint8_t clk2_div_no;
471  /* 12-bit Clock Divider */
473  /* LE Select */
474  uint8_t le_sel;
475  /* Clock Divider Mode*/
476  uint8_t clk_div_mode;
477  /* Charge Pump current */
478  uint8_t cp_current;
479  /* Charge Pump tristate */
480  uint8_t cp_tristate_en;
481  /* Ramp Mode */
482  uint8_t ramp_mode;
483 };
484 
485 struct adf5902_dev {
486  /* SPI Descriptor */
488  /* GPIO Chip Enable */
490  /* Reference input frequency*/
491  uint64_t ref_in;
492  /* Output frequency(Hz) of the internal VCO */
493  uint64_t rf_out;
494  /* Phase Frequency Detector */
495  uint64_t f_pfd;
496  /* Divide ration of the binary 5-bit reference counter */
497  uint8_t ref_div_factor;
498  /* Reference doubler enable */
499  uint8_t ref_doubler_en;
500  /* Reference divide by 2 bit */
501  uint8_t ref_div2_en;
502  /* Register 5 Integer word */
503  uint16_t int_div;
504  /* Register 5 MSB FRAC value */
505  uint16_t frac_msb;
506  /* Register 5 LSB FRAC value */
507  uint16_t frac_lsb;
508  /* Frequency calibration divider value */
509  uint16_t freq_cal_div;
510  /* Clock divider (CLK1) divider value */
511  uint16_t clk1_div;
512  /* Clock divider (CLK1) divider value in Ramp mode */
513  uint16_t clk1_div_ramp;
514  /* ADC Clock divider */
515  uint16_t adc_clk_div;
516  /* ADC Average value */
517  uint8_t adc_avg;
518  /* Transmitter Amplitude Calibration Reference Code */
519  uint8_t tx_amp_cal_ref;
520  /* Ramp delay enable */
521  uint8_t ramp_delay_en;
522  /* TX Data trigger */
523  uint8_t tx_trig_en;
524  /* Delay words number */
525  uint8_t delay_words_no;
526  /* Delay Words */
527  uint16_t *delay_wd;
528  /* Number of deviaton parameters */
529  uint8_t slopes_no;
530  /* Slope Structure */
531  struct slope *slopes;
532  /* Tx Data Ramp Clock */
533  uint8_t tx_ramp_clk;
534  /* Tx Data Invert */
535  uint8_t tx_data_invert;
536  /* Ramp Status */
537  uint16_t ramp_status;
538  /* 12-bit Clock Divider number */
539  uint8_t clk2_div_no;
540  /* 12-bit Clock Divider */
541  uint16_t *clk2_div;
542  /* LE Select */
543  uint8_t le_sel;
544  /* Clock Divider Mode*/
545  uint8_t clk_div_mode;
546  /* Charge Pump current */
547  uint8_t cp_current;
548  /* Charge Pump tristate */
549  uint8_t cp_tristate_en;
550  /* Ramp Mode */
551  uint8_t ramp_mode;
552 };
553 
554 /******************************************************************************/
555 /************************ Functions Declarations ******************************/
556 /******************************************************************************/
557 
559 int32_t adf5902_write(struct adf5902_dev *dev, uint8_t reg_addr,
560  uint32_t data);
561 
563 int32_t adf5902_readback(struct adf5902_dev *dev, uint8_t reg_addr,
564  uint32_t *data);
565 
567 int32_t adf5902_init(struct adf5902_dev **device,
569 
571 int32_t adf5902_recalibrate(struct adf5902_dev *dev);
572 
574 int32_t adf5902_read_temp(struct adf5902_dev *dev, float *temp);
575 
576 /* ADF5902 Measure Output locked frequency */
577 int32_t adf5902f_compute_frequency(struct adf5902_dev *dev, uint64_t *freq);
578 
580 int32_t adf5902_remove(struct adf5902_dev *dev);
581 
582 #endif /* SRC_ADF5902_H_ */
ADF5902_REG10_RESERVED
#define ADF5902_REG10_RESERVED
Definition: adf5902.h:262
ADF5902_MAX_CLK_DIV_2
#define ADF5902_MAX_CLK_DIV_2
Definition: adf5902.h:326
adf5902_dev::freq_cal_div
uint16_t freq_cal_div
Definition: adf5902.h:509
adf5902_dev::ref_div_factor
uint8_t ref_div_factor
Definition: adf5902.h:497
ADF5902_REG8_FREQ_CAL_DIV
#define ADF5902_REG8_FREQ_CAL_DIV(x)
Definition: adf5902.h:250
ADF5902_REG7_MASTER_RESET
#define ADF5902_REG7_MASTER_RESET(x)
Definition: adf5902.h:230
adf5902_init_param::ramp_delay_en
uint8_t ramp_delay_en
Definition: adf5902.h:450
ADF5902_REG6
#define ADF5902_REG6
Definition: adf5902.h:61
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
adf5902_init_param::ref_div2_en
uint8_t ref_div2_en
Definition: adf5902.h:444
adf5902_dev::ramp_status
uint16_t ramp_status
Definition: adf5902.h:537
ADF5902_TX_RAMP_TX_DATA_PIN
#define ADF5902_TX_RAMP_TX_DATA_PIN
Definition: adf5902.h:356
ADF5902_REG3_MUXOUT
#define ADF5902_REG3_MUXOUT(x)
Definition: adf5902.h:139
ADF5902_REG7_R_DIV_2
#define ADF5902_REG7_R_DIV_2(x)
Definition: adf5902.h:228
ADF5902_RAMP_DIV
#define ADF5902_RAMP_DIV
Definition: adf5902.h:330
ADF5902_CONTINUOUS_TRIANGULAR
#define ADF5902_CONTINUOUS_TRIANGULAR
Definition: adf5902.h:277
ADF5902_R_DIV_2_DISABLE
#define ADF5902_R_DIV_2_DISABLE
Definition: adf5902.h:237
adf5902_recalibrate
int32_t adf5902_recalibrate(struct adf5902_dev *dev)
Recalibration procedure.
Definition: adf5902.c:681
ADF5902_REF_DOUBLER_ENABLE
#define ADF5902_REF_DOUBLER_ENABLE
Definition: adf5902.h:241
adf5902_dev::slopes
struct slope * slopes
Definition: adf5902.h:531
ADF5902_REG12_CP_TRISTATE
#define ADF5902_REG12_CP_TRISTATE(x)
Definition: adf5902.h:287
ADF5902_CNTR_RESET_ENABLE
#define ADF5902_CNTR_RESET_ENABLE
Definition: adf5902.h:273
adf5902_dev::cp_tristate_en
uint8_t cp_tristate_en
Definition: adf5902.h:549
ADF5902_LE_SYNC_REFIN
#define ADF5902_LE_SYNC_REFIN
Definition: adf5902.h:333
ADF5902_MAX_DELAY_START_WRD
#define ADF5902_MAX_DELAY_START_WRD
Definition: adf5902.h:383
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:83
ADF5902_TX1_AMP_CAL
#define ADF5902_TX1_AMP_CAL
Definition: adf5902.h:105
adf5902_write
int32_t adf5902_write(struct adf5902_dev *dev, uint8_t reg_addr, uint32_t data)
Writes 4 bytes of data to ADF5902.
Definition: adf5902.c:60
ADF5902_ADC_AVG_4
#define ADF5902_ADC_AVG_4
Definition: adf5902.h:131
no_os_spi.h
Header file of SPI Interface.
ADF5902_REG13_CLK_DIV_MODE
#define ADF5902_REG13_CLK_DIV_MODE(x)
Definition: adf5902.h:315
adf5902_read_temp
int32_t adf5902_read_temp(struct adf5902_dev *dev, float *temp)
Free resoulces allocated for ADF5902.
Definition: adf5902.c:743
adf5902_init_param::tx_trig_en
uint8_t tx_trig_en
Definition: adf5902.h:452
ADF5902_REG7_RESERVED
#define ADF5902_REG7_RESERVED
Definition: adf5902.h:231
ADF5902_REG6_RESERVED
#define ADF5902_REG6_RESERVED
Definition: adf5902.h:219
adf5902_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: adf5902.h:487
ADF5902_REG5_RAMP_ON
#define ADF5902_REG5_RAMP_ON(x)
Definition: adf5902.h:204
ADF5902_FREQ_RB
#define ADF5902_FREQ_RB
Definition: adf5902.h:163
ADF5902_REG12
#define ADF5902_REG12
Definition: adf5902.h:67
adf5902_dev::ref_div2_en
uint8_t ref_div2_en
Definition: adf5902.h:501
ADF5902_REG1
#define ADF5902_REG1
Definition: adf5902.h:56
adf5902_init_param::tx_ramp_clk
uint8_t tx_ramp_clk
Definition: adf5902.h:462
ADF5902_REG2
#define ADF5902_REG2
Definition: adf5902.h:57
adf5902_dev::ref_in
uint64_t ref_in
Definition: adf5902.h:491
ADF5902_REG0_TX2C
#define ADF5902_REG0_TX2C(x)
Definition: adf5902.h:82
no_os_delay.h
Header file of Delay functions.
ADF5902_REG11_RAMP_MODE
#define ADF5902_REG11_RAMP_MODE(x)
Definition: adf5902.h:266
ADF5902_POWER_UP_TX1
#define ADF5902_POWER_UP_TX1
Definition: adf5902.h:90
ADF5902_FREQ_CAL_DIV_100KHZ
#define ADF5902_FREQ_CAL_DIV_100KHZ
Definition: adf5902.h:412
ADF5902_RAMP_COMPL_TO_MUXOUT
#define ADF5902_RAMP_COMPL_TO_MUXOUT
Definition: adf5902.h:196
ADF5902_REG8_RESERVED
#define ADF5902_REG8_RESERVED
Definition: adf5902.h:251
ADF5902_LE_FROM_PIN
#define ADF5902_LE_FROM_PIN
Definition: adf5902.h:332
adf5902_dev::clk2_div
uint16_t * clk2_div
Definition: adf5902.h:541
ADF5902_REG0_PTX1
#define ADF5902_REG0_PTX1(x)
Definition: adf5902.h:76
ADF5902_REG0_RESERVED
#define ADF5902_REG0_RESERVED
Definition: adf5902.h:83
device
Definition: ad9361_util.h:75
ADF5902_REG15_RESERVED
#define ADF5902_REG15_RESERVED
Definition: adf5902.h:364
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
adf5902_dev::tx_data_invert
uint8_t tx_data_invert
Definition: adf5902.h:535
adf5902_init_param::adc_avg
uint8_t adc_avg
Definition: adf5902.h:446
ADF5902_RAMP_ON_DISABLED
#define ADF5902_RAMP_ON_DISABLED
Definition: adf5902.h:214
ADF5902_REG9
#define ADF5902_REG9
Definition: adf5902.h:64
ADF5902_TX_DATA_TRIG_DISABLE
#define ADF5902_TX_DATA_TRIG_DISABLE
Definition: adf5902.h:388
ADF5902_TX_DATA_TRIG_ENABLE
#define ADF5902_TX_DATA_TRIG_ENABLE
Definition: adf5902.h:389
ADF5902_REG15
#define ADF5902_REG15
Definition: adf5902.h:70
ADF5902_SINGLE_RAMP_BURST
#define ADF5902_SINGLE_RAMP_BURST
Definition: adf5902.h:278
adf5902_dev::tx_amp_cal_ref
uint8_t tx_amp_cal_ref
Definition: adf5902.h:519
ADF5902_REG13_CLK_DIV_SEL
#define ADF5902_REG13_CLK_DIV_SEL(x)
Definition: adf5902.h:313
adf5902_init_param::spi_init
struct no_os_spi_init_param * spi_init
Definition: adf5902.h:434
ADF5902_VGAIN
#define ADF5902_VGAIN
Definition: adf5902.h:410
ADF5902_SPI_DUMMY_DATA
#define ADF5902_SPI_DUMMY_DATA
Definition: adf5902.h:411
ADF5902_REG7_REF_DOUBLER
#define ADF5902_REG7_REF_DOUBLER(x)
Definition: adf5902.h:227
adf5902_dev::clk1_div_ramp
uint16_t clk1_div_ramp
Definition: adf5902.h:513
adf5902_init_param::cp_current
uint8_t cp_current
Definition: adf5902.h:478
ADF5902_REG2_ADC_AVG
#define ADF5902_REG2_ADC_AVG(x)
Definition: adf5902.h:120
ADF5902_REG10
#define ADF5902_REG10
Definition: adf5902.h:65
ADF5902_REG2_ADC_CLK_DIV
#define ADF5902_REG2_ADC_CLK_DIV(x)
Definition: adf5902.h:119
ADF5902_DEL_SEL_3
#define ADF5902_DEL_SEL_3
Definition: adf5902.h:394
ADF5902_POWER_DOWN_TX2
#define ADF5902_POWER_DOWN_TX2
Definition: adf5902.h:92
ADF5902_MAX_INT_MSB_WORD
#define ADF5902_MAX_INT_MSB_WORD
Definition: adf5902.h:212
ADF5902_FRAC_LSB_MSK
#define ADF5902_FRAC_LSB_MSK
Definition: adf5902.h:417
ADF5902_REG13_CLK_DIV_2
#define ADF5902_REG13_CLK_DIV_2(x)
Definition: adf5902.h:314
ADF5902_ADC_RB
#define ADF5902_ADC_RB
Definition: adf5902.h:162
ADF5902_REG17_RESERVED
#define ADF5902_REG17_RESERVED
Definition: adf5902.h:397
ADF5902_REG13
#define ADF5902_REG13
Definition: adf5902.h:68
ADF5902_REG0_PADC
#define ADF5902_REG0_PADC(x)
Definition: adf5902.h:78
adf5902_dev::tx_trig_en
uint8_t tx_trig_en
Definition: adf5902.h:523
adf5902_dev::frac_msb
uint16_t frac_msb
Definition: adf5902.h:505
adf5902_write
int32_t adf5902_write(struct adf5902_dev *dev, uint8_t reg_addr, uint32_t data)
Writes 4 bytes of data to ADF5902.
Definition: adf5902.c:60
ADF5902_REG5_FRAC_MSB_WORD
#define ADF5902_REG5_FRAC_MSB_WORD(x)
Definition: adf5902.h:202
ADF5902_REG5_INTEGER_WORD
#define ADF5902_REG5_INTEGER_WORD(x)
Definition: adf5902.h:203
ADF5902_REG16_TX_DATA_TRIG
#define ADF5902_REG16_TX_DATA_TRIG(x)
Definition: adf5902.h:378
adf5902_dev::int_div
uint16_t int_div
Definition: adf5902.h:503
adf5902_dev::le_sel
uint8_t le_sel
Definition: adf5902.h:543
ADF5902_REG3_IO_LVL
#define ADF5902_REG3_IO_LVL(x)
Definition: adf5902.h:138
adf5902_readback
int32_t adf5902_readback(struct adf5902_dev *dev, uint8_t reg_addr, uint32_t *data)
Readback data from ADF5902.
Definition: adf5902.c:81
adf5902_remove
int32_t adf5902_remove(struct adf5902_dev *dev)
Free resoulces allocated for ADF5902.
Definition: adf5902.c:909
adf5902_init_param::clk_div_mode
uint8_t clk_div_mode
Definition: adf5902.h:476
ADF5902_MIN_REFIN_FREQ
#define ADF5902_MIN_REFIN_FREQ
Definition: adf5902.h:402
ADF5902_REG5
#define ADF5902_REG5
Definition: adf5902.h:60
no_os_error.h
Error codes definition.
ADF5902_REG3_RESERVED
#define ADF5902_REG3_RESERVED
Definition: adf5902.h:140
NO_OS_DIV_ROUND_UP
#define NO_OS_DIV_ROUND_UP(x, y)
Definition: no_os_util.h:56
ADF5902_REG16_RESERVED
#define ADF5902_REG16_RESERVED
Definition: adf5902.h:380
ADF5902_MAX_DELAY_WORD_NO
#define ADF5902_MAX_DELAY_WORD_NO
Definition: adf5902.h:406
ADF5902_REG4_TEST_BUS
#define ADF5902_REG4_TEST_BUS(x)
Definition: adf5902.h:191
ADF5902_REG6_FRAC_LSB_WORD
#define ADF5902_REG6_FRAC_LSB_WORD(x)
Definition: adf5902.h:218
ADF5902_RAMP_DEL_DISABLE
#define ADF5902_RAMP_DEL_DISABLE
Definition: adf5902.h:385
ADF5902_MIN_VCO_FREQ
#define ADF5902_MIN_VCO_FREQ
Definition: adf5902.h:401
adf5902_init_param::slopes
struct slope * slopes
Definition: adf5902.h:460
adf5902_init_param::ramp_mode
uint8_t ramp_mode
Definition: adf5902.h:482
ADF5902_CNTR_RESET_DISABLE
#define ADF5902_CNTR_RESET_DISABLE
Definition: adf5902.h:272
ADF5902_ADC_CLK_DIV_1MHZ
#define ADF5902_ADC_CLK_DIV_1MHZ
Definition: adf5902.h:414
ADF5902_REG7
#define ADF5902_REG7
Definition: adf5902.h:62
ADF5902_MAX_DEV_OFFSET
#define ADF5902_MAX_DEV_OFFSET
Definition: adf5902.h:347
ADF5902_REG7_CLK_DIV
#define ADF5902_REG7_CLK_DIV(x)
Definition: adf5902.h:229
slope
Definition: adf5902.h:423
adf5902_init_param::slopes_no
uint8_t slopes_no
Definition: adf5902.h:458
adf5902_init_param
Definition: adf5902.h:432
ADF5902_ADC_MAX_CLK_DIVIDER
#define ADF5902_ADC_MAX_CLK_DIVIDER
Definition: adf5902.h:126
adf5902_init_param::delay_words_no
uint8_t delay_words_no
Definition: adf5902.h:454
ADF5902_TX_RAMP_CLK_DIV
#define ADF5902_TX_RAMP_CLK_DIV
Definition: adf5902.h:355
adf5902_dev::clk2_div_no
uint8_t clk2_div_no
Definition: adf5902.h:539
ADF5902_REG11_CNTR_RESET
#define ADF5902_REG11_CNTR_RESET(x)
Definition: adf5902.h:265
ADF5902_REG3
#define ADF5902_REG3
Definition: adf5902.h:58
ADF5902_REG15_STEP_SEL
#define ADF5902_REG15_STEP_SEL(x)
Definition: adf5902.h:363
ADF5902_TEMP_SENS_TO_ATEST
#define ADF5902_TEMP_SENS_TO_ATEST
Definition: adf5902.h:198
adf5902_init_param::clk2_div_no
uint8_t clk2_div_no
Definition: adf5902.h:470
adf5902_init_param::tx_data_invert
uint8_t tx_data_invert
Definition: adf5902.h:464
ADF5902_RAMP_DOWN_TO_MUXOUT
#define ADF5902_RAMP_DOWN_TO_MUXOUT
Definition: adf5902.h:197
adf5902_dev::adc_avg
uint8_t adc_avg
Definition: adf5902.h:517
ADF5902_REF_DOUBLER_DISABLE
#define ADF5902_REF_DOUBLER_DISABLE
Definition: adf5902.h:240
ADF5902_FRAC_MSB_MSK
#define ADF5902_FRAC_MSB_MSK
Definition: adf5902.h:416
adf5902_init
int32_t adf5902_init(struct adf5902_dev **device, struct adf5902_init_param *init_param)
Initializes the ADF5902.
Definition: adf5902.c:475
adf5902_dev::ref_doubler_en
uint8_t ref_doubler_en
Definition: adf5902.h:499
adf5902_init_param::le_sel
uint8_t le_sel
Definition: adf5902.h:474
ADF5902_REG3_READBACK_CTRL
#define ADF5902_REG3_READBACK_CTRL(x)
Definition: adf5902.h:137
ADF5902_REG12_RESERVED
#define ADF5902_REG12_RESERVED
Definition: adf5902.h:289
adf5902_init_param::tx_amp_cal_ref
uint8_t tx_amp_cal_ref
Definition: adf5902.h:448
adf5902_dev::clk1_div
uint16_t clk1_div
Definition: adf5902.h:511
ADF5902_REG2_RESERVED
#define ADF5902_REG2_RESERVED
Definition: adf5902.h:122
ADF5902_VOFF
#define ADF5902_VOFF
Definition: adf5902.h:409
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
ADF5902_RAMP_DEL_ENABLE
#define ADF5902_RAMP_DEL_ENABLE
Definition: adf5902.h:386
slope::dev_offset
uint8_t dev_offset
Definition: adf5902.h:427
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:143
adf5902_dev::ramp_delay_en
uint8_t ramp_delay_en
Definition: adf5902.h:521
ADF5902_MAX_FREQ_CAL_DIV
#define ADF5902_MAX_FREQ_CAL_DIV
Definition: adf5902.h:255
adf5902_dev::gpio_ce
struct no_os_gpio_desc * gpio_ce
Definition: adf5902.h:489
ADF5902_VLSB
#define ADF5902_VLSB
Definition: adf5902.h:408
ADF5902_REG0_PVCO
#define ADF5902_REG0_PVCO(x)
Definition: adf5902.h:80
ADF5902_POWER_UP_VCO
#define ADF5902_POWER_UP_VCO
Definition: adf5902.h:102
adf5902_remove
int32_t adf5902_remove(struct adf5902_dev *dev)
Free resoulces allocated for ADF5902.
Definition: adf5902.c:909
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
ADF5902_REG0_VCAL
#define ADF5902_REG0_VCAL(x)
Definition: adf5902.h:79
adf5902.h
Header file for adf5902 Driver.
adf5902_init_param::rf_out
uint64_t rf_out
Definition: adf5902.h:440
ADF5902_CONT_SAWTOOTH
#define ADF5902_CONT_SAWTOOTH
Definition: adf5902.h:275
ADF5902_TEST_BUS_NONE
#define ADF5902_TEST_BUS_NONE
Definition: adf5902.h:195
adf5902_init_param::ref_in
uint64_t ref_in
Definition: adf5902.h:438
ADF5902_REG1_RESERVED
#define ADF5902_REG1_RESERVED
Definition: adf5902.h:112
ADF5902_REG16
#define ADF5902_REG16
Definition: adf5902.h:71
ADF5902_CLK_DIV_SEL_3
#define ADF5902_CLK_DIV_SEL_3
Definition: adf5902.h:323
ADF5902_MAX_VCO_FREQ
#define ADF5902_MAX_VCO_FREQ
Definition: adf5902.h:400
ADF5902_REG11_RESERVED
#define ADF5902_REG11_RESERVED
Definition: adf5902.h:269
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
ADF5902_REG13_RESERVED
#define ADF5902_REG13_RESERVED
Definition: adf5902.h:317
ADF5902_MUXOUT_CAL_BUSY
#define ADF5902_MUXOUT_CAL_BUSY
Definition: adf5902.h:185
ADF5902_POWER_UP_TX2
#define ADF5902_POWER_UP_TX2
Definition: adf5902.h:93
ADF5902_REG0_PTX2
#define ADF5902_REG0_PTX2(x)
Definition: adf5902.h:77
ADF5902_MUXOUT_RAMP_STATUS
#define ADF5902_MUXOUT_RAMP_STATUS
Definition: adf5902.h:188
slope::dev_word
int16_t dev_word
Definition: adf5902.h:425
ADF5902_MASTER_RESET_DISABLE
#define ADF5902_MASTER_RESET_DISABLE
Definition: adf5902.h:246
ADF5902_CLK_DIV_OFF
#define ADF5902_CLK_DIV_OFF
Definition: adf5902.h:328
ADF5902_REG16_RAMP_DEL
#define ADF5902_REG16_RAMP_DEL(x)
Definition: adf5902.h:377
ADF5902_CLK1_DIV_25KHZ
#define ADF5902_CLK1_DIV_25KHZ
Definition: adf5902.h:413
ADF5902_REG4
#define ADF5902_REG4
Definition: adf5902.h:59
adf5902_dev::ramp_mode
uint8_t ramp_mode
Definition: adf5902.h:551
ADF5902_CP_TRISTATE_DISABLE
#define ADF5902_CP_TRISTATE_DISABLE
Definition: adf5902.h:292
AD5902_TX_DATA_INV_DISABLE
#define AD5902_TX_DATA_INV_DISABLE
Definition: adf5902.h:358
ADF5902_VCO_NORMAL_OP
#define ADF5902_VCO_NORMAL_OP
Definition: adf5902.h:98
ADF5902_MAX_STEP_WORD
#define ADF5902_MAX_STEP_WORD
Definition: adf5902.h:368
ADF5902_MAX_FREQ_PFD
#define ADF5902_MAX_FREQ_PFD
Definition: adf5902.h:404
ADF5902_REG12_CHARGE_PUMP
#define ADF5902_REG12_CHARGE_PUMP(x)
Definition: adf5902.h:288
ADF5902_MAX_REFIN_FREQ
#define ADF5902_MAX_REFIN_FREQ
Definition: adf5902.h:403
ADF5902_R_DIV_2_ENABLE
#define ADF5902_R_DIV_2_ENABLE
Definition: adf5902.h:238
adf5902_init_param::cp_tristate_en
uint8_t cp_tristate_en
Definition: adf5902.h:480
ADF5902_REG14_DEV_OFFSET
#define ADF5902_REG14_DEV_OFFSET(x)
Definition: adf5902.h:337
adf5902_init
int32_t adf5902_init(struct adf5902_dev **device, struct adf5902_init_param *init_param)
Initializes the ADF5902.
Definition: adf5902.c:475
ADF5902_TX2_AMP_CAL
#define ADF5902_TX2_AMP_CAL
Definition: adf5902.h:108
ADF5902_REG15_STEP_WORD
#define ADF5902_REG15_STEP_WORD(x)
Definition: adf5902.h:362
ADF5902_TEMP_SENS_TO_ADC
#define ADF5902_TEMP_SENS_TO_ADC
Definition: adf5902.h:199
ADF5902_REG0_PLO
#define ADF5902_REG0_PLO(x)
Definition: adf5902.h:75
no_os_udelay
void no_os_udelay(uint32_t usecs)
Wait until usecs microseconds passed.
Definition: aducm3029_delay.c:120
ADF5902_REG0
#define ADF5902_REG0
Definition: adf5902.h:55
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
adf5902_readback
int32_t adf5902_readback(struct adf5902_dev *dev, uint8_t reg_addr, uint32_t *data)
Readback data from ADF5902.
Definition: adf5902.c:81
ADF5902_POWER_DOWN_TX1
#define ADF5902_POWER_DOWN_TX1
Definition: adf5902.h:89
ADF5902_REG9_RESERVED_CALIB
#define ADF5902_REG9_RESERVED_CALIB
Definition: adf5902.h:258
ADF5902_POWER_UP_ADC
#define ADF5902_POWER_UP_ADC
Definition: adf5902.h:96
AD5902_TX_DATA_INV_ENABLE
#define AD5902_TX_DATA_INV_ENABLE
Definition: adf5902.h:359
ADF5902_SAWTOOTH_BURST
#define ADF5902_SAWTOOTH_BURST
Definition: adf5902.h:276
adf5902_dev::adc_clk_div
uint16_t adc_clk_div
Definition: adf5902.h:515
ADF5902_REG4_RESERVED
#define ADF5902_REG4_RESERVED
Definition: adf5902.h:192
ADF5902_REG5_RESERVED
#define ADF5902_REG5_RESERVED
Definition: adf5902.h:205
adf5902f_compute_frequency
int32_t adf5902f_compute_frequency(struct adf5902_dev *dev, uint64_t *freq)
Measure output locked frequency.
Definition: adf5902.c:799
ADF5902_MASTER_RESET_ENABLE
#define ADF5902_MASTER_RESET_ENABLE
Definition: adf5902.h:247
ADF5902_POWER_DOWN_LO
#define ADF5902_POWER_DOWN_LO
Definition: adf5902.h:86
adf5902_dev::tx_ramp_clk
uint8_t tx_ramp_clk
Definition: adf5902.h:533
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:71
adf5902_recalibrate
int32_t adf5902_recalibrate(struct adf5902_dev *dev)
Recalibration procedure.
Definition: adf5902.c:681
ADF5902_MAX_CLK2_DIV_NO
#define ADF5902_MAX_CLK2_DIV_NO
Definition: adf5902.h:407
slope::step_word
uint32_t step_word
Definition: adf5902.h:429
ADF5902_VCO_FULL_CAL
#define ADF5902_VCO_FULL_CAL
Definition: adf5902.h:99
adf5902_dev::delay_wd
uint16_t * delay_wd
Definition: adf5902.h:527
no_os_gpio.h
Header file of GPIO Interface.
adf5902_init_param::delay_wd
uint16_t delay_wd[ADF5902_MAX_DELAY_WORD_NO]
Definition: adf5902.h:456
ADF5902_REG2_ADC_START
#define ADF5902_REG2_ADC_START(x)
Definition: adf5902.h:121
adf5902_dev::cp_current
uint8_t cp_current
Definition: adf5902.h:547
adf5902_dev::f_pfd
uint64_t f_pfd
Definition: adf5902.h:495
ADF5902_REG9_RESERVED_NORMAL
#define ADF5902_REG9_RESERVED_NORMAL
Definition: adf5902.h:259
ADF5902_CP_TRISTATE_ENABLE
#define ADF5902_CP_TRISTATE_ENABLE
Definition: adf5902.h:293
ADF5902_POWER_UP_LO
#define ADF5902_POWER_UP_LO
Definition: adf5902.h:87
ADF5902_TX2_NORMAL_OP
#define ADF5902_TX2_NORMAL_OP
Definition: adf5902.h:107
adf5902_init_param::ramp_status
uint16_t ramp_status
Definition: adf5902.h:466
adf5902_init_param::gpio_ce_param
struct no_os_gpio_init_param * gpio_ce_param
Definition: adf5902.h:436
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
adf5902_dev::frac_lsb
uint16_t frac_lsb
Definition: adf5902.h:507
ADF5902_REG0_TX1C
#define ADF5902_REG0_TX1C(x)
Definition: adf5902.h:81
ADF5902_REG16_DEL_START_WORD
#define ADF5902_REG16_DEL_START_WORD(x)
Definition: adf5902.h:376
ADF5902_CP_CURRENT_4MA48
#define ADF5902_CP_CURRENT_4MA48
Definition: adf5902.h:310
no_os_util.h
Header file of utility functions.
ADF5902_REG17
#define ADF5902_REG17
Definition: adf5902.h:72
ADF5902_FREQ_MEASURE
#define ADF5902_FREQ_MEASURE
Definition: adf5902.h:329
ADF5902_REG14_DEV_SEL
#define ADF5902_REG14_DEV_SEL(x)
Definition: adf5902.h:338
ADF5902_REG14
#define ADF5902_REG14
Definition: adf5902.h:69
adf5902_dev::rf_out
uint64_t rf_out
Definition: adf5902.h:493
adf5902_dev::slopes_no
uint8_t slopes_no
Definition: adf5902.h:529
adf5902_dev::delay_words_no
uint8_t delay_words_no
Definition: adf5902.h:525
ADF5902_REG14_RESERVED
#define ADF5902_REG14_RESERVED
Definition: adf5902.h:341
ADF5902_REG13_LE_SEL
#define ADF5902_REG13_LE_SEL(x)
Definition: adf5902.h:316
ADF5902_STEP_SEL_3
#define ADF5902_STEP_SEL_3
Definition: adf5902.h:373
adf5902_init_param::ref_doubler_en
uint8_t ref_doubler_en
Definition: adf5902.h:442
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
ADF5902_REG14_DEV_WORD
#define ADF5902_REG14_DEV_WORD(x)
Definition: adf5902.h:336
ADF5902_BUFF_SIZE_BYTES
#define ADF5902_BUFF_SIZE_BYTES
Definition: adf5902.h:415
ADF5902_START_ADC_CONV
#define ADF5902_START_ADC_CONV
Definition: adf5902.h:134
adf5902_init_param::clk2_div
uint16_t clk2_div[ADF5902_MAX_CLK2_DIV_NO]
Definition: adf5902.h:472
adf5902f_compute_frequency
int32_t adf5902f_compute_frequency(struct adf5902_dev *dev, uint64_t *freq)
Measure output locked frequency.
Definition: adf5902.c:799
ADF5902_REG16_DEL_SEL
#define ADF5902_REG16_DEL_SEL(x)
Definition: adf5902.h:379
ADF5902_MAX_CLK_DIVIDER
#define ADF5902_MAX_CLK_DIVIDER
Definition: adf5902.h:244
adf5902_dev::clk_div_mode
uint8_t clk_div_mode
Definition: adf5902.h:545
ADF5902_REG7_R_DIVIDER
#define ADF5902_REG7_R_DIVIDER(x)
Definition: adf5902.h:226
adf5902_init_param::clk1_div_ramp
uint16_t clk1_div_ramp
Definition: adf5902.h:468
ADF5902_REG1_TX_AMP_CAL_REF
#define ADF5902_REG1_TX_AMP_CAL_REF(x)
Definition: adf5902.h:111
ADF5902_TX1_NORMAL_OP
#define ADF5902_TX1_NORMAL_OP
Definition: adf5902.h:104
ADF5902_REG_RB_NONE
#define ADF5902_REG_RB_NONE
Definition: adf5902.h:143
ADF5902_IO_LVL_3V3
#define ADF5902_IO_LVL_3V3
Definition: adf5902.h:178
ADF5902_REG8
#define ADF5902_REG8
Definition: adf5902.h:63
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:121
ADF5902_ADC_NORMAL_OP
#define ADF5902_ADC_NORMAL_OP
Definition: adf5902.h:133
ADF5902_REG11
#define ADF5902_REG11
Definition: adf5902.h:66
adf5902_read_temp
int32_t adf5902_read_temp(struct adf5902_dev *dev, float *temp)
Free resoulces allocated for ADF5902.
Definition: adf5902.c:743
adf5902_dev
Definition: adf5902.h:485