no-OS
admv1013.h
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1 /***************************************************************************/
40 #ifndef ADMV1013_H_
41 #define ADMV1013_H_
42 
43 /******************************************************************************/
44 /***************************** Include Files **********************************/
45 /******************************************************************************/
46 #include <stdint.h>
47 #include <stdbool.h>
48 #include "no_os_spi.h"
49 #include "no_os_util.h"
50 
51 /******************************************************************************/
52 /********************** Macros and Constants Definitions **********************/
53 /******************************************************************************/
54 
55 /* ADMV1013 Register Map */
56 #define ADMV1013_REG_SPI_CONTROL 0x00
57 #define ADMV1013_REG_ALARM 0x01
58 #define ADMV1013_REG_ALARM_MASKS 0x02
59 #define ADMV1013_REG_ENABLE 0x03
60 #define ADMV1013_REG_LO_AMP_I 0x05
61 #define ADMV1013_REG_LO_AMP_Q 0x06
62 #define ADMV1013_REG_OFFSET_ADJUST_I 0x07
63 #define ADMV1013_REG_OFFSET_ADJUST_Q 0x08
64 #define ADMV1013_REG_QUAD 0x09
65 #define ADMV1013_REG_VVA_TEMP_COMP 0x0A
66 
67 /* ADMV1013_REG_SPI_CONTROL Map */
68 #define ADMV1013_PARITY_EN_MSK NO_OS_BIT(15)
69 #define ADMV1013_SPI_SOFT_RESET_MSK NO_OS_BIT(14)
70 #define ADMV1013_CHIP_ID_MSK NO_OS_GENMASK(11, 4)
71 #define ADMV1013_CHIP_ID 0xA
72 #define ADMV1013_REVISION_ID_MSK NO_OS_GENMASK(3, 0)
73 
74 /* ADMV1013_REG_ALARM Map */
75 #define ADMV1013_PARITY_ERROR_MSK NO_OS_BIT(15)
76 #define ADMV1013_TOO_FEW_ERRORS_MSK NO_OS_BIT(14)
77 #define ADMV1013_TOO_MANY_ERRORS_MSK NO_OS_BIT(13)
78 #define ADMV1013_ADDRESS_RANGE_ERROR_MSK NO_OS_BIT(12)
79 
80 /* ADMV1013_REG_ENABLE Map */
81 #define ADMV1013_VGA_PD_MSK NO_OS_BIT(15)
82 #define ADMV1013_MIXER_PD_MSK NO_OS_BIT(14)
83 #define ADMV1013_QUAD_PD_MSK NO_OS_GENMASK(13, 11)
84 #define ADMV1013_BG_PD_MSK NO_OS_BIT(10)
85 #define ADMV1013_MIXER_IF_EN_MSK NO_OS_BIT(7)
86 #define ADMV1013_DET_EN_MSK NO_OS_BIT(5)
87 
88 /* ADMV1013_REG_LO_AMP Map */
89 #define ADMV1013_LOAMP_PH_ADJ_FINE_MSK NO_OS_GENMASK(13, 7)
90 #define ADMV1013_MIXER_VGATE_MSK NO_OS_GENMASK(6, 0)
91 
92 /* ADMV1013_REG_OFFSET_ADJUST Map */
93 #define ADMV1013_MIXER_OFF_ADJ_P_MSK NO_OS_GENMASK(15, 9)
94 #define ADMV1013_MIXER_OFF_ADJ_N_MSK NO_OS_GENMASK(8, 2)
95 
96 /* ADMV1013_REG_QUAD Map */
97 #define ADMV1013_QUAD_SE_MODE_MSK NO_OS_GENMASK(9, 6)
98 #define ADMV1013_QUAD_FILTERS_MSK NO_OS_GENMASK(3, 0)
99 
100 /* ADMV1013_REG_VVA_TEMP_COMP Map */
101 #define ADMV1013_VVA_TEMP_COMP_MSK NO_OS_GENMASK(15, 0)
102 
103 /* Specifications */
104 #define ADMV1013_BUFF_SIZE_BYTES 3
105 #define ADMV1013_SPI_READ_CMD NO_OS_BIT(7)
106 #define ADMV1013_SPI_WRITE_CMD (0 << 7)
107 
108 #define MIXER_GATE_0_to_1_8_V(x) ((2389 * x/ 1000000 + 8100) / 100)
109 #define MIXER_GATE_1_8_to_2_6_V(x) ((2375 * x/ 1000000 + 125) / 100)
110 
111 /******************************************************************************/
112 /*************************** Types Declarations *******************************/
113 /******************************************************************************/
114 
122 };
123 
132 };
133 
143 };
144 
153  unsigned long long lo_in;
159  bool det_en;
161  unsigned int vcm_uv;
162 };
163 
168 struct admv1013_dev {
172  unsigned long long lo_in;
178  bool det_en;
180  unsigned int vcm_uv;
181 };
182 
183 /******************************************************************************/
184 /************************ Functions Declarations ******************************/
185 /******************************************************************************/
186 
188 int admv1013_spi_write(struct admv1013_dev *dev, uint8_t reg_addr,
189  uint16_t data);
190 
191 /* ADMV1013 Register Update */
192 int admv1013_spi_update_bits(struct admv1013_dev *dev, uint8_t reg_addr,
193  uint16_t mask, uint16_t data);
194 
196 int admv1013_spi_read(struct admv1013_dev *dev, uint8_t reg_addr,
197  uint16_t *data);
198 
200 int admv1013_set_iq_phase(struct admv1013_dev *dev, uint8_t i_phase,
201  uint8_t q_phase);
202 
204 int admv1013_get_iq_phase(struct admv1013_dev *dev, uint8_t *i_phase,
205  uint8_t *q_phase);
206 
208 int admv1013_set_iq_offset(struct admv1013_dev *dev, uint8_t i_offset_p,
209  uint8_t i_offset_n, uint8_t q_offset_p,
210  uint8_t q_offset_n);
211 
213 int admv1013_get_iq_offset(struct admv1013_dev *dev, uint8_t *i_offset_p,
214  uint8_t *i_offset_n, uint8_t *q_offset_p,
215  uint8_t *q_offset_n);
216 
218 int admv1013_init(struct admv1013_dev **device,
220 
222 int admv1013_remove(struct admv1013_dev *dev);
223 
224 #endif /* ADMV1013_H_ */
ADMV1013_REG_OFFSET_ADJUST_I
#define ADMV1013_REG_OFFSET_ADJUST_I
Definition: admv1013.h:62
ADMV1013_REG_LO_AMP_Q
#define ADMV1013_REG_LO_AMP_Q
Definition: admv1013.h:61
ADMV1013_QUAD_FILTERS_MSK
#define ADMV1013_QUAD_FILTERS_MSK
Definition: admv1013.h:98
admv1013_quad_se_mode
admv1013_quad_se_mode
Switch Differential/Single-Ended Modes.
Definition: admv1013.h:128
admv1013_init_param::spi_init
struct no_os_spi_init_param * spi_init
Definition: admv1013.h:151
ADMV1013_MIXER_VGATE_MSK
#define ADMV1013_MIXER_VGATE_MSK
Definition: admv1013.h:90
ADMV1013_QUAD_SE_MODE_MSK
#define ADMV1013_QUAD_SE_MODE_MSK
Definition: admv1013.h:97
ADMV1013_IF_MODE
@ ADMV1013_IF_MODE
Definition: admv1013.h:121
admv1013_init_param::lo_in
unsigned long long lo_in
Definition: admv1013.h:153
ADMV1013_SPI_READ_CMD
#define ADMV1013_SPI_READ_CMD
Definition: admv1013.h:105
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:95
ADMV1013_IQ_MODE
@ ADMV1013_IQ_MODE
Definition: admv1013.h:120
no_os_spi.h
Header file of SPI Interface.
ADMV1013_SPI_WRITE_CMD
#define ADMV1013_SPI_WRITE_CMD
Definition: admv1013.h:106
admv1013_init
int admv1013_init(struct admv1013_dev **device, struct admv1013_init_param *init_param)
Initializes the admv1013.
Definition: admv1013.c:299
admv1013_spi_update_bits
int admv1013_spi_update_bits(struct admv1013_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
Update ADMV1013 register.
Definition: admv1013.c:113
LO_BAND_8_62_TO_10_25_GHZ
@ LO_BAND_8_62_TO_10_25_GHZ
Definition: admv1013.h:139
admv1013_dev::vcm_uv
unsigned int vcm_uv
Definition: admv1013.h:180
admv1013_get_iq_phase
int admv1013_get_iq_phase(struct admv1013_dev *dev, uint8_t *i_phase, uint8_t *q_phase)
Get I/Q Phase Accuracy.
Definition: admv1013.c:209
admv1013.h
Header file for admv1013 Driver.
device
Definition: ad9361_util.h:75
admv1013_get_iq_offset
int admv1013_get_iq_offset(struct admv1013_dev *dev, uint8_t *i_offset_p, uint8_t *i_offset_n, uint8_t *q_offset_p, uint8_t *q_offset_n)
Get I/Q Offset Accuracy.
Definition: admv1013.c:269
admv1013_spi_write
int admv1013_spi_write(struct admv1013_dev *dev, uint8_t reg_addr, uint16_t data)
Writes data to ADMV1013 over SPI.
Definition: admv1013.c:58
ADMV1013_CHIP_ID_MSK
#define ADMV1013_CHIP_ID_MSK
Definition: admv1013.h:70
admv1013_dev::input_mode
enum admv1013_input_mode input_mode
Definition: admv1013.h:174
admv1013_get_iq_offset
int admv1013_get_iq_offset(struct admv1013_dev *dev, uint8_t *i_offset_p, uint8_t *i_offset_n, uint8_t *q_offset_p, uint8_t *q_offset_n)
Get I/Q Offset Accuracy.
Definition: admv1013.c:269
admv1013_remove
int admv1013_remove(struct admv1013_dev *dev)
ADMV1013 Resources Deallocation.
Definition: admv1013.c:387
no_os_field_prep
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)
admv1013_set_iq_offset
int admv1013_set_iq_offset(struct admv1013_dev *dev, uint8_t i_offset_p, uint8_t i_offset_n, uint8_t q_offset_p, uint8_t q_offset_n)
Set I/Q Offset Accuracy.
Definition: admv1013.c:239
ADMV1013_DET_EN_MSK
#define ADMV1013_DET_EN_MSK
Definition: admv1013.h:86
no_os_error.h
Error codes definition.
admv1013_dev::quad_se_mode
enum admv1013_quad_se_mode quad_se_mode
Definition: admv1013.h:176
admv1013_spi_read
int admv1013_spi_read(struct admv1013_dev *dev, uint8_t reg_addr, uint16_t *data)
Reads data from ADMV1013 over SPI.
Definition: admv1013.c:82
admv1013_spi_read
int admv1013_spi_read(struct admv1013_dev *dev, uint8_t reg_addr, uint16_t *data)
Reads data from ADMV1013 over SPI.
Definition: admv1013.c:82
ADMV1013_REG_LO_AMP_I
#define ADMV1013_REG_LO_AMP_I
Definition: admv1013.h:60
ADMV1013_SE_MODE_NEG
@ ADMV1013_SE_MODE_NEG
Definition: admv1013.h:130
admv1013_init_param
ADMV1013 Initialization Parameters structure.
Definition: admv1013.h:149
ADMV1013_REG_QUAD
#define ADMV1013_REG_QUAD
Definition: admv1013.h:64
LO_BAND_6_6_TO_9_2_GHZ
@ LO_BAND_6_6_TO_9_2_GHZ
Definition: admv1013.h:140
admv1013_set_iq_offset
int admv1013_set_iq_offset(struct admv1013_dev *dev, uint8_t i_offset_p, uint8_t i_offset_n, uint8_t q_offset_p, uint8_t q_offset_n)
Set I/Q Offset Accuracy.
Definition: admv1013.c:239
ADMV1013_SE_MODE_DIFF
@ ADMV1013_SE_MODE_DIFF
Definition: admv1013.h:131
LO_BAND_5_4_TO_8_GHZ
@ LO_BAND_5_4_TO_8_GHZ
Definition: admv1013.h:141
admv1013_dev::lo_in
unsigned long long lo_in
Definition: admv1013.h:172
admv1013_init
int admv1013_init(struct admv1013_dev **device, struct admv1013_init_param *init_param)
Initializes the admv1013.
Definition: admv1013.c:299
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:143
ADMV1013_SE_MODE_POS
@ ADMV1013_SE_MODE_POS
Definition: admv1013.h:129
admv1013_dev
ADMV1013 Device Descriptor.
Definition: admv1013.h:168
admv1013_set_iq_phase
int admv1013_set_iq_phase(struct admv1013_dev *dev, uint8_t i_phase, uint8_t q_phase)
Set I/Q Phase Accuracy.
Definition: admv1013.c:183
admv1013_dev::det_en
bool det_en
Definition: admv1013.h:178
admv1013_get_iq_phase
int admv1013_get_iq_phase(struct admv1013_dev *dev, uint8_t *i_phase, uint8_t *q_phase)
Get I/Q Phase Accuracy.
Definition: admv1013.c:209
admv1013_init_param::input_mode
enum admv1013_input_mode input_mode
Definition: admv1013.h:155
admv1013_init_param::quad_se_mode
enum admv1013_quad_se_mode quad_se_mode
Definition: admv1013.h:157
ADMV1013_REG_SPI_CONTROL
#define ADMV1013_REG_SPI_CONTROL
Definition: admv1013.h:56
ADMV1013_REG_OFFSET_ADJUST_Q
#define ADMV1013_REG_OFFSET_ADJUST_Q
Definition: admv1013.h:63
ADMV1013_LOAMP_PH_ADJ_FINE_MSK
#define ADMV1013_LOAMP_PH_ADJ_FINE_MSK
Definition: admv1013.h:89
no_os_field_get
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
ADMV1013_MIXER_OFF_ADJ_P_MSK
#define ADMV1013_MIXER_OFF_ADJ_P_MSK
Definition: admv1013.h:93
admv1013_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: admv1013.h:170
admv1013_input_mode
admv1013_input_mode
Switch Intermediate Frequency or I/Q Mode.
Definition: admv1013.h:119
admv1013_init_param::det_en
bool det_en
Definition: admv1013.h:159
NO_OS_BIT
#define NO_OS_BIT(x)
Definition: no_os_util.h:51
ADMV1013_BUFF_SIZE_BYTES
#define ADMV1013_BUFF_SIZE_BYTES
Definition: admv1013.h:104
admv1013_set_iq_phase
int admv1013_set_iq_phase(struct admv1013_dev *dev, uint8_t i_phase, uint8_t q_phase)
Set I/Q Phase Accuracy.
Definition: admv1013.c:183
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:96
admv1013_init_param::vcm_uv
unsigned int vcm_uv
Definition: admv1013.h:161
admv1013_quad_filters
admv1013_quad_filters
LO Filters BW Selection.
Definition: admv1013.h:138
ADMV1013_SPI_SOFT_RESET_MSK
#define ADMV1013_SPI_SOFT_RESET_MSK
Definition: admv1013.h:69
ADMV1013_REG_VVA_TEMP_COMP
#define ADMV1013_REG_VVA_TEMP_COMP
Definition: admv1013.h:65
ADMV1013_MIXER_IF_EN_MSK
#define ADMV1013_MIXER_IF_EN_MSK
Definition: admv1013.h:85
admv1013_spi_write
int admv1013_spi_write(struct admv1013_dev *dev, uint8_t reg_addr, uint16_t data)
Writes data to ADMV1013 over SPI.
Definition: admv1013.c:58
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:77
MIXER_GATE_1_8_to_2_6_V
#define MIXER_GATE_1_8_to_2_6_V(x)
Definition: admv1013.h:109
ADMV1013_CHIP_ID
#define ADMV1013_CHIP_ID
Definition: admv1013.h:71
admv1013_remove
int admv1013_remove(struct admv1013_dev *dev)
ADMV1013 Resources Deallocation.
Definition: admv1013.c:387
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
no_os_util.h
Header file of utility functions.
MIXER_GATE_0_to_1_8_V
#define MIXER_GATE_0_to_1_8_V(x)
Definition: admv1013.h:108
ADMV1013_REG_ENABLE
#define ADMV1013_REG_ENABLE
Definition: admv1013.h:59
ADMV1013_MIXER_OFF_ADJ_N_MSK
#define ADMV1013_MIXER_OFF_ADJ_N_MSK
Definition: admv1013.h:94
admv1013_spi_update_bits
int admv1013_spi_update_bits(struct admv1013_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
Update ADMV1013 register.
Definition: admv1013.c:113
LO_BAND_5_4_TO_7_GHZ
@ LO_BAND_5_4_TO_7_GHZ
Definition: admv1013.h:142
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:121