adxl313.h

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/***************************************************************************/
#ifndef __ADXL313_H__
#define __ADXL313_H__
 
/******************************************************************************/
/***************************** Include Files **********************************/
/******************************************************************************/
#include <stdint.h>
#include <string.h>
#include "no_os_util.h"
#include "no_os_i2c.h"
#include "no_os_spi.h"
 
/******************************************************************************/
/********************** Macros and Constants Definitions **********************/
/******************************************************************************/
/* SPI commands */
#define ADXL313_SPI_READ                    (0x80)
#define ADXL313_SPI_WRITE                   (0x00)
#define ADXL313_MULTIBIT                    NO_OS_BIT(6)
 
/* ADXL313 register map */
#define ADXL313_REG_DEVID_AD                    0x00
#define ADXL313_REG_DEVID1_AD                   0x01
#define ADXL313_REG_PARTID                  0x02
#define ADXL313_REG_REVID                   0x03
#define ADXL313_REG_XID                     0x04
#define ADXL313_REG_SOFT_RESET                  0x18
#define ADXL313_REG_OFS_AXIS(index)             (0x1E + (index))
#define ADXL313_REG_THRESH_ACT                  0x24
#define ADXL313_REG_THRESH_INACT                0x25
#define ADXL313_REG_TIME_INACT                  0x26
#define ADXL313_REG_ACT_INACT_CTL               0x27
#define ADXL313_REG_BW_RATE                 0x2C
#define ADXL313_REG_POWER_CTL                   0x2D
#define ADXL313_REG_INT_EN                  0x2E
#define ADXL313_REG_INT_MAP                 0x2F
#define ADXL313_REG_INT_SRC                 0x30
#define ADXL313_REG_DATA_FORMAT                 0x31
#define ADXL313_REG_DATA_AXIS(index)                (0x32 + ((index) * 2))
#define ADXL313_REG_FIFO_CTL                    0x38
#define ADXL313_REG_FIFO_STATUS                 0x39
 
/* ADXL313_REG_DEVID_AD value */
#define ADXL313_DEVID                       0xAD
/* ADXL313_REG_DEVID1_AD value */
#define ADXL313_DEVID1                      0x1D
/* ADXL313_REG_PARTID value, 0xCB, 313 in octal */
#define ADXL313_PARTID                      0xCB
/* ADXL314_DEVID_AD value, same as ADXL312 */
#define ADXL314_DEVID                       0xE5
 
/* ADXL313 reset key */
#define ADXL313_RESET_KEY                   0x52
 
/* Maximum number of FIFO samples */
#define ADXL313_MAX_FIFO_SAMPLES_VAL                0x60
 
/* Device bandwidth settings, ADXL313_REG_BW_RATE definitions */
#define ADXL313_RATE_MSK                    NO_OS_GENMASK(3, 0)
#define ADXL313_LOW_POWER_OP                    NO_OS_BIT(4)
 
/* ADXL313_REG_POWER_CTL definitions */
#define ADXL313_POWER_CTL_I2C_DISABLE               NO_OS_BIT(6)
#define ADXL313_POWER_CTL_LINK                  NO_OS_BIT(5)
#define ADXL313_POWER_CTL_AUTO_SLEEP                NO_OS_BIT(4)
#define ADXL313_POWER_CTL_MEASURE               NO_OS_BIT(3)
#define ADXL313_POWER_CTL_SLEEP                 NO_OS_BIT(2)
#define ADXL313_POWER_CTL_WAKEUP(x)             ((x) & 0x3)
 
/* ADXL313_REG_INT_EN definitions */
#define ADXL313_REG_INT_EN_DATA_READY               NO_OS_BIT(7)
#define ADXL313_REG_INT_EN_ACTIVITY             NO_OS_BIT(4)
#define ADXL313_REG_INT_EN_INACTIVITY               NO_OS_BIT(3)
#define ADXL313_REG_INT_EN_WATERMARK                NO_OS_BIT(1)
#define ADXL313_REG_INT_EN_OVERRUN              NO_OS_BIT(0)
 
/* ADXL313_REG_INT_MAP definitions */
#define ADXL313_REG_INT_MAP_DR_INT2             NO_OS_BIT(7)
#define ADXL313_REG_INT_MAP_ACT_INT2                NO_OS_BIT(4)
#define ADXL313_REG_INT_MAP_INACT_INT2              NO_OS_BIT(3)
#define ADXL313_REG_INT_MAP_WM_INT2             NO_OS_BIT(1)
#define ADXL313_REG_INT_MAP_OVER_INT2               NO_OS_BIT(0)
 
/* ADXL313_REG_INT_SRC definitions */
#define ADXL313_REG_INT_SRC_DATA_READY              NO_OS_BIT(7)
#define ADXL313_REG_INT_SRC_ACTIVITY                NO_OS_BIT(4)
#define ADXL313_REG_INT_SRC_INACTIVITY              NO_OS_BIT(3)
#define ADXL313_REG_INT_SRC_WATERMARK               NO_OS_BIT(1)
#define ADXL313_REG_INT_SRC_OVERRUN             NO_OS_BIT(0)
 
/* ADXL313_REG_DATA_FORMAT definitions */
#define ADXL313_REG_DATA_FORMAT_SELF_TEST           NO_OS_BIT(7)
#define ADXL313_REG_DATA_FORMAT_SPI_3WIRE           NO_OS_BIT(6)
#define ADXL313_REG_DATA_FORMAT_INT_INV             NO_OS_BIT(5)
#define ADXL313_REG_DATA_FORMAT_FULL_RES            NO_OS_BIT(3)
#define ADXL313_REG_DATA_FORMAT_JUSTIFY_BIT         NO_OS_BIT(2)
#define ADXL313_REG_DATA_FORMAT_RANGE               NO_OS_GENMASK(1, 0)
 
/* ADXL313_REG_FIFO_CTL definitions */
#define ADXL313_REG_FIFO_CTL_MODE_MSK               NO_OS_GENMASK(7, 6)
#define ADXL313_REG_FIFO_CTL_TRIGGER_BIT            NO_OS_BIT(5)
#define ADXL313_REG_FIFO_CTL_SAMPLES_MSK            NO_OS_GENMASK(4, 0)
 
/* ADXL313_REG_FIFO_STATUS definitions */
#define ADXL313_REG_FIFO_FIFO_TRIGGER_BIT           NO_OS_BIT(7)
#define ADXL313_REG_FIFO_STS_ENTRIES_MSK            NO_OS_GENMASK(5, 0)
 
/*
 * ADXL312
 * At all g ranges with full bit resolution, sensitivity is given in datasheet as
 * 2.9 mg/LSB = 0.0029000 * 9.80665 = 0.0284392850 m/s^2.
 */
#define ADXL312_ACC_SCALE_FACTOR_MUL_FULL_RES           ((int64_t)28439285ULL)
 
/*
 * ADXL313
 * At all g ranges with full bit resolution, sensitivity is given in datasheet as
 * 1024 LSB/g = 0.0009765625 * 9.80665 = 0.00957680664 m/s^2.
 *
 * For +/- 2g range, a multiplier with value 2 is used.
 * For +/- 2g range, a multiplier with value 4 is used.
 * For +/- 4g range, a multiplier with value 8 is used.
 *
 */
#define ADXL313_ACC_SCALE_FACTOR_MUL_FULL_RES           ((int64_t)957680664ULL)
/* Divider used for dividing of multiplier.
 * Multiplication with 100 was used for preserving precision. */
#define ADXL313_ACC_SCALE_FACTOR_MUL_DIVIDER            ((int32_t)100)
 
/*
 * ADXL314
 * At +/-200g with 13-bit resolution, scale factor is given in datasheet as
 * 48.83 mg/LSB = 0.0488300 * 9.80665 = 0.4788587195 m/s^2.
 */
#define ADXL314_ACC_SCALE_FACTOR_MUL                ((int64_t)478858719ULL)
#define ADXL313_ACC_SCALE_FACTOR_DIV                ((int32_t)1000000000)
 
/* ADXL312
 * The scale factor of the offset adjustment, in g / 1000 000 (ug) */
#define ADXL312_OFFSET_SCALE_FACTOR             11600
 
/* ADXL313
 * The scale factor of the offset adjustment, in g / 1000 000 (ug) */
#define ADXL313_OFFSET_SCALE_FACTOR             3900
 
/* ADXL314
 * The scale factor of the offset adjustment, in g / 1000 000 (ug) */
#define ADXL314_OFFSET_SCALE_FACTOR             195000
 
/* ADXL312
 * The scale factor of the activity/inactivity thresholds, in g / 1000 000 (ug) */
#define ADXL312_THRESH_SCALE_FACTOR             46400
 
/* ADXL313
 * The scale factor of the activity/inactivity thresholds, in g / 1000 000 (ug) */
#define ADXL313_THRESH_SCALE_FACTOR             15625
 
/* ADXL314
 * The scale factor of the activity/inactivity thresholds, in g / 1000 000 (ug) */
#define ADXL314_THRESH_SCALE_FACTOR             784000
 
/* Offset added to the ODR enum for obtaining corresponding register setting */
#define ADXL313_ODR_OFFSET_VAL                  6
 
/* Number of registers read for all axes */
#define ADXL313_REGS_PER_ENTRY                  6
 
/* Max number of FIFO entries */
#define ADXL313_MAX_FIFO_ENTRIES                32
 
/* Number of Self-test samples */
#define ADXL313_SELF_TEST_SAMPLES               10
 
/* Self-test multiplication factor */
#define ADXL312_SELF_TEST_MULT                  2900
#define ADXL313_SELF_TEST_MULT                  976
#define ADXL314_SELF_TEST_MULT                  4883
#define ADXL313_SELF_TEST_DIV                   1000
 
/* Self-test minimum deviation for ADXL312, mg */
#define ADXL312_SELF_TEST_MIN_DEVIATION             300
/* Self-test maximum deviation for ADXL312, mg */
#define ADXL312_SELF_TEST_MAX_DEVIATION             3400
 
/* Self-test minimum deviation for ADXL313, mg */
#define ADXL313_SELF_TEST_MIN_DEVIATION             300
/* Self-test maximum deviation for ADXL313, mg */
#define ADXL313_SELF_TEST_MAX_DEVIATION             3700
 
/* Self-test minimum deviation for ADXL314, mg */
#define ADXL314_SELF_TEST_MIN_DEVIATION             100
/* Self-test maximum deviation for ADXL314, mg */
#define ADXL314_SELF_TEST_MAX_DEVIATION             8000
 
/* Factor used for distinguishing between ADXL312 and ADXL313 ranges */
#define ADXL313_RANGE_FACTOR                    4
 
/* Activity/inactivity detection defines */
/* Enable axis for participating in act/inact detection */
#define ADXL313_X_EN                            NO_OS_BIT(1)
#define ADXL313_Y_EN                            NO_OS_BIT(2)
#define ADXL313_Z_EN                            NO_OS_BIT(3)
 
/******************************************************************************/
/*************************** Types Declarations *******************************/
/******************************************************************************/
 
enum adxl313_type {
    ID_ADXL312 = 0,
    ID_ADXL313 = 1,
    ID_ADXL314 = 2
};
 
enum adxl313_comm_type {
    ADXL313_SPI_COMM = 0,
    ADXL313_I2C_COMM = 1
};
 
enum adxl313_op_mode {
    ADXL313_STDBY = 0,
    ADXL313_MEAS = 1
};
 
enum adxl313_lp_mode {
    ADXL313_LP_MODE_NONE = 0,
    ADXL313_LP_MODE_ON = 1,
    ADXL313_LP_MODE_AUTOSLEEP = 2
};
 
enum adxl313_wake_up_f {
    ADXL313_WU_8_HZ = 0,
    ADXL313_WU_4_HZ = 1,
    ADXL313_WU_2_HZ = 2,
    ADXL313_WU_1_HZ = 3
};
 
enum adxl313_range {
    ADXL313_0_5G_RANGE = 0,
    ADXL313_1G_RANGE = 1,
    ADXL313_2G_RANGE = 2,
    ADXL313_4G_RANGE = 3,
    ADXL313_1_5G_RANGE = 4,
    ADXL313_3G_RANGE = 5,
    ADXL313_6G_RANGE = 6,
    ADXL313_12G_RANGE = 7,
    ADXL313_200G_RANGE = 8
};
 
enum adxl313_resolution {
    ADXL313_10_BIT_RES = 0,
    ADXL313_11_BIT_RES = 1,
    ADXL313_12_BIT_RES = 2,
    ADXL313_13_BIT_RES = 3
};
 
enum adxl313_odr {
    ADXL313_ODR_6_25HZ = 0,
    ADXL313_ODR_12_5HZ = 1,
    ADXL313_ODR_25HZ = 2,
    ADXL313_ODR_50HZ = 3,
    ADXL313_ODR_100HZ = 4,
    ADXL313_ODR_200HZ = 5,
    ADXL313_ODR_400HZ = 6,
    ADXL313_ODR_800HZ = 7,
    ADXL313_ODR_1600HZ = 8,
    ADXL313_ODR_3200HZ = 9
};
 
enum adxl313_axis {
    ADXL313_X_AXIS = 0,
    ADXL313_Y_AXIS = 1,
    ADXL313_Z_AXIS = 2
};
 
enum adxl313_fifo_mode {
    ADXL313_BYPAS_MODE = 0,
    ADXL313_FIFO_MODE = 1,
    ADXL313_STREAM_MODE = 2,
    ADXL313_TRIGGERED_MODE = 3
};
 
enum adxl313_int_pol {
    ADXL313_INT_ACTIVE_HIGH = 0,
    ADXL313_INT_ACTIVE_LOW = 1
};
 
enum bit_action {
    DISABLE_E = 0,
    ENABLE_E = 1
};
 
union adxl313_comm_init_param {
    struct no_os_i2c_init_param i2c_init;
    struct no_os_spi_init_param spi_init;
} ;
 
struct adxl313_frac_repr {
    int64_t integer;
    int32_t fractional;
};
 
struct adxl313_init_param {
    union adxl313_comm_init_param comm_init;
    enum adxl313_comm_type comm_type;
    enum adxl313_type dev_type;
};
 
struct _adxl313_int_reg_flags {
    uint8_t OVERRUN    : 1;
    uint8_t WATERMARK  : 1;
    uint8_t reserved   : 1;
    uint8_t INACTIVITY : 1;
    uint8_t ACTIVITY   : 1;
    uint8_t reserved1  : 2;
    uint8_t DATA_READY : 1;
};
 
union adxl313_int_en_reg_flags {
    struct _adxl313_int_reg_flags fields;
    uint8_t value;
};
 
union adxl313_int_map_reg_flags {
    struct _adxl313_int_reg_flags fields;
    uint8_t value;
};
 
union adxl313_int_src_reg_flags {
    struct _adxl313_int_reg_flags fields;
    uint8_t value;
};
 
struct _adxl313_act_inact_ctl_flags {
    uint8_t INACT_Z_EN     : 1;
    uint8_t INACT_Y_EN     : 1;
    uint8_t INACT_X_EN     : 1;
    uint8_t INACT_AC_EN    : 1;
    uint8_t ACT_Z_EN       : 1;
    uint8_t ACT_Y_EN       : 1;
    uint8_t ACT_X_EN       : 1;
    uint8_t ACT_AC_EN      : 1;
};
 
union adxl313_act_inact_ctl_flags {
    struct _adxl313_act_inact_ctl_flags fields;
    uint8_t value;
};
 
union adxl313_comm_desc {
    struct no_os_i2c_desc *i2c_desc;
    struct no_os_spi_desc *spi_desc;
};
 
struct adxl313_dev {
    union adxl313_comm_desc com_desc;
    enum adxl313_comm_type comm_type;
    enum adxl313_type dev_type;
    enum adxl313_range range;
    enum adxl313_resolution resolution;
    enum adxl313_op_mode op_mode;
    enum adxl313_lp_mode lp_mode;
    enum adxl313_odr odr;
    uint8_t x_offset_raw;
    uint8_t y_offset_raw;
    uint8_t z_offset_raw;
    int64_t scale_factor_mult;
    enum adxl313_fifo_mode fifo_mode;
    uint8_t fifo_samples;
    uint8_t act_thr;
    uint8_t inact_thr;
    uint8_t time_inact;
    union adxl313_act_inact_ctl_flags act_inact_ctl;
    uint8_t comm_buff[24];
};
 
/******************************************************************************/
/************************ Functions Declarations ******************************/
/******************************************************************************/
int adxl313_init(struct adxl313_dev **device,
         struct adxl313_init_param init_param);
 
int adxl313_remove(struct adxl313_dev *dev);
 
int adxl313_software_reset(struct adxl313_dev *dev);
 
int adxl313_set_op_mode(struct adxl313_dev *dev,
            enum adxl313_op_mode op_mode);
 
int adxl313_get_op_mode(struct adxl313_dev *dev,
            enum adxl313_op_mode *op_mode);
 
int adxl313_set_offset(struct adxl313_dev *dev,
               int32_t offset_ug,
               enum adxl313_axis axis);
 
int adxl313_get_offset(struct adxl313_dev *dev,
               int32_t *offset_ug,
               enum adxl313_axis axis);
 
int adxl313_set_raw_offset(struct adxl313_dev *dev,
               int32_t offset_raw,
               enum adxl313_axis axis);
 
int adxl313_get_raw_offset(struct adxl313_dev *dev,
               int32_t *offset_raw,
               enum adxl313_axis axis);
 
int adxl313_get_raw_xyz(struct adxl313_dev *dev,
            int16_t *x_raw,
            int16_t *y_raw,
            int16_t *z_raw);
 
int adxl313_get_xyz(struct adxl313_dev *dev,
            struct adxl313_frac_repr *x_m_s2,
            struct adxl313_frac_repr *y_m_s2,
            struct adxl313_frac_repr *z_m_s2);
 
int adxl313_get_no_of_fifo_entries(struct adxl313_dev *dev,
                   uint8_t *entries_no);
 
int adxl313_set_fifo_samples(struct adxl313_dev *dev,
                 uint8_t samples_no);
 
int adxl313_set_fifo_mode(struct adxl313_dev *dev,
              enum adxl313_fifo_mode mode);
 
int adxl313_get_raw_fifo_data(struct adxl313_dev *dev, uint8_t *entries,
                  int16_t *x_raw, int16_t *y_raw, int16_t *z_raw);
 
int adxl313_get_fifo_data(struct adxl313_dev *dev,
              uint8_t *entries,
              struct adxl313_frac_repr *x,
              struct adxl313_frac_repr *y,
              struct adxl313_frac_repr *z);
 
int adxl313_conf_act_thr(struct adxl313_dev *dev, uint32_t act_thr_ug);
 
int adxl313_get_act_thr(struct adxl313_dev *dev, uint32_t *act_thr_ug);
 
int adxl313_conf_inact_thr(struct adxl313_dev *dev, uint32_t inact_thr_ug);
 
int adxl313_get_inact_thr(struct adxl313_dev *dev, uint32_t *inact_thr_ug);
 
int adxl313_conf_time_inact(struct adxl313_dev *dev, uint8_t time_inact_s);
 
int adxl313_get_time_inact(struct adxl313_dev *dev, uint8_t *time_inact_s);
 
int adxl313_conf_act_inact_ctl(struct adxl313_dev *dev,
                   union adxl313_act_inact_ctl_flags config);
 
int adxl313_get_conf_act_inact_ctl(struct adxl313_dev *dev,
                   union adxl313_act_inact_ctl_flags *config);
 
int adxl313_set_activity_detection(struct adxl313_dev *dev,
                   uint8_t act_axes,
                   uint8_t act_ac_dc,
                   uint32_t act_thresh_ug,
                   uint8_t int_pin);
 
int adxl313_set_inactivity_detection(struct adxl313_dev *dev,
                     uint8_t inact_axes,
                     uint8_t inact_ac_dc,
                     uint32_t inact_thresh_ug,
                     uint8_t inact_time,
                     uint8_t int_pin);
 
int adxl313_set_odr(struct adxl313_dev *dev, enum adxl313_odr odr);
 
int adxl313_get_odr(struct adxl313_dev *dev, enum adxl313_odr *odr);
 
int adxl313_disable_i2c(struct adxl313_dev *dev);
 
int adxl313_enable_i2c(struct adxl313_dev *dev);
 
int adxl313_set_low_power_mode(struct adxl313_dev *dev,
                   enum bit_action enable);
 
int adxl313_set_autosleep_mode(struct adxl313_dev *dev, enum bit_action enable,
                   uint8_t inact_thr, uint8_t time_inact_s);
 
int adxl313_link_mode_enable(struct adxl313_dev *dev);
 
int adxl313_link_mode_disable(struct adxl313_dev *dev);
 
int adxl313_sleep(struct adxl313_dev *dev, enum adxl313_wake_up_f wake_up_f_hz);
 
int adxl313_exit_sleep(struct adxl313_dev *dev);
 
int adxl313_conf_int_enable(struct adxl313_dev *dev,
                union adxl313_int_en_reg_flags en_ctl);
 
int adxl313_activity_int_enable(struct adxl313_dev *dev);
 
int adxl313_activity_int_disable(struct adxl313_dev *dev);
 
int adxl313_inactivity_int_enable(struct adxl313_dev *dev);
 
int adxl313_inactivity_int_disable(struct adxl313_dev *dev);
 
int adxl313_conf_int_map(struct adxl313_dev *dev,
             union adxl313_int_map_reg_flags int_map);
 
int adxl313_data_ready_int_map(struct adxl313_dev *dev, uint8_t int_pin);
 
int adxl313_activity_int_map(struct adxl313_dev *dev, uint8_t int_pin);
 
int adxl313_inactivity_int_map(struct adxl313_dev *dev, uint8_t int_pin);
 
int adxl313_watermark_int_map(struct adxl313_dev *dev, uint8_t int_pin);
 
int adxl313_overrun_int_map(struct adxl313_dev *dev, uint8_t int_pin);
 
int adxl313_get_int_source_reg(struct adxl313_dev *dev,
                   union adxl313_int_src_reg_flags *int_status_flags);
 
int adxl313_set_int_pol(struct adxl313_dev *dev, enum adxl313_int_pol int_pol);
 
int adxl313_enable_full_res(struct adxl313_dev *dev);
 
int adxl313_disable_full_res(struct adxl313_dev *dev);
 
int adxl313_get_full_res_setting(struct adxl313_dev *dev, uint8_t *full_res);
 
int adxl313_set_range(struct adxl313_dev *dev, enum adxl313_range range);
 
int adxl313_get_range(struct adxl313_dev *dev, enum adxl313_range *range);
 
/* Perform device self-test. */
int adxl313_self_test(struct adxl313_dev *dev);
 
#endif /* __ADXL313_H__ */