no-OS
cf_hdmi.h
Go to the documentation of this file.
1 /***************************************************************************/
41 #ifndef CF_HDMI_H_
42 #define CF_HDMI_H_
43 
44 /******************************************************************************/
45 /***************************** Include Files **********************************/
46 /******************************************************************************/
47 #include "xparameters.h"
48 #include "app_config.h"
49 #include "clk_axi_clkgen.h"
50 
51 /******************************************************************************/
52 /************************** Macros Definitions ********************************/
53 /******************************************************************************/
54 #ifdef XPAR_AXI_HDMI_TX_0_BASEADDR
55 #define CFV_BASEADDR XPAR_AXI_HDMI_TX_0_BASEADDR
56 #else
57 #define CFV_BASEADDR XPAR_AXI_HDMI_CORE_BASEADDR
58 #endif
59 #ifdef XPAR_AXI_SPDIF_TX_0_BASEADDR
60 #define CFA_BASEADDR XPAR_AXI_SPDIF_TX_0_BASEADDR
61 #else
62 #define CFA_BASEADDR XPAR_AXI_SPDIF_TX_CORE_BASEADDR
63 #endif
64 
65 #if defined(PLATFORM_KC705) || defined(PLATFORM_AC701) || \
66  defined(PLATFORM_VC707)
67 #ifdef XPAR_DDR3_SDRAM_S_AXI_BASEADDR
68 #define DDR_BASEADDR XPAR_DDR3_SDRAM_S_AXI_BASEADDR
69 #else
70 #define DDR_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR
71 #endif
72 #elif defined(PLATFORM_ZC702) || defined(PLATFORM_ZC706) || \
73  defined(PLATFORM_ZED)
74 #define DDR_BASEADDR XPAR_DDR_MEM_BASEADDR
75 #endif
76 
77 #if defined(PLATFORM_KC705) || defined(PLATFORM_AC701) || \
78  defined(PLATFORM_VC707)
79 #ifdef XPAR_RS232_UART_1_BASEADDR
80 #define UART_BASEADDR XPAR_RS232_UART_1_BASEADDR
81 #else
82 #define UART_BASEADDR XPAR_AXI_UART_BASEADDR
83 #endif
84 #elif defined(PLATFORM_ZC702) || defined(PLATFORM_ZC706) || \
85  defined(PLATFORM_ZED)
86 #define UART_BASEADDR XPS_UART1_BASEADDR
87 #endif
88 
89 #ifdef XPAR_AXI_VDMA_0_BASEADDR
90 #define VDMA_BASEADDR XPAR_AXI_VDMA_0_BASEADDR
91 #else
92 #define VDMA_BASEADDR XPAR_AXI_HDMI_DMA_BASEADDR
93 #endif
94 
95 #ifdef XPAR_AXI_DMA_0_BASEADDR
96 #define ADMA_BASEADDR XPAR_AXI_DMA_0_BASEADDR
97 #else
98 #if defined(PLATFORM_AC701) || defined(PLATFORM_VC707)
99 #define ADMA_BASEADDR XPAR_AXIDMA_1_BASEADDR
100 #elif defined(PLATFORM_KC705)
101 #define ADMA_BASEADDR XPAR_AXIDMA_0_BASEADDR
102 #endif
103 #endif
104 #if defined(PLATFORM_ZC702) || defined(PLATFORM_ZC706) || \
105  defined(PLATFORM_ZED)
106 #define ADMA_DEVICE_ID XPAR_XDMAPS_1_DEVICE_ID
107 #endif
108 
109 #if defined(PLATFORM_KC705) || defined(PLATFORM_AC701) || \
110  defined(PLATFORM_VC707)
111 #define IIC_BASEADDR XPAR_AXI_IIC_0_BASEADDR
112 #elif defined(PLATFORM_ZC702) || defined(PLATFORM_ZC706) || \
113  defined(PLATFORM_ZED)
114 #define IIC_BASEADDR XPS_I2C0_BASEADDR
115 #endif
116 
117 #define VIDEO_BASEADDR DDR_BASEADDR + 0x2000000
118 #define AUDIO_BASEADDR DDR_BASEADDR + 0x1000000
119 #define A_SAMPLE_FREQ 48000
120 #define A_FREQ 1400
121 #define AUDIO_LENGTH (A_SAMPLE_FREQ/A_FREQ)
122 
123 #define AXI_HDMI_REG_RESET 0x040
124 #define AXI_HDMI_REG_CTRL 0x044
125 #define AXI_HDMI_REG_SOURCE_SEL 0x048
126 #define AXI_HDMI_REG_COLORPATTERN 0x04c
127 #define AXI_HDMI_REG_STATUS 0x05c
128 #define AXI_HDMI_REG_VDMA_STATUS 0x060
129 #define AXI_HDMI_REG_TPM_STATUS 0x064
130 #define AXI_HDMI_REG_HTIMING1 0x400
131 #define AXI_HDMI_REG_HTIMING2 0x404
132 #define AXI_HDMI_REG_HTIMING3 0x408
133 #define AXI_HDMI_REG_VTIMING1 0x440
134 #define AXI_HDMI_REG_VTIMING2 0x444
135 #define AXI_HDMI_REG_VTIMING3 0x448
136 
137 #define AXI_VDMA_REG_DMA_CTRL 0x00
138 #define AXI_VDMA_REG_V_SIZE 0x50
139 #define AXI_VDMA_REG_H_SIZE 0x54
140 #define AXI_VDMA_REG_FRMDLY_STRIDE 0x58
141 #define AXI_VDMA_REG_START_1 0x5C
142 #define AXI_VDMA_REG_START_2 0x60
143 #define AXI_VDMA_REG_START_3 0x64
144 
145 #define AXI_CLKGEN_V2_REG_RESET 0x40
146 #define AXI_CLKGEN_V2_REG_DRP_CNTRL 0x70
147 #define AXI_CLKGEN_V2_REG_DRP_STATUS 0x74
148 
149 #define AXI_CLKGEN_V2_RESET_MMCM_ENABLE (1 << 1)
150 #define AXI_CLKGEN_V2_RESET_ENABLE (1 << 0)
151 
152 #define AXI_CLKGEN_V2_DRP_CNTRL_SEL (1 << 29)
153 #define AXI_CLKGEN_V2_DRP_CNTRL_READ (1 << 28)
154 #define AXI_CLKGEN_V2_DRP_STATUS_BUSY (1 << 16)
155 
156 #define MMCM_REG_CLKOUT0_1 0x08
157 #define MMCM_REG_CLKOUT0_2 0x09
158 #define MMCM_REG_CLK_FB1 0x14
159 #define MMCM_REG_CLK_FB2 0x15
160 #define MMCM_REG_CLK_DIV 0x16
161 #define MMCM_REG_LOCK1 0x18
162 #define MMCM_REG_LOCK2 0x19
163 #define MMCM_REG_LOCK3 0x1a
164 #define MMCM_REG_FILTER1 0x4e
165 #define MMCM_REG_FILTER2 0x4f
166 
175 };
176 
177 /******************************************************************************/
178 /************************ Functions Declarations ******************************/
179 /******************************************************************************/
180 void InitHdmiVideoPcore(unsigned short horizontalActiveTime,
181  unsigned short horizontalBlankingTime,
182  unsigned short horizontalSyncOffset,
183  unsigned short horizontalSyncPulseWidth,
184  unsigned short verticalActiveTime,
185  unsigned short verticalBlankingTime,
186  unsigned short verticalSyncOffset,
187  unsigned short verticalSyncPulseWidth);
188 void SetVideoResolution(struct axi_clkgen *clkgen, unsigned char resolution);
189 void InitHdmiAudioPcore(void);
190 void AudioClick(void);
191 
192 #endif /* CF_HDMI_H_ */
AXI_DMAC_CTRL_ENABLE
#define AXI_DMAC_CTRL_ENABLE
Definition: axi_dmac.h:62
IMG_LENGTH
#define IMG_LENGTH
Definition: cf_hdmi_demo.h:41
ADIHAL_resetHw
adiHalErr_t ADIHAL_resetHw(void *devHalInfo)
Performs a hardware reset on the ADI Device.
Definition: no_os_hal.c:131
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
adiLogLevel_t
adiLogLevel_t
An enumerated type in bit mask format to list the log message categories or groups.
Definition: adi_hal.h:57
AXI_DMAC_REG_X_LENGTH
#define AXI_DMAC_REG_X_LENGTH
Definition: axi_dmac.h:73
adi_hal::log_level
uint32_t log_level
Definition: adi_hal.h:31
V_SYNC_OFFSET
@ V_SYNC_OFFSET
Definition: cf_hdmi.c:73
adi_hal::spi_adrv_desc
struct no_os_spi_desc * spi_adrv_desc
Definition: adi_hal.h:30
AXI_HDMI_REG_SOURCE_SEL
#define AXI_HDMI_REG_SOURCE_SEL
Definition: cf_hdmi.h:125
cf_hdmi.h
SYSREF_CONT_OFF
@ SYSREF_CONT_OFF
Definition: adi_hal.h:69
InitHdmiVideoPcore
void InitHdmiVideoPcore(unsigned short horizontalActiveTime, unsigned short horizontalBlankingTime, unsigned short horizontalSyncOffset, unsigned short horizontalSyncPulseWidth, unsigned short verticalActiveTime, unsigned short verticalBlankingTime, unsigned short verticalSyncOffset, unsigned short verticalSyncPulseWidth)
InitHdmiVideoPcore.
Definition: cf_hdmi.c:167
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:82
AXI_HDMI_REG_HTIMING2
#define AXI_HDMI_REG_HTIMING2
Definition: cf_hdmi.h:131
ADIHAL_wait_us
adiHalErr_t ADIHAL_wait_us(void *devHalInfo, uint32_t time_us)
Delay or sleep for the specified number of microseconds.
Definition: no_os_hal.c:263
no_os_spi.h
Header file of SPI Interface.
adi_hal::gpio_adrv_resetb
struct no_os_gpio_desc * gpio_adrv_resetb
Definition: adi_hal.h:28
ADIHAL_writeToLog
adiHalErr_t ADIHAL_writeToLog(void *devHalInfo, adiLogLevel_t logLevel, uint32_t errorCode, const char *comment)
Writes a character array to a log file to facilitate debugging.
Definition: no_os_hal.c:270
AXI_DMAC_REG_SRC_ADDRESS
#define AXI_DMAC_REG_SRC_ADDRESS
Definition: axi_dmac.h:72
clk_axi_clkgen.h
Driver for the Analog Devices AXI CLKGEN.
no_os_gpio_get_value
int32_t no_os_gpio_get_value(struct no_os_gpio_desc *desc, uint8_t *value)
Get the value of the specified GPIO.
Definition: no_os_gpio.c:177
DDRVideoWr
void DDRVideoWr(unsigned short horizontalActiveTime, unsigned short verticalActiveTime)
DDRVideoWr.
Definition: cf_hdmi.c:90
CFV_BASEADDR
#define CFV_BASEADDR
Definition: cf_hdmi.h:57
toggle
void toggle(struct no_os_gpio_desc *led)
Definition: blinky_example.c:26
AXI_VDMA_REG_START_2
#define AXI_VDMA_REG_START_2
Definition: cf_hdmi.h:142
no_os_delay.h
Header file of Delay functions.
AXI_HDMI_REG_VTIMING2
#define AXI_HDMI_REG_VTIMING2
Definition: cf_hdmi.h:134
axi_clkgen_set_rate
int32_t axi_clkgen_set_rate(struct axi_clkgen *clkgen, uint32_t rate)
axi_clkgen_set_rate
Definition: clk_axi_clkgen.c:418
RESOLUTION_1360x768
@ RESOLUTION_1360x768
Definition: cf_hdmi.h:172
sysrefReqMode_t
sysrefReqMode_t
Definition: adi_hal.h:67
no_os_spi_init_param::mode
enum no_os_spi_mode mode
Definition: no_os_spi.h:120
RESOLUTION_640x480
@ RESOLUTION_640x480
Definition: cf_hdmi.h:168
ADIHAL_openHw
adiHalErr_t ADIHAL_openHw(void *devHalInfo, uint32_t halTimeout_ms)
Performs a platform hardware initialization for the ADI Device.
Definition: no_os_hal.c:62
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
no_os_gpio_init_param::number
int32_t number
Definition: no_os_gpio.h:89
axi_clkgen
Definition: clk_axi_clkgen.h:50
V_SYNC_WIDTH_PULSE
@ V_SYNC_WIDTH_PULSE
Definition: cf_hdmi.c:74
videoResolution
videoResolution
Definition: cf_hdmi.h:167
no_os_spi_init_param::platform_ops
const struct no_os_spi_platform_ops * platform_ops
Definition: no_os_spi.h:123
SYSREF_PULSE
@ SYSREF_PULSE
Definition: adi_hal.h:70
RESOLUTION_800x600
@ RESOLUTION_800x600
Definition: cf_hdmi.h:169
ADIHAL_spiWriteBytes
adiHalErr_t ADIHAL_spiWriteBytes(void *devHalInfo, uint16_t *addr, uint8_t *data, uint32_t count)
Writes an array of SPI writes to an ADI Device.
Definition: no_os_hal.c:182
AXI_DMAC_REG_SRC_STRIDE
#define AXI_DMAC_REG_SRC_STRIDE
Definition: axi_dmac.h:76
ADIHAL_closeHw
adiHalErr_t ADIHAL_closeHw(void *devHalInfo)
Closes any platform hardware drivers, handles, etc that were necessary for the ADI Device.
Definition: no_os_hal.c:114
adi_hal.h
Contains Talise ADI HAL function prototypes type definitions for adi_hal.c.
main
int main(int argc, char *argv[])
Definition: blinky_example.c:34
InitHdmiVideoPcore
void InitHdmiVideoPcore(unsigned short horizontalActiveTime, unsigned short horizontalBlankingTime, unsigned short horizontalSyncOffset, unsigned short horizontalSyncPulseWidth, unsigned short verticalActiveTime, unsigned short verticalBlankingTime, unsigned short verticalSyncOffset, unsigned short verticalSyncPulseWidth)
InitHdmiVideoPcore.
Definition: cf_hdmi.c:167
no_os_gpio_init_param::platform_ops
const struct no_os_gpio_platform_ops * platform_ops
Definition: no_os_gpio.h:93
H_BLANKING_TIME
@ H_BLANKING_TIME
Definition: cf_hdmi.c:68
adi_hal::spi_adrv_csn
uint8_t spi_adrv_csn
Definition: adi_hal.h:33
xil_gpio_ops
const struct no_os_gpio_platform_ops xil_gpio_ops
Xilinx platform specific gpio platform ops structure.
Definition: xilinx_gpio.c:455
NO_OS_GPIO_LOW
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
altera_spi_ops
const struct no_os_spi_platform_ops altera_spi_ops
Altera platform specific SPI platform ops structure.
Definition: altera_spi.c:161
no_os_spi_init_param::device_id
uint32_t device_id
Definition: no_os_spi.h:114
AXI_VDMA_REG_DMA_CTRL
#define AXI_VDMA_REG_DMA_CTRL
Definition: cf_hdmi.h:137
adi_hal::extra_spi
void * extra_spi
Definition: adi_hal.h:32
no_os_spi_init_param::chip_select
uint8_t chip_select
Definition: no_os_spi.h:118
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
PIXEL_CLOCK
@ PIXEL_CLOCK
Definition: cf_hdmi.c:66
no_os_error.h
Error codes definition.
AXI_HDMI_REG_HTIMING3
#define AXI_HDMI_REG_HTIMING3
Definition: cf_hdmi.h:132
ADIHAL_spiReadByte
adiHalErr_t ADIHAL_spiReadByte(void *devHalInfo, uint16_t addr, uint8_t *readdata)
Performs a Single SPI Read from an ADI Device.
Definition: no_os_hal.c:197
DDRAudioWr
void DDRAudioWr(void)
DDRAudioWr.
Definition: cf_hdmi.c:128
altera_gpio_ops
const struct no_os_gpio_platform_ops altera_gpio_ops
Altera platform specific GPIO platform ops structure.
Definition: altera_gpio.c:258
u32
unsigned long u32
Definition: wrapper.h:155
V_ACTIVE_TIME
@ V_ACTIVE_TIME
Definition: cf_hdmi.c:71
AudioClick
void AudioClick(void)
AudioClick.
Definition: cf_hdmi.c:301
detailedTimingElement
detailedTimingElement
Definition: cf_hdmi.c:65
ADIHAL_GEN_SW
@ ADIHAL_GEN_SW
Definition: adi_hal.h:48
AXI_DMAC_REG_TRANSFER_SUBMIT
#define AXI_DMAC_REG_TRANSFER_SUBMIT
Definition: axi_dmac.h:67
AUDIO_BASEADDR
#define AUDIO_BASEADDR
Definition: cf_hdmi.h:118
parameters.h
Platform dependent parameters.
AudioClick
void AudioClick(void)
AudioClick.
Definition: cf_hdmi.c:301
SetVideoResolution
void SetVideoResolution(struct axi_clkgen *clkgen, unsigned char resolution)
SetVideoResolution.
Definition: cf_hdmi.c:263
axi_dmac.h
Driver for the Analog Devices AXI-DMAC core.
RESOLUTION_1280x720
@ RESOLUTION_1280x720
Definition: cf_hdmi.h:171
initPower
int initPower()
Definition: blinky_example.c:12
AXI_HDMI_REG_VTIMING1
#define AXI_HDMI_REG_VTIMING1
Definition: cf_hdmi.h:133
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:95
ADIHAL_LOG_WARN
@ ADIHAL_LOG_WARN
Definition: adi_hal.h:60
ADIHAL_OK
@ ADIHAL_OK
Definition: adi_hal.h:43
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
RESOLUTION_1600x900
@ RESOLUTION_1600x900
Definition: cf_hdmi.h:173
V_BLANKING_TIME
@ V_BLANKING_TIME
Definition: cf_hdmi.c:72
app_config.h
Config file of ADV7511 no-OS project.
AXI_VDMA_REG_V_SIZE
#define AXI_VDMA_REG_V_SIZE
Definition: cf_hdmi.h:138
VIDEO_BASEADDR
#define VIDEO_BASEADDR
Definition: cf_hdmi.h:117
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
H_SYNC_OFFSET
@ H_SYNC_OFFSET
Definition: cf_hdmi.c:69
AXI_HDMI_REG_HTIMING1
#define AXI_HDMI_REG_HTIMING1
Definition: cf_hdmi.h:130
no_os_spi_init_param::max_speed_hz
uint32_t max_speed_hz
Definition: no_os_spi.h:116
AXI_VDMA_REG_FRMDLY_STRIDE
#define AXI_VDMA_REG_FRMDLY_STRIDE
Definition: cf_hdmi.h:140
adi_hal
Definition: adi_hal.h:27
ADIHAL_setTimeout
adiHalErr_t ADIHAL_setTimeout(void *devHalInfo, uint32_t halTimeout_ms)
Sets the a timeout duration for the HAL functions.
Definition: no_os_hal.c:57
AXI_DMAC_REG_FLAGS
#define AXI_DMAC_REG_FLAGS
Definition: axi_dmac.h:70
adi_hal::gpio_adrv_resetb_num
uint8_t gpio_adrv_resetb_num
Definition: adi_hal.h:35
ADIHAL_spiWriteField
adiHalErr_t ADIHAL_spiWriteField(void *devHalInfo, uint16_t addr, uint8_t fieldVal, uint8_t mask, uint8_t startBit)
Performs a write to the specified field in a SPI register.
Definition: no_os_hal.c:233
DMA_CYCLIC
@ DMA_CYCLIC
Definition: axi_dmac.h:95
no_os_udelay
void no_os_udelay(uint32_t usecs)
Wait until usecs microseconds passed.
Definition: aducm3029_delay.c:120
aducm_gpio_ops
const struct no_os_gpio_platform_ops aducm_gpio_ops
ADuCM3029 platform specific GPIO platform ops structure.
Definition: aducm3029_gpio.c:290
AXI_HDMI_REG_RESET
#define AXI_HDMI_REG_RESET
Definition: cf_hdmi.h:123
NULL
#define NULL
Definition: wrapper.h:64
xil_spi_ops
const struct no_os_spi_platform_ops xil_spi_ops
Spi engine platform specific SPI platform ops structure.
Definition: xilinx_spi.c:456
no_os_gpio_set_value
int32_t no_os_gpio_set_value(struct no_os_gpio_desc *desc, uint8_t value)
Set the value of the specified GPIO.
Definition: no_os_gpio.c:160
adi_hal::gpio_adrv_sysref_req
struct no_os_gpio_desc * gpio_adrv_sysref_req
Definition: adi_hal.h:29
InitHdmiAudioPcore
void InitHdmiAudioPcore(void)
InitHdmiAudioPcore.
Definition: cf_hdmi.c:279
ADIHAL_spiWriteByte
adiHalErr_t ADIHAL_spiWriteByte(void *devHalInfo, uint16_t addr, uint8_t data)
Performs a Single SPI write to an ADI Device.
Definition: no_os_hal.c:164
ADIHAL_spiReadBytes
adiHalErr_t ADIHAL_spiReadBytes(void *devHalInfo, uint16_t *addr, uint8_t *readdata, uint32_t count)
Performs a Multi SPI Read from an ADI Device.
Definition: no_os_hal.c:218
AUDIO_LENGTH
#define AUDIO_LENGTH
Definition: cf_hdmi.h:121
adi_hal::extra_gpio
void * extra_gpio
Definition: adi_hal.h:34
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:70
SYSREF_CONT_ON
@ SYSREF_CONT_ON
Definition: adi_hal.h:68
AXI_VDMA_REG_START_1
#define AXI_VDMA_REG_START_1
Definition: cf_hdmi.h:141
no_os_gpio_init_param::extra
void * extra
Definition: no_os_gpio.h:95
AXI_DMAC_REG_CTRL
#define AXI_DMAC_REG_CTRL
Definition: axi_dmac.h:61
ADIHAL_ERR
@ ADIHAL_ERR
Definition: adi_hal.h:50
no_os_gpio.h
Header file of GPIO Interface.
AXI_VDMA_REG_H_SIZE
#define AXI_VDMA_REG_H_SIZE
Definition: cf_hdmi.h:139
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:51
DMA_LAST
@ DMA_LAST
Definition: axi_dmac.h:96
VDMA_BASEADDR
#define VDMA_BASEADDR
Definition: cf_hdmi.h:92
RESOLUTION_1920x1080
@ RESOLUTION_1920x1080
Definition: cf_hdmi.h:174
ADIHAL_SPI_FAIL
@ ADIHAL_SPI_FAIL
Definition: adi_hal.h:44
SetVideoResolution
void SetVideoResolution(struct axi_clkgen *clkgen, unsigned char resolution)
SetVideoResolution.
Definition: cf_hdmi.c:263
AXI_HDMI_REG_VTIMING3
#define AXI_HDMI_REG_VTIMING3
Definition: cf_hdmi.h:135
ADIHAL_sysrefReq
adiHalErr_t ADIHAL_sysrefReq(void *devHalInfo, sysrefReqMode_t mode)
Performs a SYSREF request to the clock generation device.
Definition: no_os_hal.c:145
no_os_spi_init_param::extra
void * extra
Definition: no_os_spi.h:125
NO_OS_SPI_MODE_0
@ NO_OS_SPI_MODE_0
Definition: no_os_spi.h:66
aducm3029_gpio.h
InitHdmiAudioPcore
void InitHdmiAudioPcore(void)
InitHdmiAudioPcore.
Definition: cf_hdmi.c:279
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:124
RESOLUTION_1024x768
@ RESOLUTION_1024x768
Definition: cf_hdmi.h:170
ADIHAL_spiReadField
adiHalErr_t ADIHAL_spiReadField(void *devHalInfo, uint16_t addr, uint8_t *fieldVal, uint8_t mask, uint8_t startBit)
Performs a read from a particular bit field in a SPI register.
Definition: no_os_hal.c:248
AXI_DMAC_REG_Y_LENGTH
#define AXI_DMAC_REG_Y_LENGTH
Definition: axi_dmac.h:74
ADIHAL_setLogLevel
adiHalErr_t ADIHAL_setLogLevel(void *devHalInfo, uint16_t logLevel)
Writes a character array to a log file to facilitate debugging.
Definition: no_os_hal.c:288
AXI_VDMA_REG_START_3
#define AXI_VDMA_REG_START_3
Definition: cf_hdmi.h:143
ADIHAL_LOG_ERR
@ ADIHAL_LOG_ERR
Definition: adi_hal.h:61
SYSREF_REQ_GPIO
#define SYSREF_REQ_GPIO
Definition: parameters.h:173
H_SYNC_WIDTH_PULSE
@ H_SYNC_WIDTH_PULSE
Definition: cf_hdmi.c:70
H_ACTIVE_TIME
@ H_ACTIVE_TIME
Definition: cf_hdmi.c:67
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:112
CFA_BASEADDR
#define CFA_BASEADDR
Definition: cf_hdmi.h:62
cf_hdmi_demo.h
adiHalErr_t
adiHalErr_t
Enum of possible Errors Detected by HAL layer to be communicated to ADI APIs.
Definition: adi_hal.h:42