no-OS
ad411x_regs.h
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1 /***************************************************************************/
34 #ifndef AD4111_CFG_H_
35 #define AD4111_CFG_H_
36 
37 #include "ad717x.h"
38 
40  { AD717X_STATUS_REG, 0x00, 1 },
41  {
44  2
45  },
46  { AD717X_IFMODE_REG, 0x0000, 2 },
47  { AD717X_REGCHECK_REG, 0x0000, 3 },
48  { AD717X_DATA_REG, 0x0000, 3 },
49  {
52  2
53  },
54  { AD717X_ID_REG, 0x0000, 2 },
55  { AD717X_CHMAP0_REG, 0x0000, 2 },
56  { AD717X_CHMAP1_REG, 0x0000, 2 },
57  { AD717X_CHMAP2_REG, 0x0000, 2 },
58  { AD717X_CHMAP3_REG, 0x0000, 2 },
59  { AD717X_CHMAP4_REG, 0x0000, 2 },
60  { AD717X_CHMAP5_REG, 0x0000, 2 },
61  { AD717X_CHMAP6_REG, 0x0000, 2 },
62  { AD717X_CHMAP7_REG, 0x0000, 2 },
63  { AD717X_CHMAP8_REG, 0x0000, 2 },
64  { AD717X_CHMAP9_REG, 0x0000, 2 },
65  { AD717X_CHMAP10_REG, 0x0000, 2 },
66  { AD717X_CHMAP11_REG, 0x0000, 2 },
67  { AD717X_CHMAP12_REG, 0x0000, 2 },
68  { AD717X_CHMAP13_REG, 0x0000, 2 },
69  { AD717X_CHMAP14_REG, 0x0000, 2 },
70  { AD717X_CHMAP15_REG, 0x0000, 2 },
79  {
81  },
82  {
84  },
85  {
87  },
88  {
90  },
91  {
93  },
94  {
96  },
97  {
99  },
100  {
102  },
103  {AD717X_OFFSET0_REG, 0, 3 },
104  {AD717X_OFFSET1_REG, 0, 3 },
105  {AD717X_OFFSET2_REG, 0, 3 },
106  {AD717X_OFFSET3_REG, 0, 3 },
107  {AD717X_OFFSET4_REG, 0, 3 },
108  {AD717X_OFFSET5_REG, 0, 3 },
109  {AD717X_OFFSET6_REG, 0, 3 },
110  {AD717X_OFFSET7_REG, 0, 3 },
111  {AD717X_GAIN0_REG, 0, 3 },
112  {AD717X_GAIN1_REG, 0, 3 },
113  {AD717X_GAIN2_REG, 0, 3 },
114  {AD717X_GAIN3_REG, 0, 3 },
115  {AD717X_GAIN4_REG, 0, 3 },
116  {AD717X_GAIN5_REG, 0, 3 },
117  {AD717X_GAIN6_REG, 0, 3 },
118  {AD717X_GAIN7_REG, 0, 3 },
119 };
120 
121 #endif /* AD4111_CFG_H_ */
AD717X_GAIN3_REG
#define AD717X_GAIN3_REG
Definition: ad717x.h:369
AD717X_CHMAP13_REG
#define AD717X_CHMAP13_REG
Definition: ad717x.h:339
AD717X_GAIN4_REG
#define AD717X_GAIN4_REG
Definition: ad717x.h:370
AD717X_ADCMODE_REG_MODE
#define AD717X_ADCMODE_REG_MODE(x)
Definition: ad717x.h:392
AD717X_GAIN5_REG
#define AD717X_GAIN5_REG
Definition: ad717x.h:371
AD717X_GAIN0_REG
#define AD717X_GAIN0_REG
Definition: ad717x.h:366
AD717X_CHMAP4_REG
#define AD717X_CHMAP4_REG
Definition: ad717x.h:330
AD717X_SETUP_CONF_REG_REF_SEL
#define AD717X_SETUP_CONF_REG_REF_SEL(x)
Definition: ad717x.h:460
AD717X_FILTCON0_REG
#define AD717X_FILTCON0_REG
Definition: ad717x.h:350
AD717X_GAIN7_REG
#define AD717X_GAIN7_REG
Definition: ad717x.h:373
AD717X_GPIOCON_REG_SYNC_EN
#define AD717X_GPIOCON_REG_SYNC_EN
Definition: ad717x.h:416
AD717X_OFFSET4_REG
#define AD717X_OFFSET4_REG
Definition: ad717x.h:362
AD717X_ID_REG
#define AD717X_ID_REG
Definition: ad717x.h:325
AD717X_CHMAP9_REG
#define AD717X_CHMAP9_REG
Definition: ad717x.h:335
AD717X_FILTCON4_REG
#define AD717X_FILTCON4_REG
Definition: ad717x.h:354
AD717X_FILTCON3_REG
#define AD717X_FILTCON3_REG
Definition: ad717x.h:353
AD717X_CHMAP8_REG
#define AD717X_CHMAP8_REG
Definition: ad717x.h:334
AD717X_SETUPCON1_REG
#define AD717X_SETUPCON1_REG
Definition: ad717x.h:343
AD717X_GAIN2_REG
#define AD717X_GAIN2_REG
Definition: ad717x.h:368
AD717X_CHMAP6_REG
#define AD717X_CHMAP6_REG
Definition: ad717x.h:332
ad4111_regs
ad717x_st_reg ad4111_regs[]
Definition: ad411x_regs.h:39
AD717X_SETUPCON2_REG
#define AD717X_SETUPCON2_REG
Definition: ad717x.h:344
AD717X_SETUPCON6_REG
#define AD717X_SETUPCON6_REG
Definition: ad717x.h:348
AD717X_CHMAP12_REG
#define AD717X_CHMAP12_REG
Definition: ad717x.h:338
AD717X_SETUPCON4_REG
#define AD717X_SETUPCON4_REG
Definition: ad717x.h:346
AD717X_ADCMODE_REG
#define AD717X_ADCMODE_REG
Definition: ad717x.h:320
AD717X_CHMAP1_REG
#define AD717X_CHMAP1_REG
Definition: ad717x.h:327
AD717X_OFFSET6_REG
#define AD717X_OFFSET6_REG
Definition: ad717x.h:364
AD717X_CHMAP3_REG
#define AD717X_CHMAP3_REG
Definition: ad717x.h:329
ad717x_st_reg
Definition: ad717x.h:248
AD717X_FILTCON5_REG
#define AD717X_FILTCON5_REG
Definition: ad717x.h:355
AD717X_OFFSET2_REG
#define AD717X_OFFSET2_REG
Definition: ad717x.h:360
AD717X_FILTCON2_REG
#define AD717X_FILTCON2_REG
Definition: ad717x.h:352
AD717X_SETUPCON0_REG
#define AD717X_SETUPCON0_REG
Definition: ad717x.h:342
AD717X_CHMAP0_REG
#define AD717X_CHMAP0_REG
Definition: ad717x.h:326
AD717X_GPIOCON_REG
#define AD717X_GPIOCON_REG
Definition: ad717x.h:324
AD717X_CHMAP15_REG
#define AD717X_CHMAP15_REG
Definition: ad717x.h:341
AD717X_FILT_CONF_REG_ENHFILT
#define AD717X_FILT_CONF_REG_ENHFILT(x)
Definition: ad717x.h:483
ad717x.h
AD717X header file. Devices: AD7172-2, AD7172-4, AD7173-8, AD7175-2, AD7175-8, AD7176-2,...
AD717X_OFFSET0_REG
#define AD717X_OFFSET0_REG
Definition: ad717x.h:358
AD717X_STATUS_REG
#define AD717X_STATUS_REG
Definition: ad717x.h:319
AD717X_DATA_REG
#define AD717X_DATA_REG
Definition: ad717x.h:323
AD717X_CHMAP7_REG
#define AD717X_CHMAP7_REG
Definition: ad717x.h:333
AD717X_OFFSET1_REG
#define AD717X_OFFSET1_REG
Definition: ad717x.h:359
AD717X_CHMAP10_REG
#define AD717X_CHMAP10_REG
Definition: ad717x.h:336
AD717X_FILTCON1_REG
#define AD717X_FILTCON1_REG
Definition: ad717x.h:351
AD717X_OFFSET7_REG
#define AD717X_OFFSET7_REG
Definition: ad717x.h:365
AD717X_CHMAP2_REG
#define AD717X_CHMAP2_REG
Definition: ad717x.h:328
AD717X_SETUPCON5_REG
#define AD717X_SETUPCON5_REG
Definition: ad717x.h:347
AD717X_IFMODE_REG
#define AD717X_IFMODE_REG
Definition: ad717x.h:321
AD717X_FILTCON6_REG
#define AD717X_FILTCON6_REG
Definition: ad717x.h:356
AD717X_GAIN1_REG
#define AD717X_GAIN1_REG
Definition: ad717x.h:367
AD717X_OFFSET3_REG
#define AD717X_OFFSET3_REG
Definition: ad717x.h:361
AD717X_SETUPCON3_REG
#define AD717X_SETUPCON3_REG
Definition: ad717x.h:345
AD717X_CHMAP5_REG
#define AD717X_CHMAP5_REG
Definition: ad717x.h:331
AD717X_REGCHECK_REG
#define AD717X_REGCHECK_REG
Definition: ad717x.h:322
AD717X_GAIN6_REG
#define AD717X_GAIN6_REG
Definition: ad717x.h:372
AD717X_FILTCON7_REG
#define AD717X_FILTCON7_REG
Definition: ad717x.h:357
AD717X_CHMAP11_REG
#define AD717X_CHMAP11_REG
Definition: ad717x.h:337
AD717X_OFFSET5_REG
#define AD717X_OFFSET5_REG
Definition: ad717x.h:363
AD717X_SETUPCON7_REG
#define AD717X_SETUPCON7_REG
Definition: ad717x.h:349
AD717X_CHMAP14_REG
#define AD717X_CHMAP14_REG
Definition: ad717x.h:340