no-OS
Classes | Macros | Functions
ad6676.h File Reference

Header file of AD6676 Driver. More...

#include <stdint.h>
#include "no_os_util.h"
#include "no_os_delay.h"
#include "no_os_spi.h"
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Classes

struct  ad6676_init_param
 
struct  ad6676_dev
 

Macros

#define AD6676_SPI_CONFIG   0x000
 
#define AD6676_DEVICE_CONFIG   0x002
 
#define AD6676_CHIP_TYPE   0x003
 
#define AD6676_CHIP_ID0   0x004
 
#define AD6676_CHIP_ID1   0x005
 
#define AD6676_GRADE_REVISION   0x006
 
#define AD6676_VENDOR_ID0   0x00C
 
#define AD6676_VENDOR_ID1   0x00D
 
#define AD6676_PCBL_DONE   0x0FE
 
#define AD6676_FADC_0   0x100
 
#define AD6676_FADC_1   0x101
 
#define AD6676_FIF_0   0x102
 
#define AD6676_FIF_1   0x103
 
#define AD6676_BW_0   0x104
 
#define AD6676_BW_1   0x105
 
#define AD6676_LEXT   0x106
 
#define AD6676_MRGN_L   0x107
 
#define AD6676_MRGN_U   0x108
 
#define AD6676_MRGN_IF   0x109
 
#define AD6676_XSCALE_1   0x10A
 
#define AD6676_CAL_CTRL   0x115
 
#define AD6676_CAL_CMD   0x116
 
#define AD6676_CAL_DONE   0x117
 
#define AD6676_ADC_CONFIG   0x118
 
#define AD6676_FORCE_END_CAL   0x11A
 
#define AD6676_DEC_MODE   0x140
 
#define AD6676_MIX1_TUNING   0x141
 
#define AD6676_MIX2_TUNING   0x142
 
#define AD6676_MIX1_INIT   0x143
 
#define AD6676_MIX2_INIT_LSB   0x144
 
#define AD6676_MIX2_INIT_MSB   0x145
 
#define AD6676_DP_CTRL   0x146
 
#define AD6676_STANDBY   0x150
 
#define AD6676_PD_DIG   0x151
 
#define AD6676_PD_PIN_CTRL   0x152
 
#define AD6676_STBY_DAC   0x250
 
#define AD6676_ATTEN_MODE   0x180
 
#define AD6676_ATTEN_VALUE_PIN0   0x181
 
#define AD6676_ATTEN_VALUE_PIN1   0x182
 
#define AD6676_ATTEN_INIT   0x183
 
#define AD6676_ATTEN_CTL   0x184
 
#define AD6676_ADCRE_THRH   0x188
 
#define AD6676_ADCRE_PULSE_LEN   0x189
 
#define AD6676_ATTEN_STEP_RE   0x18A
 
#define AD6676_TIME_PER_STEP   0x18B
 
#define AD6676_ADC_UNSTABLE   0x18F
 
#define AD6676_PKTHRH0_LSB   0x193
 
#define AD6676_PKTHRH0_MSB   0x194
 
#define AD6676_PKTHRH1_LSB   0x195
 
#define AD6676_PKTHRH1_MSB   0x196
 
#define AD6676_LOWTHRH_LSB   0x197
 
#define AD6676_LOWTHRH_MSB   0x198
 
#define AD6676_DWELL_TIME_MANTISSA   0x199
 
#define AD6676_DWELL_TIME_EXP   0x19A
 
#define AD6676_FLAG0_SEL   0x19B
 
#define AD6676_FLAG1_SEL   0x19C
 
#define AD6676_EN_FLAG   0x19E
 
#define AD6676_FORCE_GPIO   0x1B0
 
#define AD6676_FORCE_GPIO_OUT   0x1B1
 
#define AD6676_FORCE_GPIO_VAL   0x1B2
 
#define AD6676_READ_GPO   0x1B3
 
#define AD6676_READ_GPI   0x1B4
 
#define AD6676_DID   0x1C0
 
#define AD6676_BID   0x1C1
 
#define AD6676_L   0x1C3
 
#define AD6676_F   0x1C4
 
#define AD6676_K   0x1C5
 
#define AD6676_M   0x1C6
 
#define AD6676_S   0x1C9
 
#define AD6676_HD   0x1CA
 
#define AD6676_RES1   0x1CB
 
#define AD6676_RES2   0x1CC
 
#define AD6676_LID0   0x1D0
 
#define AD6676_LID1   0x1D1
 
#define AD6676_FCHK0   0x1D8
 
#define AD6676_FCHK1   0x1D9
 
#define AD6676_EN_LFIFO   0x1E0
 
#define AD6676_SWAP   0x1E1
 
#define AD6676_LANE_PD   0x1E2
 
#define AD6676_MIS1   0x1E3
 
#define AD6676_SYNC_PIN   0x1E4
 
#define AD6676_TEST_GEN   0x1E5
 
#define AD6676_KF_ILAS   0x1E6
 
#define AD6676_SYNCB_CTRL   0x1E7
 
#define AD6676_MIX_CTRL   0x1E8
 
#define AD6676_K_OFFSET   0x1E9
 
#define AD6676_SYSREF   0x1EA
 
#define AD6676_SER1   0x1EB
 
#define AD6676_SER2   0x1EC
 
#define AD6676_CLKSYN_ENABLE   0x2A0
 
#define AD6676_CLKSYN_INT_N_LSB   0x2A1
 
#define AD6676_CLKSYN_INT_N_MSB   0x2A2
 
#define AD6676_CLKSYN_LOGEN   0x2A5
 
#define AD6676_CLKSYN_KVCO_VCO   0x2A9
 
#define AD6676_CLKSYN_VCO_BIAS   0x2AA
 
#define AD6676_CLKSYN_VCO_CAL   0x2AB
 
#define AD6676_CLKSYN_I_CP   0x2AC
 
#define AD6676_CLKSYN_CP_CAL   0x2AD
 
#define AD6676_CLKSYN_VCO_VAR   0x2B7
 
#define AD6676_CLKSYN_R_DIV   0x2BB
 
#define AD6676_CLKSYN_STATUS   0x2BC
 
#define AD6676_JESDSYN_STATUS   0x2DC
 
#define AD6676_SHUFFLE_THREG0   0x342
 
#define AD6676_SHUFFLE_THREG1   0x343
 
#define SPI_CONF_SW_RESET   (0x81)
 
#define SPI_CONF_SDIO_DIR   (0x18)
 
#define SYN_STAT_PLL_LCK   (1 << 3)
 
#define SYN_STAT_VCO_CAL_BUSY   (1 << 1)
 
#define SYN_STAT_CP_CAL_DONE   (1 << 0)
 
#define DP_CTRL_OFFSET_BINARY   (1 << 0)
 
#define DP_CTRL_TWOS_COMPLEMENT   (0 << 0)
 
#define TESTGENMODE_OFF   0x0
 
#define TESTGENMODE_ALT_CHECKERBOARD   0x1
 
#define TESTGENMODE_ONE_ZERO_TOGGLE   0x2
 
#define TESTGENMODE_PN23_SEQ   0x3
 
#define TESTGENMODE_PN9_SEQ   0x4
 
#define TESTGENMODE_REP_USER_PAT   0x5
 
#define TESTGENMODE_SING_USER_PAT   0x6
 
#define TESTGENMODE_RAMP   0x7
 
#define TESTGENMODE_MOD_RPAT   0x8
 
#define TESTGENMODE_JSPAT   0x10
 
#define TESTGENMODE_JTSPAT   0x11
 
#define R_DIV(x)   ((x) << 6)
 
#define CLKSYN_R_DIV_SYSREF_CTRL   (1 << 3)
 
#define CLKSYN_R_DIV_CLKIN_IMPED   (1 << 2)
 
#define CLKSYN_R_DIV_RESERVED   0x31
 
#define EN_EXT_CK   (1 << 7)
 
#define EN_ADC_CK   (1 << 6)
 
#define EN_SYNTH   (1 << 5)
 
#define EN_VCO_PTAT   (1 << 4)
 
#define EN_VCO_ALC   (1 << 3)
 
#define EN_VCO   (1 << 2)
 
#define EN_OVER_IDE_CAL   (1 << 1)
 
#define EN_OVER_IDE   (1 << 0)
 
#define RESET_CAL   (1 << 3)
 
#define INIT_ALC_VALUE(x)   ((x) << 4)
 
#define ALC_DIS   (1 << 3)
 
#define CP_CAL_EN   (1 << 7)
 
#define DEC_32   1
 
#define DEC_24   2
 
#define DEC_16   3
 
#define DEC_12   4
 
#define XCMD3   (1 << 7)
 
#define XCMD2   (1 << 6)
 
#define XCMD1   (1 << 5)
 
#define XCMD0   (1 << 4)
 
#define RESON1_CAL   (1 << 3)
 
#define FLASH_CAL   (1 << 2)
 
#define INIT_ADC   (1 << 1)
 
#define TUNE_ADC   (1 << 0)
 
#define PD_SYSREF_RX   (1 << 3)
 
#define LVDS_SYNCB   (1 << 2)
 
#define SCR   (1 << 7)
 
#define FORCE_END_CAL   (1 << 0)
 
#define CAL_DONE   (1 << 0)
 
#define MHz   1000000UL
 
#define MIN_FADC   2000000000ULL /* SPS */
 
#define MIN_FADC_INT_SYNTH   2925000000ULL /* SPS REVISIT */
 
#define MAX_FADC   3200000000ULL /* SPS */
 
#define MIN_FIF   70000000ULL /* Hz */
 
#define MAX_FIF   450000000ULL /* Hz */
 
#define MIN_BW   20000000ULL /* Hz */
 
#define MAX_BW   160000000ULL /* Hz */
 
#define CHIP_ID1_AD6676   0x03
 
#define CHIP_ID0_AD6676   0xBB
 

Functions

int32_t ad6676_spi_read (struct ad6676_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
 SPI read from device. More...
 
int32_t ad6676_spi_write (struct ad6676_dev *dev, uint16_t reg_addr, uint8_t reg_data)
 SPI write to device. More...
 
int32_t ad6676_setup (struct ad6676_dev **device, struct ad6676_init_param init_param)
 Initialize the device. More...
 
int32_t ad6676_update (struct ad6676_dev *dev, struct ad6676_init_param *init_param)
 Reconfigure device for other target frequency and bandwidth and recalibrate. More...
 
int32_t ad6676_set_attenuation (struct ad6676_dev *dev, struct ad6676_init_param *init_param)
 Set attenuation in decibels or disable attenuator. More...
 
int32_t ad6676_set_fif (struct ad6676_dev *dev, struct ad6676_init_param *init_param)
 Set the target IF frequency. More...
 
uint64_t ad6676_get_fif (struct ad6676_dev *dev, struct ad6676_init_param *init_param)
 Get the target IF frequency. More...
 
int32_t ad6676_test (struct ad6676_dev *dev, uint32_t test_mode)
 Perform an interface test. More...
 

Detailed Description

Header file of AD6676 Driver.

Authors
Dragos Bogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)
Andrei Grozav (andre.nosp@m.i.gr.nosp@m.ozav@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2015(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD6676_ADC_CONFIG

#define AD6676_ADC_CONFIG   0x118

◆ AD6676_ADC_UNSTABLE

#define AD6676_ADC_UNSTABLE   0x18F

◆ AD6676_ADCRE_PULSE_LEN

#define AD6676_ADCRE_PULSE_LEN   0x189

◆ AD6676_ADCRE_THRH

#define AD6676_ADCRE_THRH   0x188

◆ AD6676_ATTEN_CTL

#define AD6676_ATTEN_CTL   0x184

◆ AD6676_ATTEN_INIT

#define AD6676_ATTEN_INIT   0x183

◆ AD6676_ATTEN_MODE

#define AD6676_ATTEN_MODE   0x180

◆ AD6676_ATTEN_STEP_RE

#define AD6676_ATTEN_STEP_RE   0x18A

◆ AD6676_ATTEN_VALUE_PIN0

#define AD6676_ATTEN_VALUE_PIN0   0x181

◆ AD6676_ATTEN_VALUE_PIN1

#define AD6676_ATTEN_VALUE_PIN1   0x182

◆ AD6676_BID

#define AD6676_BID   0x1C1

◆ AD6676_BW_0

#define AD6676_BW_0   0x104

◆ AD6676_BW_1

#define AD6676_BW_1   0x105

◆ AD6676_CAL_CMD

#define AD6676_CAL_CMD   0x116

◆ AD6676_CAL_CTRL

#define AD6676_CAL_CTRL   0x115

◆ AD6676_CAL_DONE

#define AD6676_CAL_DONE   0x117

◆ AD6676_CHIP_ID0

#define AD6676_CHIP_ID0   0x004

◆ AD6676_CHIP_ID1

#define AD6676_CHIP_ID1   0x005

◆ AD6676_CHIP_TYPE

#define AD6676_CHIP_TYPE   0x003

◆ AD6676_CLKSYN_CP_CAL

#define AD6676_CLKSYN_CP_CAL   0x2AD

◆ AD6676_CLKSYN_ENABLE

#define AD6676_CLKSYN_ENABLE   0x2A0

◆ AD6676_CLKSYN_I_CP

#define AD6676_CLKSYN_I_CP   0x2AC

◆ AD6676_CLKSYN_INT_N_LSB

#define AD6676_CLKSYN_INT_N_LSB   0x2A1

◆ AD6676_CLKSYN_INT_N_MSB

#define AD6676_CLKSYN_INT_N_MSB   0x2A2

◆ AD6676_CLKSYN_KVCO_VCO

#define AD6676_CLKSYN_KVCO_VCO   0x2A9

◆ AD6676_CLKSYN_LOGEN

#define AD6676_CLKSYN_LOGEN   0x2A5

◆ AD6676_CLKSYN_R_DIV

#define AD6676_CLKSYN_R_DIV   0x2BB

◆ AD6676_CLKSYN_STATUS

#define AD6676_CLKSYN_STATUS   0x2BC

◆ AD6676_CLKSYN_VCO_BIAS

#define AD6676_CLKSYN_VCO_BIAS   0x2AA

◆ AD6676_CLKSYN_VCO_CAL

#define AD6676_CLKSYN_VCO_CAL   0x2AB

◆ AD6676_CLKSYN_VCO_VAR

#define AD6676_CLKSYN_VCO_VAR   0x2B7

◆ AD6676_DEC_MODE

#define AD6676_DEC_MODE   0x140

◆ AD6676_DEVICE_CONFIG

#define AD6676_DEVICE_CONFIG   0x002

◆ AD6676_DID

#define AD6676_DID   0x1C0

◆ AD6676_DP_CTRL

#define AD6676_DP_CTRL   0x146

◆ AD6676_DWELL_TIME_EXP

#define AD6676_DWELL_TIME_EXP   0x19A

◆ AD6676_DWELL_TIME_MANTISSA

#define AD6676_DWELL_TIME_MANTISSA   0x199

◆ AD6676_EN_FLAG

#define AD6676_EN_FLAG   0x19E

◆ AD6676_EN_LFIFO

#define AD6676_EN_LFIFO   0x1E0

◆ AD6676_F

#define AD6676_F   0x1C4

◆ AD6676_FADC_0

#define AD6676_FADC_0   0x100

◆ AD6676_FADC_1

#define AD6676_FADC_1   0x101

◆ AD6676_FCHK0

#define AD6676_FCHK0   0x1D8

◆ AD6676_FCHK1

#define AD6676_FCHK1   0x1D9

◆ AD6676_FIF_0

#define AD6676_FIF_0   0x102

◆ AD6676_FIF_1

#define AD6676_FIF_1   0x103

◆ AD6676_FLAG0_SEL

#define AD6676_FLAG0_SEL   0x19B

◆ AD6676_FLAG1_SEL

#define AD6676_FLAG1_SEL   0x19C

◆ AD6676_FORCE_END_CAL

#define AD6676_FORCE_END_CAL   0x11A

◆ AD6676_FORCE_GPIO

#define AD6676_FORCE_GPIO   0x1B0

◆ AD6676_FORCE_GPIO_OUT

#define AD6676_FORCE_GPIO_OUT   0x1B1

◆ AD6676_FORCE_GPIO_VAL

#define AD6676_FORCE_GPIO_VAL   0x1B2

◆ AD6676_GRADE_REVISION

#define AD6676_GRADE_REVISION   0x006

◆ AD6676_HD

#define AD6676_HD   0x1CA

◆ AD6676_JESDSYN_STATUS

#define AD6676_JESDSYN_STATUS   0x2DC

◆ AD6676_K

#define AD6676_K   0x1C5

◆ AD6676_K_OFFSET

#define AD6676_K_OFFSET   0x1E9

◆ AD6676_KF_ILAS

#define AD6676_KF_ILAS   0x1E6

◆ AD6676_L

#define AD6676_L   0x1C3

◆ AD6676_LANE_PD

#define AD6676_LANE_PD   0x1E2

◆ AD6676_LEXT

#define AD6676_LEXT   0x106

◆ AD6676_LID0

#define AD6676_LID0   0x1D0

◆ AD6676_LID1

#define AD6676_LID1   0x1D1

◆ AD6676_LOWTHRH_LSB

#define AD6676_LOWTHRH_LSB   0x197

◆ AD6676_LOWTHRH_MSB

#define AD6676_LOWTHRH_MSB   0x198

◆ AD6676_M

#define AD6676_M   0x1C6

◆ AD6676_MIS1

#define AD6676_MIS1   0x1E3

◆ AD6676_MIX1_INIT

#define AD6676_MIX1_INIT   0x143

◆ AD6676_MIX1_TUNING

#define AD6676_MIX1_TUNING   0x141

◆ AD6676_MIX2_INIT_LSB

#define AD6676_MIX2_INIT_LSB   0x144

◆ AD6676_MIX2_INIT_MSB

#define AD6676_MIX2_INIT_MSB   0x145

◆ AD6676_MIX2_TUNING

#define AD6676_MIX2_TUNING   0x142

◆ AD6676_MIX_CTRL

#define AD6676_MIX_CTRL   0x1E8

◆ AD6676_MRGN_IF

#define AD6676_MRGN_IF   0x109

◆ AD6676_MRGN_L

#define AD6676_MRGN_L   0x107

◆ AD6676_MRGN_U

#define AD6676_MRGN_U   0x108

◆ AD6676_PCBL_DONE

#define AD6676_PCBL_DONE   0x0FE

◆ AD6676_PD_DIG

#define AD6676_PD_DIG   0x151

◆ AD6676_PD_PIN_CTRL

#define AD6676_PD_PIN_CTRL   0x152

◆ AD6676_PKTHRH0_LSB

#define AD6676_PKTHRH0_LSB   0x193

◆ AD6676_PKTHRH0_MSB

#define AD6676_PKTHRH0_MSB   0x194

◆ AD6676_PKTHRH1_LSB

#define AD6676_PKTHRH1_LSB   0x195

◆ AD6676_PKTHRH1_MSB

#define AD6676_PKTHRH1_MSB   0x196

◆ AD6676_READ_GPI

#define AD6676_READ_GPI   0x1B4

◆ AD6676_READ_GPO

#define AD6676_READ_GPO   0x1B3

◆ AD6676_RES1

#define AD6676_RES1   0x1CB

◆ AD6676_RES2

#define AD6676_RES2   0x1CC

◆ AD6676_S

#define AD6676_S   0x1C9

◆ AD6676_SER1

#define AD6676_SER1   0x1EB

◆ AD6676_SER2

#define AD6676_SER2   0x1EC

◆ AD6676_SHUFFLE_THREG0

#define AD6676_SHUFFLE_THREG0   0x342

◆ AD6676_SHUFFLE_THREG1

#define AD6676_SHUFFLE_THREG1   0x343

◆ AD6676_SPI_CONFIG

#define AD6676_SPI_CONFIG   0x000

◆ AD6676_STANDBY

#define AD6676_STANDBY   0x150

◆ AD6676_STBY_DAC

#define AD6676_STBY_DAC   0x250

◆ AD6676_SWAP

#define AD6676_SWAP   0x1E1

◆ AD6676_SYNC_PIN

#define AD6676_SYNC_PIN   0x1E4

◆ AD6676_SYNCB_CTRL

#define AD6676_SYNCB_CTRL   0x1E7

◆ AD6676_SYSREF

#define AD6676_SYSREF   0x1EA

◆ AD6676_TEST_GEN

#define AD6676_TEST_GEN   0x1E5

◆ AD6676_TIME_PER_STEP

#define AD6676_TIME_PER_STEP   0x18B

◆ AD6676_VENDOR_ID0

#define AD6676_VENDOR_ID0   0x00C

◆ AD6676_VENDOR_ID1

#define AD6676_VENDOR_ID1   0x00D

◆ AD6676_XSCALE_1

#define AD6676_XSCALE_1   0x10A

◆ ALC_DIS

#define ALC_DIS   (1 << 3)

◆ CAL_DONE

#define CAL_DONE   (1 << 0)

◆ CHIP_ID0_AD6676

#define CHIP_ID0_AD6676   0xBB

◆ CHIP_ID1_AD6676

#define CHIP_ID1_AD6676   0x03

◆ CLKSYN_R_DIV_CLKIN_IMPED

#define CLKSYN_R_DIV_CLKIN_IMPED   (1 << 2)

◆ CLKSYN_R_DIV_RESERVED

#define CLKSYN_R_DIV_RESERVED   0x31

◆ CLKSYN_R_DIV_SYSREF_CTRL

#define CLKSYN_R_DIV_SYSREF_CTRL   (1 << 3)

◆ CP_CAL_EN

#define CP_CAL_EN   (1 << 7)

◆ DEC_12

#define DEC_12   4

◆ DEC_16

#define DEC_16   3

◆ DEC_24

#define DEC_24   2

◆ DEC_32

#define DEC_32   1

◆ DP_CTRL_OFFSET_BINARY

#define DP_CTRL_OFFSET_BINARY   (1 << 0)

◆ DP_CTRL_TWOS_COMPLEMENT

#define DP_CTRL_TWOS_COMPLEMENT   (0 << 0)

◆ EN_ADC_CK

#define EN_ADC_CK   (1 << 6)

◆ EN_EXT_CK

#define EN_EXT_CK   (1 << 7)

◆ EN_OVER_IDE

#define EN_OVER_IDE   (1 << 0)

◆ EN_OVER_IDE_CAL

#define EN_OVER_IDE_CAL   (1 << 1)

◆ EN_SYNTH

#define EN_SYNTH   (1 << 5)

◆ EN_VCO

#define EN_VCO   (1 << 2)

◆ EN_VCO_ALC

#define EN_VCO_ALC   (1 << 3)

◆ EN_VCO_PTAT

#define EN_VCO_PTAT   (1 << 4)

◆ FLASH_CAL

#define FLASH_CAL   (1 << 2)

◆ FORCE_END_CAL

#define FORCE_END_CAL   (1 << 0)

◆ INIT_ADC

#define INIT_ADC   (1 << 1)

◆ INIT_ALC_VALUE

#define INIT_ALC_VALUE (   x)    ((x) << 4)

◆ LVDS_SYNCB

#define LVDS_SYNCB   (1 << 2)

◆ MAX_BW

#define MAX_BW   160000000ULL /* Hz */

◆ MAX_FADC

#define MAX_FADC   3200000000ULL /* SPS */

◆ MAX_FIF

#define MAX_FIF   450000000ULL /* Hz */

◆ MHz

#define MHz   1000000UL

◆ MIN_BW

#define MIN_BW   20000000ULL /* Hz */

◆ MIN_FADC

#define MIN_FADC   2000000000ULL /* SPS */

◆ MIN_FADC_INT_SYNTH

#define MIN_FADC_INT_SYNTH   2925000000ULL /* SPS REVISIT */

◆ MIN_FIF

#define MIN_FIF   70000000ULL /* Hz */

◆ PD_SYSREF_RX

#define PD_SYSREF_RX   (1 << 3)

◆ R_DIV

#define R_DIV (   x)    ((x) << 6)

◆ RESET_CAL

#define RESET_CAL   (1 << 3)

◆ RESON1_CAL

#define RESON1_CAL   (1 << 3)

◆ SCR

#define SCR   (1 << 7)

◆ SPI_CONF_SDIO_DIR

#define SPI_CONF_SDIO_DIR   (0x18)

◆ SPI_CONF_SW_RESET

#define SPI_CONF_SW_RESET   (0x81)

◆ SYN_STAT_CP_CAL_DONE

#define SYN_STAT_CP_CAL_DONE   (1 << 0)

◆ SYN_STAT_PLL_LCK

#define SYN_STAT_PLL_LCK   (1 << 3)

◆ SYN_STAT_VCO_CAL_BUSY

#define SYN_STAT_VCO_CAL_BUSY   (1 << 1)

◆ TESTGENMODE_ALT_CHECKERBOARD

#define TESTGENMODE_ALT_CHECKERBOARD   0x1

◆ TESTGENMODE_JSPAT

#define TESTGENMODE_JSPAT   0x10

◆ TESTGENMODE_JTSPAT

#define TESTGENMODE_JTSPAT   0x11

◆ TESTGENMODE_MOD_RPAT

#define TESTGENMODE_MOD_RPAT   0x8

◆ TESTGENMODE_OFF

#define TESTGENMODE_OFF   0x0

◆ TESTGENMODE_ONE_ZERO_TOGGLE

#define TESTGENMODE_ONE_ZERO_TOGGLE   0x2

◆ TESTGENMODE_PN23_SEQ

#define TESTGENMODE_PN23_SEQ   0x3

◆ TESTGENMODE_PN9_SEQ

#define TESTGENMODE_PN9_SEQ   0x4

◆ TESTGENMODE_RAMP

#define TESTGENMODE_RAMP   0x7

◆ TESTGENMODE_REP_USER_PAT

#define TESTGENMODE_REP_USER_PAT   0x5

◆ TESTGENMODE_SING_USER_PAT

#define TESTGENMODE_SING_USER_PAT   0x6

◆ TUNE_ADC

#define TUNE_ADC   (1 << 0)

◆ XCMD0

#define XCMD0   (1 << 4)

◆ XCMD1

#define XCMD1   (1 << 5)

◆ XCMD2

#define XCMD2   (1 << 6)

◆ XCMD3

#define XCMD3   (1 << 7)

Function Documentation

◆ ad6676_get_fif()

uint64_t ad6676_get_fif ( struct ad6676_dev *  dev,
struct ad6676_init_param *  init_param 
)

Get the target IF frequency.

Parameters
dev- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.

◆ ad6676_set_attenuation()

int32_t ad6676_set_attenuation ( struct ad6676_dev *  dev,
struct ad6676_init_param *  init_param 
)

Set attenuation in decibels or disable attenuator.

Parameters
dev- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.

◆ ad6676_set_fif()

int32_t ad6676_set_fif ( struct ad6676_dev *  dev,
struct ad6676_init_param *  init_param 
)

Set the target IF frequency.

Parameters
dev- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.
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◆ ad6676_setup()

int32_t ad6676_setup ( struct ad6676_dev **  device,
struct ad6676_init_param  init_param 
)

Initialize the device.

Parameters
device- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.

◆ ad6676_spi_read()

int32_t ad6676_spi_read ( struct ad6676_dev *  dev,
uint16_t  reg_addr,
uint8_t *  reg_data 
)

SPI read from device.

Parameters
dev- The device structure.
reg_addr- Adress of register to be read.
reg_data- Register data.
Returns
0 in case of success, negative error code otherwise.
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◆ ad6676_spi_write()

int32_t ad6676_spi_write ( struct ad6676_dev *  dev,
uint16_t  reg_addr,
uint8_t  reg_data 
)

SPI write to device.

Parameters
dev- The device structure.
reg_addr- Adress of register to be written.
reg_data- Register data.
Returns
0 in case of success, negative error code otherwise.
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◆ ad6676_test()

int32_t ad6676_test ( struct ad6676_dev *  dev,
uint32_t  test_mode 
)

Perform an interface test.

Parameters
dev- The device structure.
test_mode- Test mode to perform.
Returns
0 in case of success, negative error code otherwise.

◆ ad6676_update()

int32_t ad6676_update ( struct ad6676_dev *  dev,
struct ad6676_init_param *  init_param 
)

Reconfigure device for other target frequency and bandwidth and recalibrate.

Parameters
dev- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.
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