Header file for ad7293 Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "no_os_util.h"

Include dependency graph for ad7293.h:

Classes
struct	ad7293_dev
	AD7293 Device Descriptor. More...

struct	ad7293_init_param
	AD7293 Initialization Parameters structure. More...

Macros
#define	AD7293_R1B NO_OS_BIT(16)

#define	AD7293_R2B NO_OS_BIT(17)

#define	AD7293_PAGE_ADDR_MSK NO_OS_GENMASK(15, 8)

#define	AD7293_PAGE(x)

#define	AD7293_REG_NO_OP (AD7293_R1B \| AD7293_PAGE(0x0) \| 0x0)

#define	AD7293_REG_PAGE_SELECT (AD7293_R1B \| AD7293_PAGE(0x0) \| 0x1)

#define	AD7293_REG_CONV_CMD (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x2)

#define	AD7293_REG_RESULT (AD7293_R1B \| AD7293_PAGE(0x0) \| 0x3)

#define	AD7293_REG_DAC_EN (AD7293_R1B \| AD7293_PAGE(0x0) \| 0x4)

#define	AD7293_REG_DEVICE_ID (AD7293_R2B \| AD7293_PAGE(0x0) \| 0xC)

#define	AD7293_REG_SOFT_RESET (AD7293_R2B \| AD7293_PAGE(0x0) \| 0xF)

#define	AD7293_REG_VIN0 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x10)

#define	AD7293_REG_VIN1 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x11)

#define	AD7293_REG_VIN2 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x12)

#define	AD7293_REG_VIN3 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x13)

#define	AD7293_REG_TSENSE_INT (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x20)

#define	AD7293_REG_TSENSE_D0 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x21)

#define	AD7293_REG_TSENSE_D1 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x22)

#define	AD7293_REG_ISENSE_0 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x28)

#define	AD7293_REG_ISENSE_1 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x29)

#define	AD7293_REG_ISENSE_2 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x2A)

#define	AD7293_REG_ISENSE_3 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x2B)

#define	AD7293_REG_UNI_VOUT0 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x30)

#define	AD7293_REG_UNI_VOUT1 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x31)

#define	AD7293_REG_UNI_VOUT2 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x32)

#define	AD7293_REG_UNI_VOUT3 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x33)

#define	AD7293_REG_BI_VOUT0 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x34)

#define	AD7293_REG_BI_VOUT1 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x35)

#define	AD7293_REG_BI_VOUT2 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x36)

#define	AD7293_REG_BI_VOUT3 (AD7293_R2B \| AD7293_PAGE(0x0) \| 0x37)

#define	AD7293_REG_AVDD (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x10)

#define	AD7293_REG_DACVDD_UNI (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x11)

#define	AD7293_REG_DACVDD_BI (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x12)

#define	AD7293_REG_AVSS (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x14)

#define	AD7293_REG_BI_VIOU1_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x17)

#define	AD7293_REG_RS0_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x28)

#define	AD7293_REG_RS1_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x29)

#define	AD7293_REG_RS2_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x2A)

#define	AD7293_REG_RS3_MON (AD7293_R2B \| AD7293_PAGE(0x01) \| 0x2B)

#define	AD7293_REG_DIGITAL_OUT_EN (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x11)

#define	AD7293_REG_DIGITAL_INOUT_FUNC (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x12)

#define	AD7293_REG_DIGITAL_FUNC_POL (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x13)

#define	AD7293_REG_GENERAL (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x14)

#define	AD7293_REG_VINX_RANGE0 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x15)

#define	AD7293_REG_VINX_RANGE1 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x16)

#define	AD7293_REG_VINX_DIFF_SE (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x17)

#define	AD7293_REG_VINX_FILTER (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x18)

#define	AD7293_REG_BG_EN (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x19)

#define	AD7293_REG_CONV_DELAY (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x1A)

#define	AD7293_REG_TSENSE_BG_EN (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x1B)

#define	AD7293_REG_ISENSE_BG_EN (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x1C)

#define	AD7293_REG_ISENSE_GAIN (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x1D)

#define	AD7293_REG_DAC_SNOOZE_O (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x1F)

#define	AD7293_REG_DAC_SNOOZE_1 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x20)

#define	AD7293_REG_RSX_MON_BG_EN (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x23)

#define	AD7293_REG_INTEGR_CL (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x28)

#define	AD7293_REG_PA_ON_CTRL (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x29)

#define	AD7293_REG_RAMP_TIME_0 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x2A)

#define	AD7293_REG_RAMP_TIME_1 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x2B)

#define	AD7293_REG_RAMP_TIME_2 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x2C)

#define	AD7293_REG_RAMP_TIME_3 (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x2D)

#define	AD7293_REG_CL_FR_IT (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x2E)

#define	AD7293_REG_INTX_AVSS_AVDD (AD7293_R2B \| AD7293_PAGE(0x2) \| 0x2F)

#define	AD7293_REG_VINX_SEQ (AD7293_R2B \| AD7293_PAGE(0x3) \| 0x10)

#define	AD7293_REG_ISENSEX_TSENSEX_SEQ (AD7293_R2B \| AD7293_PAGE(0x3) \| 0x11)

#define	AD7293_REG_RSX_MON_BI_VOUTX_SEQ (AD7293_R2B \| AD7293_PAGE(0x3) \| 0x12)

#define	AD7293_REG_AVDD_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x10)

#define	AD7293_REG_DACVDD_UNI_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x11)

#define	AD7293_REG_DACVDD_BI_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x12)

#define	AD7293_REG_AVSS_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x14)

#define	AD7293_REG_BI_VOUT1_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x17)

#define	AD7293_REG_RS0_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x28)

#define	AD7293_REG_RS1_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x29)

#define	AD7293_REG_RS2_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x2A)

#define	AD7293_REG_RS3_MON_HL (AD7293_R2B \| AD7293_PAGE(0x05) \| 0x2B)

#define	AD7293_REG_VIN0_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x10)

#define	AD7293_REG_VIN1_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x11)

#define	AD7293_REG_VIN2_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x12)

#define	AD7293_REG_VIN3_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x13)

#define	AD7293_REG_TSENSE_D0_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x20)

#define	AD7293_REG_TSENSE_D1_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x21)

#define	AD7293_REG_TSENSE_D2_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x22)

#define	AD7293_REG_ISENSE0_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x28)

#define	AD7293_REG_ISENSE1_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x29)

#define	AD7293_REG_ISENSE2_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x2A)

#define	AD7293_REG_ISENSE3_LL (AD7293_R2B \| AD7293_PAGE(0x06) \| 0x2B)

#define	AD7293_REG_AVDD_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x10)

#define	AD7293_REG_DACVDD_UNI_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x11)

#define	AD7293_REG_DACVDD_BI_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x12)

#define	AD7293_REG_AVSS_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x14)

#define	AD7293_REG_BI_VOUT1_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x17)

#define	AD7293_REG_RS0_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x28)

#define	AD7293_REG_RS1_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x29)

#define	AD7293_REG_RS2_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x2A)

#define	AD7293_REG_RS3_MON_LL (AD7293_R2B \| AD7293_PAGE(0x07) \| 0x2B)

#define	AD7293_REG_VIN0_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x10)

#define	AD7293_REG_VIN1_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x11)

#define	AD7293_REG_VIN2_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x12)

#define	AD7293_REG_VIN3_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x13)

#define	AD7293_REG_TSENSE_INT_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x20)

#define	AD7293_REG_TSENSE_D0_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x21)

#define	AD7293_REG_TSENSE_D1_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x22)

#define	AD7293_REG_ISENSE0_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x28)

#define	AD7293_REG_ISENSE1_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x29)

#define	AD7293_REG_ISENSE2_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x2A)

#define	AD7293_REG_ISENSE3_HYS (AD7293_R2B \| AD7293_PAGE(0x08) \| 0x2B)

#define	AD7293_REG_AVDD_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x10)

#define	AD7293_REG_DACVDD_UNI_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x11)

#define	AD7293_REG_DACVDD_BI_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x12)

#define	AD7293_REG_AVSS_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x14)

#define	AD7293_REG_BI_VOUT1_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x17)

#define	AD7293_REG_RS0_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x28)

#define	AD7293_REG_RS1_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x29)

#define	AD7293_REG_RS2_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x2A)

#define	AD7293_REG_RS3_MON_HYS (AD7293_R2B \| AD7293_PAGE(0x09) \| 0x2B)

#define	AD7293_REG_VIN0_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x10)

#define	AD7293_REG_VIN1_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x11)

#define	AD7293_REG_VIN2_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x12)

#define	AD7293_REG_VIN3_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x13)

#define	AD7293_REG_TSENSE_INT_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x20)

#define	AD7293_REG_TSENSE_D0_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x21)

#define	AD7293_REG_TSENSE_D1_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x22)

#define	AD7293_REG_ISENSE0_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x28)

#define	AD7293_REG_ISENSE1_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x29)

#define	AD7293_REG_ISENSE2_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x2A)

#define	AD7293_REG_ISENSE3_MIN (AD7293_R2B \| AD7293_PAGE(0x0A) \| 0x2B)

#define	AD7293_REG_AVDD_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x10)

#define	AD7293_REG_DACVDD_UNI_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x11)

#define	AD7293_REG_DACVDD_BI_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x12)

#define	AD7293_REG_AVSS_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x14)

#define	AD7293_REG_BI_VOUT1_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x17)

#define	AD7293_REG_RS0_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x28)

#define	AD7293_REG_RS1_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x29)

#define	AD7293_REG_RS2_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x2A)

#define	AD7293_REG_RS3_MON_MIN (AD7293_R2B \| AD7293_PAGE(0x0B) \| 0x2B)

#define	AD7293_REG_VIN0_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x10)

#define	AD7293_REG_VIN1_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x11)

#define	AD7293_REG_VIN2_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x12)

#define	AD7293_REG_VIN3_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x13)

#define	AD7293_REG_TSENSE_INT_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x20)

#define	AD7293_REG_TSENSE_D0_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x21)

#define	AD7293_REG_TSENSE_D1_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x22)

#define	AD7293_REG_ISENSE0_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x28)

#define	AD7293_REG_ISENSE1_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x29)

#define	AD7293_REG_ISENSE2_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x2A)

#define	AD7293_REG_ISENSE3_MAX (AD7293_R2B \| AD7293_PAGE(0x0C) \| 0x2B)

#define	AD7293_REG_AVDD_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x10)

#define	AD7293_REG_DACVDD_UNI_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x11)

#define	AD7293_REG_DACVDD_BI_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x12)

#define	AD7293_REG_AVSS_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x14)

#define	AD7293_REG_BI_VOUT1_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x17)

#define	AD7293_REG_RS0_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x28)

#define	AD7293_REG_RS1_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x29)

#define	AD7293_REG_RS2_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x2A)

#define	AD7293_REG_RS3_MON_MAX (AD7293_R2B \| AD7293_PAGE(0x0D) \| 0x2B)

#define	AD7293_REG_VIN0_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x10)

#define	AD7293_REG_VIN1_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x11)

#define	AD7293_REG_VIN2_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x12)

#define	AD7293_REG_VIN3_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x13)

#define	AD7293_REG_TSENSE_INT_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x20)

#define	AD7293_REG_TSENSE_D0_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x21)

#define	AD7293_REG_TSENSE_D1_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x22)

#define	AD7293_REG_ISENSE0_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x28)

#define	AD7293_REG_ISENSE1_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x29)

#define	AD7293_REG_ISENSE2_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x2A)

#define	AD7293_REG_ISENSE3_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x2B)

#define	AD7293_REG_UNI_VOUT0_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x30)

#define	AD7293_REG_UNI_VOUT1_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x31)

#define	AD7293_REG_UNI_VOUT2_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x32)

#define	AD7293_REG_UNI_VOUT3_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x33)

#define	AD7293_REG_BI_VOUT0_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x34)

#define	AD7293_REG_BI_VOUT1_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x35)

#define	AD7293_REG_BI_VOUT2_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x36)

#define	AD7293_REG_BI_VOUT3_OFFSET (AD7293_R1B \| AD7293_PAGE(0xE) \| 0x37)

#define	AD7293_REG_AVDD_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x10)

#define	AD7293_REG_DACVDD_UNI_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x11)

#define	AD7293_REG_DACVDD_BI_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x12)

#define	AD7293_REG_AVSS_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x13)

#define	AD7293_REG_BI_VOUT0_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x14)

#define	AD7293_REG_BI_VOUT1_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x15)

#define	AD7293_REG_BI_VOUT2_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x16)

#define	AD7293_REG_BI_VOUT3_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x17)

#define	AD7293_REG_RS0_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x28)

#define	AD7293_REG_RS1_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x29)

#define	AD7293_REG_RS2_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x2A)

#define	AD7293_REG_RS3_MON_OFFSET (AD7293_R1B \| AD7293_PAGE(0x0F) \| 0x2B)

#define	AD7293_REG_ALERT_SUM (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x10)

#define	AD7293_REG_VINX_ALERT (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x12)

#define	AD7293_REG_TSENSEX_ALERT (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x14)

#define	AD7293_REG_ISENSEX_ALERT (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x15)

#define	AD7293_REG_BI_VOUTX_MON_ALERT (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x18)

#define	AD7293_REG_RSX_MON_ALERT (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x19)

#define	AD7293_REG_INT_LIMIT_AVSS_ALERT (AD7293_R2B \| AD7293_PAGE(0x10) \| 0x1A)

#define	AD7293_REG_VINX_ALERT0 (AD7293_R2B \| AD7293_PAGE(0x11) \| 0x12)

#define	AD7293_REG_TSENSEX_ALERT0 (AD7293_R2B \| AD7293_PAGE(0x11) \| 0x14)

#define	AD7293_REG_ISENSEX_ALERT0 (AD7293_R2B \| AD7293_PAGE(0x11) \| 0x15)

#define	AD7293_REG_BI_VOUTX_MON_ALERT0 (AD7293_R2B \| AD7293_PAGE(0x11) \| 0x18)

#define	AD7293_REG_RSX_MON_ALERT0 (AD7293_R2B \| AD7293_PAGE(0x11) \| 0x19)

#define	AD7293_REG_INT_LIMIT_AVSS_ALERT0 (AD7293_R2B \| AD7293_PAGE(0x11) \| 0x1A)

#define	AD7293_REG_VINX_ALERT1 (AD7293_R2B \| AD7293_PAGE(0x12) \| 0x12)

#define	AD7293_REG_TSENSEX_ALERT1 (AD7293_R2B \| AD7293_PAGE(0x12) \| 0x14)

#define	AD7293_REG_ISENSEX_ALERT1 (AD7293_R2B \| AD7293_PAGE(0x12) \| 0x15)

#define	AD7293_REG_BI_VOUTX_MON_ALERT1 (AD7293_R2B \| AD7293_PAGE(0x12) \| 0x18)

#define	AD7293_REG_RSX_MON_ALERT1 (AD7293_R2B \| AD7293_PAGE(0x12) \| 0x19)

#define	AD7293_REG_INT_LIMIT_AVSS_ALERT1 (AD7293_R2B \| AD7293_PAGE(0x12) \| 0x1A)

#define	AD7293_READ NO_OS_BIT(7)

#define	AD7293_TRANSF_LEN_MSK NO_OS_GENMASK(17, 16)

#define	AD7293_BUFF_SIZE_BYTES 3

#define	AD7293_REG_ADDR_MSK NO_OS_GENMASK(7, 0)

#define	AD7293_REG_VOUT_OFFSET_MSK NO_OS_GENMASK(5, 4)

#define	AD7293_REG_DATA_RAW_MSK NO_OS_GENMASK(15, 4)

#define	AD7293_REG_VINX_RANGE_GET_CH_MSK(x, ch)

#define	AD7293_REG_VINX_RANGE_SET_CH_MSK(x, ch)

#define	AD7293_CHIP_ID 0x18

#define	AD7293_SOFT_RESET_VAL 0x7293

#define	AD7293_SOFT_RESET_CLR_VAL 0x0000

#define	AD7293_CONV_CMD_VAL 0x82

Enumerations
enum	ad7293_ch_type { AD7293_ADC_VINX , AD7293_ADC_TSENSE , AD7293_ADC_ISENSE , AD7293_DAC }
	AD7293 Channel Type. More...

Functions
int	ad7293_spi_read (struct ad7293_dev dev, unsigned int reg, uint16_t val)
	Reads data from AD7293 over SPI.

int	ad7293_spi_write (struct ad7293_dev *dev, unsigned int reg, uint16_t val)
	Writes data to AD7293 over SPI.

int	ad7293_spi_update_bits (struct ad7293_dev *dev, unsigned int reg, uint16_t mask, uint16_t val)
	Update AD7293 register.

int	ad7293_adc_get_range (struct ad7293_dev dev, unsigned int ch, uint16_t range)
	Get the range value for ADC channels.

int	ad7293_adc_set_range (struct ad7293_dev *dev, unsigned int ch, uint16_t range)
	Set the range value for ADC channels.

int	ad7293_isense_set_gain (struct ad7293_dev *dev, unsigned int ch, uint16_t gain)
	Set the gain value for ISENSE channels.

int	ad7293_isense_get_gain (struct ad7293_dev dev, unsigned int ch, uint16_t gain)
	Get the gain value for ISENSE channels.

int	ad7293_get_offset (struct ad7293_dev dev, enum ad7293_ch_type type, unsigned int ch, uint16_t offset)
	Set offset value for specific channel and channel type.

int	ad7293_set_offset (struct ad7293_dev *dev, enum ad7293_ch_type type, unsigned int ch, uint16_t offset)
	Set offset value for specific channel and channel type.

int	ad7293_dac_write_raw (struct ad7293_dev *dev, unsigned int ch, uint16_t raw)
	Set the DAC output raw value.

int	ad7293_ch_read_raw (struct ad7293_dev dev, enum ad7293_ch_type type, unsigned int ch, uint16_t raw)
	Read raw value for specific channel and channel type.

int	ad7293_soft_reset (struct ad7293_dev *dev)
	Perform software reset.

int	ad7293_reset (struct ad7293_dev *dev)
	Perform both hardware and software reset.

int	ad7293_init (struct ad7293_dev *device, struct ad7293_init_param init_param)
	Initializes the ad7293.

int	ad7293_remove (struct ad7293_dev *dev)
	AD7293 Resources Deallocation.

Detailed Description

Header file for ad7293 Driver.

Author: Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ AD7293_BUFF_SIZE_BYTES

#define AD7293_BUFF_SIZE_BYTES 3

◆ AD7293_CHIP_ID

#define AD7293_CHIP_ID 0x18

◆ AD7293_CONV_CMD_VAL

#define AD7293_CONV_CMD_VAL 0x82

◆ AD7293_PAGE

#define AD7293_PAGE ( x )

Value:

no_os_field_prep(AD7293_PAGE_ADDR_MSK, x)

AD7293_PAGE_ADDR_MSK

#define AD7293_PAGE_ADDR_MSK

Definition ad7293.h:22

no_os_field_prep

uint32_t no_os_field_prep(uint32_t mask, uint32_t val)

◆ AD7293_PAGE_ADDR_MSK

#define AD7293_PAGE_ADDR_MSK NO_OS_GENMASK(15, 8)

◆ AD7293_R1B

#define AD7293_R1B NO_OS_BIT(16)

◆ AD7293_R2B

#define AD7293_R2B NO_OS_BIT(17)

◆ AD7293_READ

#define AD7293_READ NO_OS_BIT(7)

◆ AD7293_REG_ADDR_MSK

#define AD7293_REG_ADDR_MSK NO_OS_GENMASK(7, 0)

◆ AD7293_REG_ALERT_SUM

#define AD7293_REG_ALERT_SUM (AD7293_R2B | AD7293_PAGE(0x10) | 0x10)

◆ AD7293_REG_AVDD

#define AD7293_REG_AVDD (AD7293_R2B | AD7293_PAGE(0x01) | 0x10)

◆ AD7293_REG_AVDD_HL

#define AD7293_REG_AVDD_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x10)

◆ AD7293_REG_AVDD_HYS

#define AD7293_REG_AVDD_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x10)

◆ AD7293_REG_AVDD_LL

#define AD7293_REG_AVDD_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x10)

◆ AD7293_REG_AVDD_MAX

#define AD7293_REG_AVDD_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x10)

◆ AD7293_REG_AVDD_MIN

#define AD7293_REG_AVDD_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x10)

◆ AD7293_REG_AVDD_OFFSET

#define AD7293_REG_AVDD_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x10)

◆ AD7293_REG_AVSS

#define AD7293_REG_AVSS (AD7293_R2B | AD7293_PAGE(0x01) | 0x13)

◆ AD7293_REG_AVSS_HL

#define AD7293_REG_AVSS_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x13)

◆ AD7293_REG_AVSS_HYS

#define AD7293_REG_AVSS_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x13)

◆ AD7293_REG_AVSS_LL

#define AD7293_REG_AVSS_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x13)

◆ AD7293_REG_AVSS_MAX

#define AD7293_REG_AVSS_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x13)

◆ AD7293_REG_AVSS_MIN

#define AD7293_REG_AVSS_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x13)

◆ AD7293_REG_AVSS_OFFSET

#define AD7293_REG_AVSS_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x13)

◆ AD7293_REG_BG_EN

#define AD7293_REG_BG_EN (AD7293_R2B | AD7293_PAGE(0x2) | 0x19)

◆ AD7293_REG_BI_VIOU1_MON

#define AD7293_REG_BI_VIOU1_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x15)

◆ AD7293_REG_BI_VOUT0

#define AD7293_REG_BI_VOUT0 (AD7293_R2B | AD7293_PAGE(0x0) | 0x34)

◆ AD7293_REG_BI_VOUT0_MON

#define AD7293_REG_BI_VOUT0_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x14)

◆ AD7293_REG_BI_VOUT0_MON_HL

#define AD7293_REG_BI_VOUT0_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x14)

◆ AD7293_REG_BI_VOUT0_MON_HYS

#define AD7293_REG_BI_VOUT0_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x14)

◆ AD7293_REG_BI_VOUT0_MON_LL

#define AD7293_REG_BI_VOUT0_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x14)

◆ AD7293_REG_BI_VOUT0_MON_MAX

#define AD7293_REG_BI_VOUT0_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x14)

◆ AD7293_REG_BI_VOUT0_MON_MIN

#define AD7293_REG_BI_VOUT0_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x14)

◆ AD7293_REG_BI_VOUT0_MON_OFFSET

#define AD7293_REG_BI_VOUT0_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x14)

◆ AD7293_REG_BI_VOUT0_OFFSET

#define AD7293_REG_BI_VOUT0_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x34)

◆ AD7293_REG_BI_VOUT1

#define AD7293_REG_BI_VOUT1 (AD7293_R2B | AD7293_PAGE(0x0) | 0x35)

◆ AD7293_REG_BI_VOUT1_MON_HL

#define AD7293_REG_BI_VOUT1_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x15)

◆ AD7293_REG_BI_VOUT1_MON_HYS

#define AD7293_REG_BI_VOUT1_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x15)

◆ AD7293_REG_BI_VOUT1_MON_LL

#define AD7293_REG_BI_VOUT1_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x15)

◆ AD7293_REG_BI_VOUT1_MON_MAX

#define AD7293_REG_BI_VOUT1_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x15)

◆ AD7293_REG_BI_VOUT1_MON_MIN

#define AD7293_REG_BI_VOUT1_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x15)

◆ AD7293_REG_BI_VOUT1_MON_OFFSET

#define AD7293_REG_BI_VOUT1_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x15)

◆ AD7293_REG_BI_VOUT1_OFFSET

#define AD7293_REG_BI_VOUT1_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x35)

◆ AD7293_REG_BI_VOUT2

#define AD7293_REG_BI_VOUT2 (AD7293_R2B | AD7293_PAGE(0x0) | 0x36)

◆ AD7293_REG_BI_VOUT2_MON

#define AD7293_REG_BI_VOUT2_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x16)

◆ AD7293_REG_BI_VOUT2_MON_HL

#define AD7293_REG_BI_VOUT2_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x16)

◆ AD7293_REG_BI_VOUT2_MON_HYS

#define AD7293_REG_BI_VOUT2_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x16)

◆ AD7293_REG_BI_VOUT2_MON_LL

#define AD7293_REG_BI_VOUT2_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x16)

◆ AD7293_REG_BI_VOUT2_MON_MAX

#define AD7293_REG_BI_VOUT2_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x16)

◆ AD7293_REG_BI_VOUT2_MON_MIN

#define AD7293_REG_BI_VOUT2_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x16)

◆ AD7293_REG_BI_VOUT2_MON_OFFSET

#define AD7293_REG_BI_VOUT2_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x16)

◆ AD7293_REG_BI_VOUT2_OFFSET

#define AD7293_REG_BI_VOUT2_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x36)

◆ AD7293_REG_BI_VOUT3

#define AD7293_REG_BI_VOUT3 (AD7293_R2B | AD7293_PAGE(0x0) | 0x37)

◆ AD7293_REG_BI_VOUT3_MON

#define AD7293_REG_BI_VOUT3_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x17)

◆ AD7293_REG_BI_VOUT3_MON_HL

#define AD7293_REG_BI_VOUT3_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x17)

◆ AD7293_REG_BI_VOUT3_MON_HYS

#define AD7293_REG_BI_VOUT3_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x17)

◆ AD7293_REG_BI_VOUT3_MON_LL

#define AD7293_REG_BI_VOUT3_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x17)

◆ AD7293_REG_BI_VOUT3_MON_MAX

#define AD7293_REG_BI_VOUT3_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x17)

◆ AD7293_REG_BI_VOUT3_MON_MIN

#define AD7293_REG_BI_VOUT3_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x17)

◆ AD7293_REG_BI_VOUT3_MON_OFFSET

#define AD7293_REG_BI_VOUT3_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x17)

◆ AD7293_REG_BI_VOUT3_OFFSET

#define AD7293_REG_BI_VOUT3_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x37)

◆ AD7293_REG_BI_VOUTX_MON_ALERT

#define AD7293_REG_BI_VOUTX_MON_ALERT (AD7293_R2B | AD7293_PAGE(0x10) | 0x18)

◆ AD7293_REG_BI_VOUTX_MON_ALERT0

#define AD7293_REG_BI_VOUTX_MON_ALERT0 (AD7293_R2B | AD7293_PAGE(0x11) | 0x18)

◆ AD7293_REG_BI_VOUTX_MON_ALERT1

#define AD7293_REG_BI_VOUTX_MON_ALERT1 (AD7293_R2B | AD7293_PAGE(0x12) | 0x18)

◆ AD7293_REG_CL_FR_IT

#define AD7293_REG_CL_FR_IT (AD7293_R2B | AD7293_PAGE(0x2) | 0x2E)

◆ AD7293_REG_CONV_CMD

#define AD7293_REG_CONV_CMD (AD7293_R2B | AD7293_PAGE(0x0) | 0x2)

◆ AD7293_REG_CONV_DELAY

#define AD7293_REG_CONV_DELAY (AD7293_R2B | AD7293_PAGE(0x2) | 0x1A)

◆ AD7293_REG_DAC_EN

#define AD7293_REG_DAC_EN (AD7293_R1B | AD7293_PAGE(0x0) | 0x4)

◆ AD7293_REG_DAC_SNOOZE_1

#define AD7293_REG_DAC_SNOOZE_1 (AD7293_R2B | AD7293_PAGE(0x2) | 0x20)

◆ AD7293_REG_DAC_SNOOZE_O

#define AD7293_REG_DAC_SNOOZE_O (AD7293_R2B | AD7293_PAGE(0x2) | 0x1F)

◆ AD7293_REG_DACVDD_BI

#define AD7293_REG_DACVDD_BI (AD7293_R2B | AD7293_PAGE(0x01) | 0x12)

◆ AD7293_REG_DACVDD_BI_HL

#define AD7293_REG_DACVDD_BI_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x12)

◆ AD7293_REG_DACVDD_BI_HYS

#define AD7293_REG_DACVDD_BI_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x12)

◆ AD7293_REG_DACVDD_BI_LL

#define AD7293_REG_DACVDD_BI_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x12)

◆ AD7293_REG_DACVDD_BI_MAX

#define AD7293_REG_DACVDD_BI_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x12)

◆ AD7293_REG_DACVDD_BI_MIN

#define AD7293_REG_DACVDD_BI_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x12)

◆ AD7293_REG_DACVDD_BI_OFFSET

#define AD7293_REG_DACVDD_BI_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x12)

◆ AD7293_REG_DACVDD_UNI

#define AD7293_REG_DACVDD_UNI (AD7293_R2B | AD7293_PAGE(0x01) | 0x11)

◆ AD7293_REG_DACVDD_UNI_HL

#define AD7293_REG_DACVDD_UNI_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x11)

◆ AD7293_REG_DACVDD_UNI_HYS

#define AD7293_REG_DACVDD_UNI_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x11)

◆ AD7293_REG_DACVDD_UNI_LL

#define AD7293_REG_DACVDD_UNI_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x11)

◆ AD7293_REG_DACVDD_UNI_MAX

#define AD7293_REG_DACVDD_UNI_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x11)

◆ AD7293_REG_DACVDD_UNI_MIN

#define AD7293_REG_DACVDD_UNI_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x11)

◆ AD7293_REG_DACVDD_UNI_OFFSET

#define AD7293_REG_DACVDD_UNI_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x11)

◆ AD7293_REG_DATA_RAW_MSK

#define AD7293_REG_DATA_RAW_MSK NO_OS_GENMASK(15, 4)

◆ AD7293_REG_DEVICE_ID

#define AD7293_REG_DEVICE_ID (AD7293_R2B | AD7293_PAGE(0x0) | 0xC)

◆ AD7293_REG_DIGITAL_FUNC_POL

#define AD7293_REG_DIGITAL_FUNC_POL (AD7293_R2B | AD7293_PAGE(0x2) | 0x13)

◆ AD7293_REG_DIGITAL_INOUT_FUNC

#define AD7293_REG_DIGITAL_INOUT_FUNC (AD7293_R2B | AD7293_PAGE(0x2) | 0x12)

◆ AD7293_REG_DIGITAL_OUT_EN

#define AD7293_REG_DIGITAL_OUT_EN (AD7293_R2B | AD7293_PAGE(0x2) | 0x11)

◆ AD7293_REG_GENERAL

#define AD7293_REG_GENERAL (AD7293_R2B | AD7293_PAGE(0x2) | 0x14)

◆ AD7293_REG_INT_LIMIT_AVSS_ALERT

#define AD7293_REG_INT_LIMIT_AVSS_ALERT (AD7293_R2B | AD7293_PAGE(0x10) | 0x1A)

◆ AD7293_REG_INT_LIMIT_AVSS_ALERT0

#define AD7293_REG_INT_LIMIT_AVSS_ALERT0 (AD7293_R2B | AD7293_PAGE(0x11) | 0x1A)

◆ AD7293_REG_INT_LIMIT_AVSS_ALERT1

#define AD7293_REG_INT_LIMIT_AVSS_ALERT1 (AD7293_R2B | AD7293_PAGE(0x12) | 0x1A)

◆ AD7293_REG_INTEGR_CL

#define AD7293_REG_INTEGR_CL (AD7293_R2B | AD7293_PAGE(0x2) | 0x28)

◆ AD7293_REG_INTX_AVSS_AVDD

#define AD7293_REG_INTX_AVSS_AVDD (AD7293_R2B | AD7293_PAGE(0x2) | 0x2F)

◆ AD7293_REG_ISENSE0_HYS

#define AD7293_REG_ISENSE0_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x28)

◆ AD7293_REG_ISENSE0_LL

#define AD7293_REG_ISENSE0_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x28)

◆ AD7293_REG_ISENSE0_MAX

#define AD7293_REG_ISENSE0_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x28)

◆ AD7293_REG_ISENSE0_MIN

#define AD7293_REG_ISENSE0_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x28)

◆ AD7293_REG_ISENSE0_OFFSET

#define AD7293_REG_ISENSE0_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x28)

◆ AD7293_REG_ISENSE1_HYS

#define AD7293_REG_ISENSE1_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x29)

◆ AD7293_REG_ISENSE1_LL

#define AD7293_REG_ISENSE1_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x29)

◆ AD7293_REG_ISENSE1_MAX

#define AD7293_REG_ISENSE1_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x29)

◆ AD7293_REG_ISENSE1_MIN

#define AD7293_REG_ISENSE1_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x29)

◆ AD7293_REG_ISENSE1_OFFSET

#define AD7293_REG_ISENSE1_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x29)

◆ AD7293_REG_ISENSE2_HYS

#define AD7293_REG_ISENSE2_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x2A)

◆ AD7293_REG_ISENSE2_LL

#define AD7293_REG_ISENSE2_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x2A)

◆ AD7293_REG_ISENSE2_MAX

#define AD7293_REG_ISENSE2_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x2A)

◆ AD7293_REG_ISENSE2_MIN

#define AD7293_REG_ISENSE2_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x2A)

◆ AD7293_REG_ISENSE2_OFFSET

#define AD7293_REG_ISENSE2_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x2A)

◆ AD7293_REG_ISENSE3_HYS

#define AD7293_REG_ISENSE3_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x2B)

◆ AD7293_REG_ISENSE3_LL

#define AD7293_REG_ISENSE3_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x2B)

◆ AD7293_REG_ISENSE3_MAX

#define AD7293_REG_ISENSE3_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x2B)

◆ AD7293_REG_ISENSE3_MIN

#define AD7293_REG_ISENSE3_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x2B)

◆ AD7293_REG_ISENSE3_OFFSET

#define AD7293_REG_ISENSE3_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x2B)

◆ AD7293_REG_ISENSE_0

#define AD7293_REG_ISENSE_0 (AD7293_R2B | AD7293_PAGE(0x0) | 0x28)

◆ AD7293_REG_ISENSE_1

#define AD7293_REG_ISENSE_1 (AD7293_R2B | AD7293_PAGE(0x0) | 0x29)

◆ AD7293_REG_ISENSE_2

#define AD7293_REG_ISENSE_2 (AD7293_R2B | AD7293_PAGE(0x0) | 0x2A)

◆ AD7293_REG_ISENSE_3

#define AD7293_REG_ISENSE_3 (AD7293_R2B | AD7293_PAGE(0x0) | 0x2B)

◆ AD7293_REG_ISENSE_BG_EN

#define AD7293_REG_ISENSE_BG_EN (AD7293_R2B | AD7293_PAGE(0x2) | 0x1C)

◆ AD7293_REG_ISENSE_GAIN

#define AD7293_REG_ISENSE_GAIN (AD7293_R2B | AD7293_PAGE(0x2) | 0x1D)

◆ AD7293_REG_ISENSEX_ALERT

#define AD7293_REG_ISENSEX_ALERT (AD7293_R2B | AD7293_PAGE(0x10) | 0x15)

◆ AD7293_REG_ISENSEX_ALERT0

#define AD7293_REG_ISENSEX_ALERT0 (AD7293_R2B | AD7293_PAGE(0x11) | 0x15)

◆ AD7293_REG_ISENSEX_ALERT1

#define AD7293_REG_ISENSEX_ALERT1 (AD7293_R2B | AD7293_PAGE(0x12) | 0x15)

◆ AD7293_REG_ISENSEX_TSENSEX_SEQ

#define AD7293_REG_ISENSEX_TSENSEX_SEQ (AD7293_R2B | AD7293_PAGE(0x3) | 0x11)

◆ AD7293_REG_NO_OP

#define AD7293_REG_NO_OP (AD7293_R1B | AD7293_PAGE(0x0) | 0x0)

◆ AD7293_REG_PA_ON_CTRL

#define AD7293_REG_PA_ON_CTRL (AD7293_R2B | AD7293_PAGE(0x2) | 0x29)

◆ AD7293_REG_PAGE_SELECT

#define AD7293_REG_PAGE_SELECT (AD7293_R1B | AD7293_PAGE(0x0) | 0x1)

◆ AD7293_REG_RAMP_TIME_0

#define AD7293_REG_RAMP_TIME_0 (AD7293_R2B | AD7293_PAGE(0x2) | 0x2A)

◆ AD7293_REG_RAMP_TIME_1

#define AD7293_REG_RAMP_TIME_1 (AD7293_R2B | AD7293_PAGE(0x2) | 0x2B)

◆ AD7293_REG_RAMP_TIME_2

#define AD7293_REG_RAMP_TIME_2 (AD7293_R2B | AD7293_PAGE(0x2) | 0x2C)

◆ AD7293_REG_RAMP_TIME_3

#define AD7293_REG_RAMP_TIME_3 (AD7293_R2B | AD7293_PAGE(0x2) | 0x2D)

◆ AD7293_REG_RESULT

#define AD7293_REG_RESULT (AD7293_R1B | AD7293_PAGE(0x0) | 0x3)

◆ AD7293_REG_RS0_MON

#define AD7293_REG_RS0_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x28)

◆ AD7293_REG_RS0_MON_HL

#define AD7293_REG_RS0_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x28)

◆ AD7293_REG_RS0_MON_HYS

#define AD7293_REG_RS0_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x28)

◆ AD7293_REG_RS0_MON_LL

#define AD7293_REG_RS0_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x28)

◆ AD7293_REG_RS0_MON_MAX

#define AD7293_REG_RS0_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x28)

◆ AD7293_REG_RS0_MON_MIN

#define AD7293_REG_RS0_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x28)

◆ AD7293_REG_RS0_MON_OFFSET

#define AD7293_REG_RS0_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x28)

◆ AD7293_REG_RS1_MON

#define AD7293_REG_RS1_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x29)

◆ AD7293_REG_RS1_MON_HL

#define AD7293_REG_RS1_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x29)

◆ AD7293_REG_RS1_MON_HYS

#define AD7293_REG_RS1_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x29)

◆ AD7293_REG_RS1_MON_LL

#define AD7293_REG_RS1_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x29)

◆ AD7293_REG_RS1_MON_MAX

#define AD7293_REG_RS1_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x29)

◆ AD7293_REG_RS1_MON_MIN

#define AD7293_REG_RS1_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x29)

◆ AD7293_REG_RS1_MON_OFFSET

#define AD7293_REG_RS1_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x29)

◆ AD7293_REG_RS2_MON

#define AD7293_REG_RS2_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x2A)

◆ AD7293_REG_RS2_MON_HL

#define AD7293_REG_RS2_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x2A)

◆ AD7293_REG_RS2_MON_HYS

#define AD7293_REG_RS2_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x2A)

◆ AD7293_REG_RS2_MON_LL

#define AD7293_REG_RS2_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x2A)

◆ AD7293_REG_RS2_MON_MAX

#define AD7293_REG_RS2_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x2A)

◆ AD7293_REG_RS2_MON_MIN

#define AD7293_REG_RS2_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x2A)

◆ AD7293_REG_RS2_MON_OFFSET

#define AD7293_REG_RS2_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x2A)

◆ AD7293_REG_RS3_MON

#define AD7293_REG_RS3_MON (AD7293_R2B | AD7293_PAGE(0x01) | 0x2B)

◆ AD7293_REG_RS3_MON_HL

#define AD7293_REG_RS3_MON_HL (AD7293_R2B | AD7293_PAGE(0x05) | 0x2B)

◆ AD7293_REG_RS3_MON_HYS

#define AD7293_REG_RS3_MON_HYS (AD7293_R2B | AD7293_PAGE(0x09) | 0x2B)

◆ AD7293_REG_RS3_MON_LL

#define AD7293_REG_RS3_MON_LL (AD7293_R2B | AD7293_PAGE(0x07) | 0x2B)

◆ AD7293_REG_RS3_MON_MAX

#define AD7293_REG_RS3_MON_MAX (AD7293_R2B | AD7293_PAGE(0x0D) | 0x2B)

◆ AD7293_REG_RS3_MON_MIN

#define AD7293_REG_RS3_MON_MIN (AD7293_R2B | AD7293_PAGE(0x0B) | 0x2B)

◆ AD7293_REG_RS3_MON_OFFSET

#define AD7293_REG_RS3_MON_OFFSET (AD7293_R1B | AD7293_PAGE(0x0F) | 0x2B)

◆ AD7293_REG_RSX_MON_ALERT

#define AD7293_REG_RSX_MON_ALERT (AD7293_R2B | AD7293_PAGE(0x10) | 0x19)

◆ AD7293_REG_RSX_MON_ALERT0

#define AD7293_REG_RSX_MON_ALERT0 (AD7293_R2B | AD7293_PAGE(0x11) | 0x19)

◆ AD7293_REG_RSX_MON_ALERT1

#define AD7293_REG_RSX_MON_ALERT1 (AD7293_R2B | AD7293_PAGE(0x12) | 0x19)

◆ AD7293_REG_RSX_MON_BG_EN

#define AD7293_REG_RSX_MON_BG_EN (AD7293_R2B | AD7293_PAGE(0x2) | 0x23)

◆ AD7293_REG_RSX_MON_BI_VOUTX_SEQ

#define AD7293_REG_RSX_MON_BI_VOUTX_SEQ (AD7293_R2B | AD7293_PAGE(0x3) | 0x12)

◆ AD7293_REG_SOFT_RESET

#define AD7293_REG_SOFT_RESET (AD7293_R2B | AD7293_PAGE(0x0) | 0xF)

◆ AD7293_REG_TSENSE_BG_EN

#define AD7293_REG_TSENSE_BG_EN (AD7293_R2B | AD7293_PAGE(0x2) | 0x1B)

◆ AD7293_REG_TSENSE_D0

#define AD7293_REG_TSENSE_D0 (AD7293_R2B | AD7293_PAGE(0x0) | 0x21)

◆ AD7293_REG_TSENSE_D0_HYS

#define AD7293_REG_TSENSE_D0_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x21)

◆ AD7293_REG_TSENSE_D0_LL

#define AD7293_REG_TSENSE_D0_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x20)

◆ AD7293_REG_TSENSE_D0_MAX

#define AD7293_REG_TSENSE_D0_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x21)

◆ AD7293_REG_TSENSE_D0_MIN

#define AD7293_REG_TSENSE_D0_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x21)

◆ AD7293_REG_TSENSE_D0_OFFSET

#define AD7293_REG_TSENSE_D0_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x21)

◆ AD7293_REG_TSENSE_D1

#define AD7293_REG_TSENSE_D1 (AD7293_R2B | AD7293_PAGE(0x0) | 0x22)

◆ AD7293_REG_TSENSE_D1_HYS

#define AD7293_REG_TSENSE_D1_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x22)

◆ AD7293_REG_TSENSE_D1_LL

#define AD7293_REG_TSENSE_D1_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x21)

◆ AD7293_REG_TSENSE_D1_MAX

#define AD7293_REG_TSENSE_D1_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x22)

◆ AD7293_REG_TSENSE_D1_MIN

#define AD7293_REG_TSENSE_D1_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x22)

◆ AD7293_REG_TSENSE_D1_OFFSET

#define AD7293_REG_TSENSE_D1_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x22)

◆ AD7293_REG_TSENSE_D2_LL

#define AD7293_REG_TSENSE_D2_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x22)

◆ AD7293_REG_TSENSE_INT

#define AD7293_REG_TSENSE_INT (AD7293_R2B | AD7293_PAGE(0x0) | 0x20)

◆ AD7293_REG_TSENSE_INT_HYS

#define AD7293_REG_TSENSE_INT_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x20)

◆ AD7293_REG_TSENSE_INT_MAX

#define AD7293_REG_TSENSE_INT_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x20)

◆ AD7293_REG_TSENSE_INT_MIN

#define AD7293_REG_TSENSE_INT_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x20)

◆ AD7293_REG_TSENSE_INT_OFFSET

#define AD7293_REG_TSENSE_INT_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x20)

◆ AD7293_REG_TSENSEX_ALERT

#define AD7293_REG_TSENSEX_ALERT (AD7293_R2B | AD7293_PAGE(0x10) | 0x14)

◆ AD7293_REG_TSENSEX_ALERT0

#define AD7293_REG_TSENSEX_ALERT0 (AD7293_R2B | AD7293_PAGE(0x11) | 0x14)

◆ AD7293_REG_TSENSEX_ALERT1

#define AD7293_REG_TSENSEX_ALERT1 (AD7293_R2B | AD7293_PAGE(0x12) | 0x14)

◆ AD7293_REG_UNI_VOUT0

#define AD7293_REG_UNI_VOUT0 (AD7293_R2B | AD7293_PAGE(0x0) | 0x30)

◆ AD7293_REG_UNI_VOUT0_OFFSET

#define AD7293_REG_UNI_VOUT0_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x30)

◆ AD7293_REG_UNI_VOUT1

#define AD7293_REG_UNI_VOUT1 (AD7293_R2B | AD7293_PAGE(0x0) | 0x31)

◆ AD7293_REG_UNI_VOUT1_OFFSET

#define AD7293_REG_UNI_VOUT1_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x31)

◆ AD7293_REG_UNI_VOUT2

#define AD7293_REG_UNI_VOUT2 (AD7293_R2B | AD7293_PAGE(0x0) | 0x32)

◆ AD7293_REG_UNI_VOUT2_OFFSET

#define AD7293_REG_UNI_VOUT2_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x32)

◆ AD7293_REG_UNI_VOUT3

#define AD7293_REG_UNI_VOUT3 (AD7293_R2B | AD7293_PAGE(0x0) | 0x33)

◆ AD7293_REG_UNI_VOUT3_OFFSET

#define AD7293_REG_UNI_VOUT3_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x33)

◆ AD7293_REG_VIN0

#define AD7293_REG_VIN0 (AD7293_R2B | AD7293_PAGE(0x0) | 0x10)

◆ AD7293_REG_VIN0_HYS

#define AD7293_REG_VIN0_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x10)

◆ AD7293_REG_VIN0_LL

#define AD7293_REG_VIN0_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x10)

◆ AD7293_REG_VIN0_MAX

#define AD7293_REG_VIN0_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x10)

◆ AD7293_REG_VIN0_MIN

#define AD7293_REG_VIN0_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x10)

◆ AD7293_REG_VIN0_OFFSET

#define AD7293_REG_VIN0_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x10)

◆ AD7293_REG_VIN1

#define AD7293_REG_VIN1 (AD7293_R2B | AD7293_PAGE(0x0) | 0x11)

◆ AD7293_REG_VIN1_HYS

#define AD7293_REG_VIN1_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x11)

◆ AD7293_REG_VIN1_LL

#define AD7293_REG_VIN1_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x11)

◆ AD7293_REG_VIN1_MAX

#define AD7293_REG_VIN1_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x11)

◆ AD7293_REG_VIN1_MIN

#define AD7293_REG_VIN1_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x11)

◆ AD7293_REG_VIN1_OFFSET

#define AD7293_REG_VIN1_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x11)

◆ AD7293_REG_VIN2

#define AD7293_REG_VIN2 (AD7293_R2B | AD7293_PAGE(0x0) | 0x12)

◆ AD7293_REG_VIN2_HYS

#define AD7293_REG_VIN2_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x12)

◆ AD7293_REG_VIN2_LL

#define AD7293_REG_VIN2_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x12)

◆ AD7293_REG_VIN2_MAX

#define AD7293_REG_VIN2_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x12)

◆ AD7293_REG_VIN2_MIN

#define AD7293_REG_VIN2_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x12)

◆ AD7293_REG_VIN2_OFFSET

#define AD7293_REG_VIN2_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x12)

◆ AD7293_REG_VIN3

#define AD7293_REG_VIN3 (AD7293_R2B | AD7293_PAGE(0x0) | 0x13)

◆ AD7293_REG_VIN3_HYS

#define AD7293_REG_VIN3_HYS (AD7293_R2B | AD7293_PAGE(0x08) | 0x13)

◆ AD7293_REG_VIN3_LL

#define AD7293_REG_VIN3_LL (AD7293_R2B | AD7293_PAGE(0x06) | 0x13)

◆ AD7293_REG_VIN3_MAX

#define AD7293_REG_VIN3_MAX (AD7293_R2B | AD7293_PAGE(0x0C) | 0x13)

◆ AD7293_REG_VIN3_MIN

#define AD7293_REG_VIN3_MIN (AD7293_R2B | AD7293_PAGE(0x0A) | 0x13)

◆ AD7293_REG_VIN3_OFFSET

#define AD7293_REG_VIN3_OFFSET (AD7293_R1B | AD7293_PAGE(0xE) | 0x13)

◆ AD7293_REG_VINX_ALERT

#define AD7293_REG_VINX_ALERT (AD7293_R2B | AD7293_PAGE(0x10) | 0x12)

◆ AD7293_REG_VINX_ALERT0

#define AD7293_REG_VINX_ALERT0 (AD7293_R2B | AD7293_PAGE(0x11) | 0x12)

◆ AD7293_REG_VINX_ALERT1

#define AD7293_REG_VINX_ALERT1 (AD7293_R2B | AD7293_PAGE(0x12) | 0x12)

◆ AD7293_REG_VINX_DIFF_SE

#define AD7293_REG_VINX_DIFF_SE (AD7293_R2B | AD7293_PAGE(0x2) | 0x17)

◆ AD7293_REG_VINX_FILTER

#define AD7293_REG_VINX_FILTER (AD7293_R2B | AD7293_PAGE(0x2) | 0x18)

◆ AD7293_REG_VINX_RANGE0

#define AD7293_REG_VINX_RANGE0 (AD7293_R2B | AD7293_PAGE(0x2) | 0x15)

◆ AD7293_REG_VINX_RANGE1

#define AD7293_REG_VINX_RANGE1 (AD7293_R2B | AD7293_PAGE(0x2) | 0x16)

◆ AD7293_REG_VINX_RANGE_GET_CH_MSK

#define AD7293_REG_VINX_RANGE_GET_CH_MSK	(		x,
			ch )

Value:

(((x) >> (ch)) & 0x1)

◆ AD7293_REG_VINX_RANGE_SET_CH_MSK

#define AD7293_REG_VINX_RANGE_SET_CH_MSK	(		x,
			ch )

Value:

(((x) & 0x1) << (ch))

◆ AD7293_REG_VINX_SEQ

#define AD7293_REG_VINX_SEQ (AD7293_R2B | AD7293_PAGE(0x3) | 0x10)

◆ AD7293_REG_VOUT_OFFSET_MSK

#define AD7293_REG_VOUT_OFFSET_MSK NO_OS_GENMASK(5, 4)

◆ AD7293_SOFT_RESET_CLR_VAL

#define AD7293_SOFT_RESET_CLR_VAL 0x0000

◆ AD7293_SOFT_RESET_VAL

#define AD7293_SOFT_RESET_VAL 0x7293

◆ AD7293_TRANSF_LEN_MSK

#define AD7293_TRANSF_LEN_MSK NO_OS_GENMASK(17, 16)

Enumeration Type Documentation

◆ ad7293_ch_type

enum ad7293_ch_type

AD7293 Channel Type.

Enumerator
AD7293_ADC_VINX
AD7293_ADC_TSENSE
AD7293_ADC_ISENSE
AD7293_DAC

Function Documentation

◆ ad7293_adc_get_range()

int ad7293_adc_get_range	(	struct ad7293_dev *	dev,
		unsigned int	ch,
		uint16_t *	range )

Get the range value for ADC channels.

AD7293 get ADC range

Parameters

dev	- The device structure.
ch	- the channel number.
range	- the range value.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_adc_set_range()

int ad7293_adc_set_range	(	struct ad7293_dev *	dev,
		unsigned int	ch,
		uint16_t	range )

Set the range value for ADC channels.

AD7293 set ADC range

Parameters

dev	- The device structure.
ch	- the channel number.
range	- the range value.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_ch_read_raw()

int ad7293_ch_read_raw	(	struct ad7293_dev *	dev,
		enum ad7293_ch_type	type,
		unsigned int	ch,
		uint16_t *	raw )

Read raw value for specific channel and channel type.

AD7293 read raw value

Parameters

dev	- The device structure.
type	- The channel type.
ch	- the channel number.
raw	- the raw value read.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_dac_write_raw()

int ad7293_dac_write_raw	(	struct ad7293_dev *	dev,
		unsigned int	ch,
		uint16_t	raw )

Set the DAC output raw value.

AD7293 write DAC value

Parameters

dev	- The device structure.
ch	- the channel number.
raw	- the raw value to be written.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_get_offset()

int ad7293_get_offset	(	struct ad7293_dev *	dev,
		enum ad7293_ch_type	type,
		unsigned int	ch,
		uint16_t *	offset )

Set offset value for specific channel and channel type.

AD7293 get offset

Parameters

dev	- The device structure.
type	- The channel type.
ch	- the channel number.
offset	- the raw value to be written.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_init()

int ad7293_init	(	struct ad7293_dev **	device,
		struct ad7293_init_param *	init_param )

Initializes the ad7293.

AD7293 Initialization

Parameters

device	- The device structure.
init_param	- The structure containing the device initial parameters.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_isense_get_gain()

int ad7293_isense_get_gain	(	struct ad7293_dev *	dev,
		unsigned int	ch,
		uint16_t *	gain )

Get the gain value for ISENSE channels.

AD7293 get ISENSE gain

Parameters

dev	- The device structure.
ch	- the channel number.
gain	- the gain read.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_isense_set_gain()

int ad7293_isense_set_gain	(	struct ad7293_dev *	dev,
		unsigned int	ch,
		uint16_t	gain )

Set the gain value for ISENSE channels.

AD7293 set ISENSE gain

Parameters

dev	- The device structure.
ch	- the channel number.
gain	- the range value.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_remove()

int ad7293_remove ( struct ad7293_dev * dev )

AD7293 Resources Deallocation.

AD7293 Resources Deallocation

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ ad7293_reset()

int ad7293_reset ( struct ad7293_dev * dev )

Perform both hardware and software reset.

AD7293 Reset

Parameters

dev-	The device structure.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_set_offset()

int ad7293_set_offset	(	struct ad7293_dev *	dev,
		enum ad7293_ch_type	type,
		unsigned int	ch,
		uint16_t	offset )

Set offset value for specific channel and channel type.

AD7293 set offset

Parameters

dev	- The device structure.
type	- The channel type.
ch	- the channel number.
offset	- the raw value read.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_soft_reset()

int ad7293_soft_reset ( struct ad7293_dev * dev )

Perform software reset.

AD7293 Software Reset

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code.

◆ ad7293_spi_read()

int ad7293_spi_read	(	struct ad7293_dev *	dev,
		unsigned int	reg,
		uint16_t *	val )

Reads data from AD7293 over SPI.

AD7293 SPI read

Parameters

dev	- The device structure.
reg	- The register address.
val	- Data read from the device.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ ad7293_spi_update_bits()

int ad7293_spi_update_bits	(	struct ad7293_dev *	dev,
		unsigned int	reg,
		uint16_t	mask,
		uint16_t	val )

Update AD7293 register.

AD7293 SPI update bits

Parameters

dev	- The device structure.
reg	- The register address.
mask	- Mask for specific register bits to be updated.
val	- Data written to the device (requires prior bit shifting).

Returns: Returns 0 in case of success or negative error code otherwise.

◆ ad7293_spi_write()

int ad7293_spi_write	(	struct ad7293_dev *	dev,
		unsigned int	reg,
		uint16_t	val )

Writes data to AD7293 over SPI.

AD7293 SPI write

Parameters

dev	- The device structure.
reg	- The register address.
val	- Data value to write.

Returns: Returns 0 in case of success or negative error code otherwise.

Classes

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ AD7293_BUFF_SIZE_BYTES

◆ AD7293_CHIP_ID

◆ AD7293_CONV_CMD_VAL

◆ AD7293_PAGE

◆ AD7293_PAGE_ADDR_MSK

◆ AD7293_R1B

◆ AD7293_R2B

◆ AD7293_READ

◆ AD7293_REG_ADDR_MSK

◆ AD7293_REG_ALERT_SUM

◆ AD7293_REG_AVDD

◆ AD7293_REG_AVDD_HL

◆ AD7293_REG_AVDD_HYS

◆ AD7293_REG_AVDD_LL

◆ AD7293_REG_AVDD_MAX

◆ AD7293_REG_AVDD_MIN

◆ AD7293_REG_AVDD_OFFSET

◆ AD7293_REG_AVSS

◆ AD7293_REG_AVSS_HL

◆ AD7293_REG_AVSS_HYS

◆ AD7293_REG_AVSS_LL

◆ AD7293_REG_AVSS_MAX

◆ AD7293_REG_AVSS_MIN

◆ AD7293_REG_AVSS_OFFSET

◆ AD7293_REG_BG_EN

◆ AD7293_REG_BI_VIOU1_MON

◆ AD7293_REG_BI_VOUT0

◆ AD7293_REG_BI_VOUT0_MON

◆ AD7293_REG_BI_VOUT0_MON_HL

◆ AD7293_REG_BI_VOUT0_MON_HYS

◆ AD7293_REG_BI_VOUT0_MON_LL

◆ AD7293_REG_BI_VOUT0_MON_MAX

◆ AD7293_REG_BI_VOUT0_MON_MIN

◆ AD7293_REG_BI_VOUT0_MON_OFFSET

◆ AD7293_REG_BI_VOUT0_OFFSET

◆ AD7293_REG_BI_VOUT1

◆ AD7293_REG_BI_VOUT1_MON_HL

◆ AD7293_REG_BI_VOUT1_MON_HYS

◆ AD7293_REG_BI_VOUT1_MON_LL

◆ AD7293_REG_BI_VOUT1_MON_MAX

◆ AD7293_REG_BI_VOUT1_MON_MIN

◆ AD7293_REG_BI_VOUT1_MON_OFFSET

◆ AD7293_REG_BI_VOUT1_OFFSET

◆ AD7293_REG_BI_VOUT2

◆ AD7293_REG_BI_VOUT2_MON

◆ AD7293_REG_BI_VOUT2_MON_HL

◆ AD7293_REG_BI_VOUT2_MON_HYS

◆ AD7293_REG_BI_VOUT2_MON_LL

◆ AD7293_REG_BI_VOUT2_MON_MAX

◆ AD7293_REG_BI_VOUT2_MON_MIN

◆ AD7293_REG_BI_VOUT2_MON_OFFSET

◆ AD7293_REG_BI_VOUT2_OFFSET

◆ AD7293_REG_BI_VOUT3

◆ AD7293_REG_BI_VOUT3_MON

◆ AD7293_REG_BI_VOUT3_MON_HL

◆ AD7293_REG_BI_VOUT3_MON_HYS

◆ AD7293_REG_BI_VOUT3_MON_LL

◆ AD7293_REG_BI_VOUT3_MON_MAX

◆ AD7293_REG_BI_VOUT3_MON_MIN

◆ AD7293_REG_BI_VOUT3_MON_OFFSET

◆ AD7293_REG_BI_VOUT3_OFFSET

◆ AD7293_REG_BI_VOUTX_MON_ALERT

◆ AD7293_REG_BI_VOUTX_MON_ALERT0

◆ AD7293_REG_BI_VOUTX_MON_ALERT1

◆ AD7293_REG_CL_FR_IT

◆ AD7293_REG_CONV_CMD

◆ AD7293_REG_CONV_DELAY

◆ AD7293_REG_DAC_EN

◆ AD7293_REG_DAC_SNOOZE_1

◆ AD7293_REG_DAC_SNOOZE_O

◆ AD7293_REG_DACVDD_BI

◆ AD7293_REG_DACVDD_BI_HL

◆ AD7293_REG_DACVDD_BI_HYS

◆ AD7293_REG_DACVDD_BI_LL