no-OS/doxygen/ad7606_8h_source.html

/***************************************************************************/

#ifndef AD7606_H_

#define AD7606_H_


/******************************************************************************/

/***************************** Include Files **********************************/

/******************************************************************************/

#include <stdint.h>

#include <stdbool.h>

#include "no_os_delay.h"

#include "no_os_gpio.h"

#include "no_os_spi.h"

#include "no_os_util.h"


#include "no_os_pwm.h"

#include "clk_axi_clkgen.h"


/******************************************************************************/

/********************** Macros and Constants Definitions **********************/

/******************************************************************************/

#define AD7606_REG_STATUS           0x01

#define AD7606_REG_CONFIG           0x02

#define AD7606_REG_RANGE_CH_ADDR(ch)        (0x03 + ((ch) >> 1))

#define AD7606_REG_BANDWIDTH            0x07

#define AD7606_REG_OVERSAMPLING         0x08

#define AD7606_REG_GAIN_CH(ch)          (0x09 + (ch))

#define AD7606_REG_OFFSET_CH(ch)        (0x11 + (ch))

#define AD7606_REG_PHASE_CH(ch)         (0x19 + (ch))

#define AD7606_REG_DIGITAL_DIAG_ENABLE      0x21

#define AD7606_REG_DIGITAL_DIAG_ERR     0x22

#define AD7606_REG_OPEN_DETECT_ENABLE       0x23

#define AD7606_REG_OPEN_DETECTED        0x24

#define AD7606_REG_AIN_OV_UV_DIAG_ENABLE    0x25

#define AD7606_REG_AIN_OV_DIAG_ERROR        0x26

#define AD7606_REG_AIN_UV_DIAG_ERROR        0x27

#define AD7606_REG_DIAGNOSTIC_MUX_CH(ch)    (0x28 + ((ch) >> 1))

#define AD7606_REG_OPEN_DETECT_QUEUE        0x2C

#define AD7606_REG_CLK_FS_COUNTER       0x2D

#define AD7606_REG_CLK_OS_COUNTER       0x2E

#define AD7606_REG_ID               0x2F


/* AD7606_REG_STATUS */

#define AD7606_STATUS_CHANNEL_MSK       NO_OS_GENMASK(2,0)

#define AD7606_AIN_UV_ERR_MSK           NO_OS_BIT(3)

#define AD7606_AIN_OV_ERR_MSK           NO_OS_BIT(4)

#define AD7606_OPEN_DETECTED_MSK        NO_OS_BIT(5)

#define AD7606_DIGITAL_ERROR_MSK        NO_OS_BIT(6)

#define AD7606_RESET_DETECT_MSK         NO_OS_BIT(7)


/* AD7606_REG_CONFIG */

#define AD7606_CONFIG_OPERATION_MODE_MSK    NO_OS_GENMASK(1,0)

#define AD7606_CONFIG_DOUT_FORMAT_MSK       NO_OS_GENMASK(4,3)

#define AD7606_CONFIG_EXT_OS_CLOCK_MSK      NO_OS_BIT(5)

#define AD7606_CONFIG_STATUS_HEADER_MSK     NO_OS_BIT(6)


/* AD7606_REG_RANGE_CH_X_Y */

#define AD7606_RANGE_CH_MSK(ch)     (NO_OS_GENMASK(3, 0) << (4 * ((ch) % 2)))

#define AD7606_RANGE_CH_MODE(ch, mode)  \

    ((NO_OS_GENMASK(3, 0) & mode) << (4 * ((ch) % 2)))


/* AD7606_REG_OVERSAMPLING */

#define AD7606_OS_PAD_MSK           NO_OS_GENMASK(7,4)

#define AD7606_OS_RATIO_MSK         NO_OS_GENMASK(3,0)


/* AD7606_REG_ID */

#define AD7606_ID_DEVICE_ID_MSK         NO_OS_GENMASK(7,4)

#define AD7606_ID_SILICON_REVISION_MSK      NO_OS_GENMASK(3,0)


/* AD7606_REG_GAIN_CH */

#define AD7606_GAIN_MSK             NO_OS_GENMASK(5,0)


/* AD7606_REG_DIGITAL_DIAG_ENABLE */

#define AD7606_ROM_CRC_ERR_EN_MSK       NO_OS_BIT(0)

#define AD7606_MM_CRC_ERR_EN_MSK        NO_OS_BIT(1)

#define AD7606_INT_CRC_ERR_EN_MSK       NO_OS_BIT(2)

#define AD7606_SPI_WRITE_ERR_EN_MSK     NO_OS_BIT(3)

#define AD7606_SPI_READ_ERR_EN_MSK      NO_OS_BIT(4)

#define AD7606_BUSY_STUCK_HIGH_ERR_EN_MSK   NO_OS_BIT(5)

#define AD7606_CLK_FS_OS_COUNTER_EN_MSK     NO_OS_BIT(6)

#define AD7606_INTERFACE_CHECK_EN_MSK       NO_OS_BIT(7)


/* AD7606_REG_DIAGNOSTIC_MUX_CH */

#define AD7606_DIAGN_MUX_CH_MSK(ch)     (NO_OS_GENMASK(2, 0) << (3 * (ch & 0x1)))


#define AD7606_SERIAL_RD_FLAG_MSK(x)        (NO_OS_BIT(6) | ((x) & 0x3F))

#define AD7606_SERIAL_WR_FLAG_MSK(x)        ((x) & 0x3F)


#define AD7606_PARALLEL_RD_FLAG_MSK(x)      (NO_OS_BIT(7) | ((x) & 0x7F))

#define AD7606_PARALLEL_WR_FLAG_MSK(x)      ((x) & 0x7F)


#define AD7606_MAX_CHANNELS     8


enum ad7606_device_id {

    ID_AD7605_4,

    ID_AD7606_4,

    ID_AD7606_6,

    ID_AD7606_8,

    ID_AD7606B,

    ID_AD7606C_16,

    ID_AD7606C_18,

    ID_AD7608,

    ID_AD7609,

};


enum ad7606_osr {

    AD7606_OSR_1,

    AD7606_OSR_2,

    AD7606_OSR_4,

    AD7606_OSR_8,

    AD7606_OSR_16,

    AD7606_OSR_32,

    AD7606_OSR_64,

    AD7606_OSR_128,

    AD7606_OSR_256

};


enum ad7606_op_mode {

    AD7606_NORMAL,

    AD7606_STANDBY,

    AD7606_AUTOSTANDBY,

    AD7606_SHUTDOWN

};


enum ad7606_dout_format {

    AD7606_1_DOUT,

    AD7606_2_DOUT,

    AD7606_4_DOUT,

    AD7606_8_DOUT

};


enum ad7606_range_type {

    AD7606_HW_RANGE,

    AD7606_SW_RANGE_SINGLE_ENDED_UNIPOLAR,

    AD7606_SW_RANGE_SINGLE_ENDED_BIPOLAR,

    AD7606_SW_RANGE_DIFFERENTIAL_BIPOLAR,

};


struct ad7606_config {

    enum ad7606_op_mode op_mode;

    enum ad7606_dout_format dout_format;

    bool ext_os_clock;

    bool status_header;

};


struct ad7606_range {

    int32_t min;

    int32_t max;

    enum ad7606_range_type type;

};


struct ad7606_oversampling {

    uint8_t os_pad: 4;

    enum ad7606_osr os_ratio : 4;

};


struct ad7606_digital_diag {

    bool rom_crc_err_en: 1;

    bool mm_crc_err_en: 1;

    bool int_crc_err_en: 1;

    bool spi_write_err_en: 1;

    bool spi_read_err_en: 1;

    bool busy_stuck_high_err_en: 1;

    bool clk_fs_os_counter_en: 1;

    bool interface_check_en: 1;

};


struct ad7606_dev;


struct ad7606_axi_init_param {

    /* Clock generator init parameters */

    struct axi_clkgen_init *clkgen_init;

    /* Clock generator rate */

    uint32_t axi_clkgen_rate;

    /* PWM generator init structure */

    struct no_os_pwm_init_param *trigger_pwm_init;

    /* SPI Engine offload parameters */

    struct spi_engine_offload_init_param *offload_init_param;

    /* AXI Core */

    uint32_t core_baseaddr;

    /* RX DMA base address */

    uint32_t rx_dma_baseaddr;

    uint32_t reg_access_speed;

    void (*dcache_invalidate_range)(uint32_t address, uint32_t bytes_count);

};


struct ad7606_init_param {

    struct no_os_spi_init_param spi_init;

    /* AXI initialization parameters */

    struct ad7606_axi_init_param *axi_init;

    struct no_os_gpio_init_param *gpio_reset;

    struct no_os_gpio_init_param *gpio_convst;

    struct no_os_gpio_init_param *gpio_busy;

    struct no_os_gpio_init_param *gpio_stby_n;

    struct no_os_gpio_init_param *gpio_range;

    struct no_os_gpio_init_param *gpio_os0;

    struct no_os_gpio_init_param *gpio_os1;

    struct no_os_gpio_init_param *gpio_os2;

    struct no_os_gpio_init_param *gpio_par_ser;

    enum ad7606_device_id device_id;

    struct ad7606_oversampling oversampling;

    bool sw_mode;

    bool parallel_interface;

    struct ad7606_config config;

    struct ad7606_digital_diag digital_diag_enable;

    int8_t offset_ch[AD7606_MAX_CHANNELS];

    uint8_t phase_ch[AD7606_MAX_CHANNELS];

    uint8_t gain_ch[AD7606_MAX_CHANNELS];

    struct ad7606_range range_ch[AD7606_MAX_CHANNELS];

};


const struct ad7606_range *ad7606_get_ch_ranges(struct ad7606_dev *dev,

        uint8_t ch,

        uint32_t *num_ranges);


int32_t ad7606_capture_pre_enable(struct ad7606_dev *dev);

void ad7606_capture_post_disable(struct ad7606_dev *dev);


bool ad7606_sw_mode_enabled(struct ad7606_dev *dev);


int32_t ad7606_get_channels_number(struct ad7606_dev *dev);


int32_t ad7606_reg_read(struct ad7606_dev *dev,

            uint8_t reg_addr,

            uint8_t *reg_data);

int32_t ad7606_reg_write(struct ad7606_dev *dev,

             uint8_t reg_addr,

             uint8_t reg_data);

int32_t ad7606_write_mask(struct ad7606_dev *dev,

              uint32_t addr,

              uint32_t mask,

              uint32_t val);

int32_t ad7606_spi_data_read(struct ad7606_dev *dev,

                 uint32_t *data);

int32_t ad7606_read_samples(struct ad7606_dev *dev,

                uint32_t *data,

                uint32_t samples);

int32_t ad7606_convst(struct ad7606_dev *dev);

int32_t ad7606_reset(struct ad7606_dev *dev);

int32_t ad7606_set_oversampling(struct ad7606_dev *dev,

                struct ad7606_oversampling oversampling);

int32_t ad7606_get_oversampling(struct ad7606_dev *dev,

                struct ad7606_oversampling *oversampling);

int32_t ad7606_get_ch_scale(struct ad7606_dev *dev, uint8_t ch,

                double *scale);

int32_t ad7606_get_resolution_bits(struct ad7606_dev *dev);

int32_t ad7606_set_ch_range(struct ad7606_dev *dev, uint8_t ch,

                struct ad7606_range range);

int32_t ad7606_set_ch_offset(struct ad7606_dev *dev, uint8_t ch,

                 int8_t offset);

int32_t ad7606_set_ch_phase(struct ad7606_dev *dev, uint8_t ch,

                uint8_t phase);

int32_t ad7606_set_ch_gain(struct ad7606_dev *dev, uint8_t ch,

               uint8_t gain);

int32_t ad7606_set_config(struct ad7606_dev *dev,

              struct ad7606_config config);

int32_t ad7606_set_digital_diag(struct ad7606_dev *dev,

                struct ad7606_digital_diag diag);

int32_t ad7606_init(struct ad7606_dev **device,

            struct ad7606_init_param *init_param);

int32_t ad7606_data_correction_serial(struct ad7606_dev *dev,

                      uint32_t *buf, int32_t *data, uint8_t *status);

int32_t ad7606_remove(struct ad7606_dev *dev);

#endif /* AD7606_H_ */