ad7779.h File Reference

Header file of AD7779 Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_delay.h"
#include "no_os_gpio.h"
#include "no_os_spi.h"

Include dependency graph for ad7779.h:

Classes
struct	ad7779_dev
struct	ad7779_init_param

Macros
#define	AD7779_REG_CH_CONFIG(ch)
#define	AD7779_REG_CH_DISABLE   0x08
#define	AD7779_REG_CH_SYNC_OFFSET(ch)
#define	AD7779_REG_GENERAL_USER_CONFIG_1   0x11
#define	AD7779_REG_GENERAL_USER_CONFIG_2   0x12
#define	AD7779_REG_GENERAL_USER_CONFIG_3   0x13
#define	AD7779_REG_DOUT_FORMAT   0x14
#define	AD7779_REG_ADC_MUX_CONFIG   0x15
#define	AD7779_REG_GLOBAL_MUX_CONFIG   0x16
#define	AD7779_REG_GPIO_CONFIG   0x17
#define	AD7779_REG_GPIO_DATA   0x18
#define	AD7779_REG_BUFFER_CONFIG_1   0x19
#define	AD7779_REG_BUFFER_CONFIG_2   0x1A
#define	AD7779_REG_CH_OFFSET_UPPER_BYTE(ch)
#define	AD7779_REG_CH_OFFSET_MID_BYTE(ch)
#define	AD7779_REG_CH_OFFSET_LOWER_BYTE(ch)
#define	AD7779_REG_CH_GAIN_UPPER_BYTE(ch)
#define	AD7779_REG_CH_GAIN_MID_BYTE(ch)
#define	AD7779_REG_CH_GAIN_LOWER_BYTE(ch)
#define	AD7779_REG_CH_ERR_REG(ch)
#define	AD7779_REG_CH0_1_SAT_ERR   0x54
#define	AD7779_REG_CH2_3_SAT_ERR   0x55
#define	AD7779_REG_CH4_5_SAT_ERR   0x56
#define	AD7779_REG_CH6_7_SAT_ERR   0x57
#define	AD7779_REG_CHX_ERR_REG_EN   0x58
#define	AD7779_REG_GEN_ERR_REG_1   0x59
#define	AD7779_REG_GEN_ERR_REG_1_EN   0x5A
#define	AD7779_REG_GEN_ERR_REG_2   0x5B
#define	AD7779_REG_GEN_ERR_REG_2_EN   0x5C
#define	AD7779_REG_STATUS_REG_1   0x5D
#define	AD7779_REG_STATUS_REG_2   0x5E
#define	AD7779_REG_STATUS_REG_3   0x5F
#define	AD7779_REG_SRC_N_MSB   0x60
#define	AD7779_REG_SRC_N_LSB   0x61
#define	AD7779_REG_SRC_IF_MSB   0x62
#define	AD7779_REG_SRC_IF_LSB   0x63
#define	AD7779_REG_SRC_UPDATE   0x64
#define	AD7779_CH_GAIN(x)
#define	AD7779_CH_RX   (1 << 4)
#define	AD7779_CH_DISABLE(x)
#define	AD7779_ALL_CH_DIS_MCLK_EN   (1 << 7)
#define	AD7779_MOD_POWERMODE   (1 << 6)
#define	AD7779_PDB_VCM   (1 << 5)
#define	AD7779_PDB_REFOUT_BUF   (1 << 4)
#define	AD7779_PDB_SAR   (1 << 3)
#define	AD7779_PDB_RC_OSC   (1 << 2)
#define	AD7779_SOFT_RESET(x)
#define	AD7771_FILTER_MODE   (1 << 6)
#define	AD7779_SAR_DIAG_MODE_EN   (1 << 5)
#define	AD7779_SDO_DRIVE_STR(x)
#define	AD7779_DOUT_DRIVE_STR(x)
#define	AD7779_SPI_SYNC   (1 << 0)
#define	AD7779_CONVST_DEGLITCH_DIS(x)
#define	AD7779_SPI_SLAVE_MODE_EN   (1 << 4)
#define	AD7779_CLK_QUAL_DIS   (1 << 0)
#define	AD7779_DOUT_FORMAT(x)
#define	AD7779_DOUT_HEADER_FORMAT   (1 << 5)
#define	AD7779_DCLK_CLK_DIV(x)
#define	AD7779_REF_MUX_CTRL(x)
#define	AD7779_GLOBAL_MUX_CTRL(x)
#define	AD7779_REF_BUF_POS_EN   (1 << 4)
#define	AD7779_REF_BUF_NEG_EN   (1 << 3)
#define	AD7779_REFBUFP_PREQ   (1 << 7)
#define	AD7779_REFBUFN_PREQ   (1 << 6)
#define	AD7779_PDB_ALDO1_OVRDRV   (1 << 2)
#define	AD7779_PDB_ALDO2_OVRDRV   (1 << 1)
#define	AD7779_PDB_DLDO_OVRDRV   (1 << 0)
#define	AD7779_MEMMAP_CRC_TEST_EN   (1 << 5)
#define	AD7779_ROM_CRC_TEST_EN   (1 << 4)
#define	AD7779_SPI_CLK_COUNT_TEST_EN   (1 << 3)
#define	AD7779_SPI_INVALID_READ_TEST_EN   (1 << 2)
#define	AD7779_SPI_INVALID_WRITE_TEST_EN   (1 << 1)
#define	AD7779_SPI_CRC_TEST_EN   (1 << 0)
#define	AD7779_CRC8_POLY   0x07

Enumerations
enum	ad7779_ctrl_mode {   AD7779_PIN_CTRL ,   AD7779_SPI_CTRL }
enum	ad7779_spi_op_mode {   AD7779_INT_REG ,   AD7779_SD_CONV ,   AD7779_SAR_CONV }
enum	ad7779_ch {   AD7779_CH0 ,   AD7779_CH1 ,   AD7779_CH2 ,   AD7779_CH3 ,   AD7779_CH4 ,   AD7779_CH5 ,   AD7779_CH6 ,   AD7779_CH7 }
enum	ad7779_state {   AD7779_ENABLE ,   AD7779_DISABLE }
enum	ad7779_gain {   AD7779_GAIN_1 ,   AD7779_GAIN_2 ,   AD7779_GAIN_4 ,   AD7779_GAIN_8 }
enum	ad7779_dclk_div {   AD7779_DCLK_DIV_1 ,   AD7779_DCLK_DIV_2 ,   AD7779_DCLK_DIV_4 ,   AD7779_DCLK_DIV_8 ,   AD7779_DCLK_DIV_16 ,   AD7779_DCLK_DIV_32 ,   AD7779_DCLK_DIV_64 ,   AD7779_DCLK_DIV_128 }
enum	ad7779_pwr_mode {   AD7779_LOW_PWR ,   AD7779_HIGH_RES }
enum	ad7779_ref_type {   AD7779_EXT_REF ,   AD7779_INT_REF ,   AD7779_EXT_SUPPLY ,   AD7779_EXT_REF_INV }
enum	ad7779_refx_pin {   AD7779_REFX_P ,   AD7779_REFX_N }
enum	ad7779_ref_buf_op_mode {   AD7779_REF_BUF_ENABLED ,   AD7779_REF_BUF_PRECHARGED ,   AD7779_REF_BUF_DISABLED }
enum	ad7779_sar_mux {   AD7779_AUXAINP_AUXAINN ,   AD7779_DVBE_AVSSX ,   AD7779_REF1P_REF1N ,   AD7779_REF2P_REF2N ,   AD7779_REF_OUT_AVSSX ,   AD7779_VCM_AVSSX ,   AD7779_AREG1CAP_AVSSX_ATT ,   AD7779_AREG2CAP_AVSSX_ATT ,   AD7779_DREGCAP_DGND_ATT ,   AD7779_AVDD1A_AVSSX_ATT ,   AD7779_AVDD1B_AVSSX_ATT ,   AD7779_AVDD2A_AVSSX_ATT ,   AD7779_AVDD2B_AVSSX_ATT ,   AD7779_IOVDD_DGND_ATT ,   AD7779_AVDD4_AVSSX ,   AD7779_DGND_AVSS1A_ATT ,   AD7779_DGND_AVSS1B_ATT ,   AD7779_DGND_AVSSX_ATT ,   AD7779_AVDD4_AVSSX_ATT ,   AD7779_REF1P_AVSSX ,   AD7779_REF2P_AVSSX ,   AD7779_AVSSX_AVDD4_ATT }

Functions
uint8_t	ad7779_compute_crc8 (uint8_t *data, uint8_t data_size)
int32_t	ad7779_spi_int_reg_read (ad7779_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
int32_t	ad7779_spi_int_reg_write (ad7779_dev *dev, uint8_t reg_addr, uint8_t reg_data)
int32_t	ad7779_spi_int_reg_read_mask (ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
int32_t	ad7779_spi_int_reg_write_mask (ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
int32_t	ad7779_spi_sar_read_code (ad7779_dev *dev, ad7779_sar_mux mux_next_conv, uint16_t *sar_code)
int32_t	ad7779_set_spi_op_mode (ad7779_dev *dev, ad7779_spi_op_mode mode)
int32_t	ad7779_get_spi_op_mode (ad7779_dev *dev, ad7779_spi_op_mode *mode)
int32_t	ad7779_set_state (ad7779_dev *dev, ad7779_ch ch, ad7779_state state)
int32_t	ad7779_get_state (ad7779_dev *dev, ad7779_ch ch, ad7779_state *state)
int32_t	ad7779_do_update_mode_pins (ad7779_dev *dev)
int32_t	ad7779_set_gain (ad7779_dev *dev, ad7779_ch ch, ad7779_gain gain)
int32_t	ad7779_get_gain (ad7779_dev *dev, ad7779_ch ch, ad7779_gain *gain)
int32_t	ad7779_set_dec_rate (ad7779_dev *dev, uint16_t int_val, uint16_t dec_val)
int32_t	ad7779_get_dec_rate (ad7779_dev *dev, uint16_t *int_val, uint16_t *dec_val)
int32_t	ad7779_set_power_mode (ad7779_dev *dev, ad7779_pwr_mode pwr_mode)
int32_t	ad7779_get_power_mode (ad7779_dev *dev, ad7779_pwr_mode *pwr_mode)
int32_t	ad7779_set_reference_type (ad7779_dev *dev, ad7779_ref_type ref_type)
int32_t	ad7779_get_reference_type (ad7779_dev *dev, ad7779_ref_type *ref_type)
int32_t	ad7779_set_dclk_div (ad7779_dev *dev, ad7779_dclk_div div)
int32_t	ad7779_get_dclk_div (ad7779_dev *dev, ad7779_dclk_div *div)
int32_t	ad7779_set_sync_offset (ad7779_dev *dev, ad7779_ch ch, uint8_t sync_offset)
int32_t	ad7779_get_sync_offset (ad7779_dev *dev, ad7779_ch ch, uint8_t *sync_offset)
int32_t	ad7779_set_offset_corr (ad7779_dev *dev, ad7779_ch ch, uint32_t offset)
int32_t	ad7779_get_offset_corr (ad7779_dev *dev, ad7779_ch ch, uint32_t *offset)
int32_t	ad7779_set_gain_corr (ad7779_dev *dev, ad7779_ch ch, uint32_t gain)
int32_t	ad7779_get_gain_corr (ad7779_dev *dev, ad7779_ch ch, uint32_t *gain)
int32_t	ad7779_set_ref_buf_op_mode (ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode mode)
int32_t	ad7779_get_ref_buf_op_mode (ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode *mode)
int32_t	ad7779_set_sar_cfg (ad7779_dev *dev, ad7779_state state, ad7779_sar_mux mux)
int32_t	ad7779_get_sar_cfg (ad7779_dev *dev, ad7779_state *state, ad7779_sar_mux *mux)
int32_t	ad7779_do_single_sar_conv (ad7779_dev *dev, ad7779_sar_mux mux, uint16_t *sar_code)
int32_t	ad7779_do_spi_soft_reset (ad7779_dev *dev)
int32_t	ad7771_set_sinc5_filter_state (ad7779_dev *dev, ad7779_state state)
int32_t	ad7771_get_sinc5_filter_state (ad7779_dev *dev, ad7779_state *state)
int32_t	ad7779_init (ad7779_dev **device, ad7779_init_param init_param)
int32_t	ad7779_remove (ad7779_dev *dev)
	Free the resources allocated by ad7779_init().

Detailed Description

Header file of AD7779 Driver.

Author

DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2016(c) Analog Devices, Inc.

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

AD7771_FILTER_MODE

#define AD7771_FILTER_MODE   (1 << 6)

AD7779_ALL_CH_DIS_MCLK_EN

#define AD7779_ALL_CH_DIS_MCLK_EN   (1 << 7)

AD7779_CH_DISABLE

#define AD7779_CH_DISABLE

(

x

)

Value:

(1 << (x))

AD7779_CH_GAIN

#define AD7779_CH_GAIN

(

x

)

Value:

(((x) & 0x3) << 6)

AD7779_CH_RX

#define AD7779_CH_RX   (1 << 4)

AD7779_CLK_QUAL_DIS

#define AD7779_CLK_QUAL_DIS   (1 << 0)

AD7779_CONVST_DEGLITCH_DIS

#define AD7779_CONVST_DEGLITCH_DIS

(

x

)

Value:

(((x) & 0x3) << 6)

AD7779_CRC8_POLY

#define AD7779_CRC8_POLY   0x07

AD7779_DCLK_CLK_DIV

#define AD7779_DCLK_CLK_DIV

(

x

)

Value:

(((x) & 0x7) << 1)

AD7779_DOUT_DRIVE_STR

#define AD7779_DOUT_DRIVE_STR

(

x

)

Value:

(((x) & 0x3) << 1)

AD7779_DOUT_FORMAT

#define AD7779_DOUT_FORMAT

(

x

)

Value:

(((x) & 0x3) << 6)

AD7779_DOUT_HEADER_FORMAT

#define AD7779_DOUT_HEADER_FORMAT   (1 << 5)

AD7779_GLOBAL_MUX_CTRL

#define AD7779_GLOBAL_MUX_CTRL

(

x

)

Value:

(((x) & 0x1F) << 3)

AD7779_MEMMAP_CRC_TEST_EN

#define AD7779_MEMMAP_CRC_TEST_EN   (1 << 5)

AD7779_MOD_POWERMODE

#define AD7779_MOD_POWERMODE   (1 << 6)

AD7779_PDB_ALDO1_OVRDRV

#define AD7779_PDB_ALDO1_OVRDRV   (1 << 2)

AD7779_PDB_ALDO2_OVRDRV

#define AD7779_PDB_ALDO2_OVRDRV   (1 << 1)

AD7779_PDB_DLDO_OVRDRV

#define AD7779_PDB_DLDO_OVRDRV   (1 << 0)

AD7779_PDB_RC_OSC

#define AD7779_PDB_RC_OSC   (1 << 2)

AD7779_PDB_REFOUT_BUF

#define AD7779_PDB_REFOUT_BUF   (1 << 4)

AD7779_PDB_SAR

#define AD7779_PDB_SAR   (1 << 3)

AD7779_PDB_VCM

#define AD7779_PDB_VCM   (1 << 5)

AD7779_REF_BUF_NEG_EN

#define AD7779_REF_BUF_NEG_EN   (1 << 3)

AD7779_REF_BUF_POS_EN

#define AD7779_REF_BUF_POS_EN   (1 << 4)

AD7779_REF_MUX_CTRL

#define AD7779_REF_MUX_CTRL

(

x

)

Value:

(((x) & 0x3) << 6)

AD7779_REFBUFN_PREQ

#define AD7779_REFBUFN_PREQ   (1 << 6)

AD7779_REFBUFP_PREQ

#define AD7779_REFBUFP_PREQ   (1 << 7)

AD7779_REG_ADC_MUX_CONFIG

#define AD7779_REG_ADC_MUX_CONFIG   0x15

AD7779_REG_BUFFER_CONFIG_1

#define AD7779_REG_BUFFER_CONFIG_1   0x19

AD7779_REG_BUFFER_CONFIG_2

#define AD7779_REG_BUFFER_CONFIG_2   0x1A

AD7779_REG_CH0_1_SAT_ERR

#define AD7779_REG_CH0_1_SAT_ERR   0x54

AD7779_REG_CH2_3_SAT_ERR

#define AD7779_REG_CH2_3_SAT_ERR   0x55

AD7779_REG_CH4_5_SAT_ERR

#define AD7779_REG_CH4_5_SAT_ERR   0x56

AD7779_REG_CH6_7_SAT_ERR

#define AD7779_REG_CH6_7_SAT_ERR   0x57

AD7779_REG_CH_CONFIG

#define AD7779_REG_CH_CONFIG

(

ch

)

Value:

(0x00 + (ch))

AD7779_REG_CH_DISABLE

#define AD7779_REG_CH_DISABLE   0x08

AD7779_REG_CH_ERR_REG

#define AD7779_REG_CH_ERR_REG

(

ch

)

Value:

(0x4C + (ch))

AD7779_REG_CH_GAIN_LOWER_BYTE

#define AD7779_REG_CH_GAIN_LOWER_BYTE

(

ch

)

Value:

(0x21 + (ch) * 6)

AD7779_REG_CH_GAIN_MID_BYTE

#define AD7779_REG_CH_GAIN_MID_BYTE

(

ch

)

Value:

(0x20 + (ch) * 6)

AD7779_REG_CH_GAIN_UPPER_BYTE

#define AD7779_REG_CH_GAIN_UPPER_BYTE

(

ch

)

Value:

(0x1F + (ch) * 6)

AD7779_REG_CH_OFFSET_LOWER_BYTE

#define AD7779_REG_CH_OFFSET_LOWER_BYTE

(

ch

)

Value:

(0x1E + (ch) * 6)

AD7779_REG_CH_OFFSET_MID_BYTE

#define AD7779_REG_CH_OFFSET_MID_BYTE

(

ch

)

Value:

(0x1D + (ch) * 6)

AD7779_REG_CH_OFFSET_UPPER_BYTE

#define AD7779_REG_CH_OFFSET_UPPER_BYTE

(

ch

)

Value:

(0x1C + (ch) * 6)

AD7779_REG_CH_SYNC_OFFSET

#define AD7779_REG_CH_SYNC_OFFSET

(

ch

)

Value:

(0x09 + (ch))

AD7779_REG_CHX_ERR_REG_EN

#define AD7779_REG_CHX_ERR_REG_EN   0x58

AD7779_REG_DOUT_FORMAT

#define AD7779_REG_DOUT_FORMAT   0x14

AD7779_REG_GEN_ERR_REG_1

#define AD7779_REG_GEN_ERR_REG_1   0x59

AD7779_REG_GEN_ERR_REG_1_EN

#define AD7779_REG_GEN_ERR_REG_1_EN   0x5A

AD7779_REG_GEN_ERR_REG_2

#define AD7779_REG_GEN_ERR_REG_2   0x5B

AD7779_REG_GEN_ERR_REG_2_EN

#define AD7779_REG_GEN_ERR_REG_2_EN   0x5C

AD7779_REG_GENERAL_USER_CONFIG_1

#define AD7779_REG_GENERAL_USER_CONFIG_1   0x11

AD7779_REG_GENERAL_USER_CONFIG_2

#define AD7779_REG_GENERAL_USER_CONFIG_2   0x12

AD7779_REG_GENERAL_USER_CONFIG_3

#define AD7779_REG_GENERAL_USER_CONFIG_3   0x13

AD7779_REG_GLOBAL_MUX_CONFIG

#define AD7779_REG_GLOBAL_MUX_CONFIG   0x16

AD7779_REG_GPIO_CONFIG

#define AD7779_REG_GPIO_CONFIG   0x17

AD7779_REG_GPIO_DATA

#define AD7779_REG_GPIO_DATA   0x18

AD7779_REG_SRC_IF_LSB

#define AD7779_REG_SRC_IF_LSB   0x63

AD7779_REG_SRC_IF_MSB

#define AD7779_REG_SRC_IF_MSB   0x62

AD7779_REG_SRC_N_LSB

#define AD7779_REG_SRC_N_LSB   0x61

AD7779_REG_SRC_N_MSB

#define AD7779_REG_SRC_N_MSB   0x60

AD7779_REG_SRC_UPDATE

#define AD7779_REG_SRC_UPDATE   0x64

AD7779_REG_STATUS_REG_1

#define AD7779_REG_STATUS_REG_1   0x5D

AD7779_REG_STATUS_REG_2

#define AD7779_REG_STATUS_REG_2   0x5E

AD7779_REG_STATUS_REG_3

#define AD7779_REG_STATUS_REG_3   0x5F

AD7779_ROM_CRC_TEST_EN

#define AD7779_ROM_CRC_TEST_EN   (1 << 4)

AD7779_SAR_DIAG_MODE_EN

#define AD7779_SAR_DIAG_MODE_EN   (1 << 5)

AD7779_SDO_DRIVE_STR

#define AD7779_SDO_DRIVE_STR

(

x

)

Value:

(((x) & 0x3) << 3)

AD7779_SOFT_RESET

#define AD7779_SOFT_RESET

(

x

)

Value:

(((x) & 0x3) << 0)

AD7779_SPI_CLK_COUNT_TEST_EN

#define AD7779_SPI_CLK_COUNT_TEST_EN   (1 << 3)

AD7779_SPI_CRC_TEST_EN

#define AD7779_SPI_CRC_TEST_EN   (1 << 0)

AD7779_SPI_INVALID_READ_TEST_EN

#define AD7779_SPI_INVALID_READ_TEST_EN   (1 << 2)

AD7779_SPI_INVALID_WRITE_TEST_EN

#define AD7779_SPI_INVALID_WRITE_TEST_EN   (1 << 1)

AD7779_SPI_SLAVE_MODE_EN

#define AD7779_SPI_SLAVE_MODE_EN   (1 << 4)

AD7779_SPI_SYNC

#define AD7779_SPI_SYNC   (1 << 0)

Enumeration Type Documentation

ad7779_ch

enum ad7779_ch

Enumerator
AD7779_CH0
AD7779_CH1
AD7779_CH2
AD7779_CH3
AD7779_CH4
AD7779_CH5
AD7779_CH6
AD7779_CH7

ad7779_ctrl_mode

enum ad7779_ctrl_mode

Enumerator
AD7779_PIN_CTRL
AD7779_SPI_CTRL

ad7779_dclk_div

enum ad7779_dclk_div

Enumerator
AD7779_DCLK_DIV_1
AD7779_DCLK_DIV_2
AD7779_DCLK_DIV_4
AD7779_DCLK_DIV_8
AD7779_DCLK_DIV_16
AD7779_DCLK_DIV_32
AD7779_DCLK_DIV_64
AD7779_DCLK_DIV_128

ad7779_gain

enum ad7779_gain

Enumerator
AD7779_GAIN_1
AD7779_GAIN_2
AD7779_GAIN_4
AD7779_GAIN_8

ad7779_pwr_mode

enum ad7779_pwr_mode

Enumerator
AD7779_LOW_PWR
AD7779_HIGH_RES

ad7779_ref_buf_op_mode

enum ad7779_ref_buf_op_mode

Enumerator
AD7779_REF_BUF_ENABLED
AD7779_REF_BUF_PRECHARGED
AD7779_REF_BUF_DISABLED

ad7779_ref_type

enum ad7779_ref_type

Enumerator
AD7779_EXT_REF
AD7779_INT_REF
AD7779_EXT_SUPPLY
AD7779_EXT_REF_INV

ad7779_refx_pin

enum ad7779_refx_pin

Enumerator
AD7779_REFX_P
AD7779_REFX_N

ad7779_sar_mux

enum ad7779_sar_mux

Enumerator
AD7779_AUXAINP_AUXAINN
AD7779_DVBE_AVSSX
AD7779_REF1P_REF1N
AD7779_REF2P_REF2N
AD7779_REF_OUT_AVSSX
AD7779_VCM_AVSSX
AD7779_AREG1CAP_AVSSX_ATT
AD7779_AREG2CAP_AVSSX_ATT
AD7779_DREGCAP_DGND_ATT
AD7779_AVDD1A_AVSSX_ATT
AD7779_AVDD1B_AVSSX_ATT
AD7779_AVDD2A_AVSSX_ATT
AD7779_AVDD2B_AVSSX_ATT
AD7779_IOVDD_DGND_ATT
AD7779_AVDD4_AVSSX
AD7779_DGND_AVSS1A_ATT
AD7779_DGND_AVSS1B_ATT
AD7779_DGND_AVSSX_ATT
AD7779_AVDD4_AVSSX_ATT
AD7779_REF1P_AVSSX
AD7779_REF2P_AVSSX
AD7779_AVSSX_AVDD4_ATT

ad7779_spi_op_mode

enum ad7779_spi_op_mode

Enumerator
AD7779_INT_REG
AD7779_SD_CONV
AD7779_SAR_CONV

ad7779_state

enum ad7779_state

Enumerator
AD7779_ENABLE
AD7779_DISABLE

Function Documentation

ad7771_get_sinc5_filter_state()

int32_t ad7771_get_sinc5_filter_state	(	ad7779_dev *	dev,
		ad7779_state *	state )

Get the state (enable, disable) of the SINC5 filter.

Parameters

dev	- The device structure.
state	- The SINC5 filter state.

Returns

0 in case of success, negative error code otherwise.

ad7771_set_sinc5_filter_state()

int32_t ad7771_set_sinc5_filter_state	(	ad7779_dev *	dev,
		ad7779_state	state )

Set the state (enable, disable) of the SINC5 filter.

Parameters

dev	- The device structure.
state	- The SINC5 filter state. Accepted values: AD7779_ENABLE AD7779_DISABLE

Returns

0 in case of success, negative error code otherwise.

ad7779_compute_crc8()

uint8_t ad7779_compute_crc8	(	uint8_t *	data,
		uint8_t	data_size )

Compute CRC8 checksum.

Parameters

data	- The data buffer.
data_size	- The size of the data buffer.

Returns

CRC8 checksum.

ad7779_do_single_sar_conv()

int32_t ad7779_do_single_sar_conv	(	ad7779_dev *	dev,
		ad7779_sar_mux	mux,
		uint16_t *	sar_code )

Do a single SAR conversion.

Parameters

dev	- The device structure.
mux	- The SAR mux input configuration. Accepted values: AD7779_AUXAINP_AUXAINN AD7779_DVBE_AVSSX AD7779_REF1P_REF1N AD7779_REF2P_REF2N AD7779_REF_OUT_AVSSX AD7779_VCM_AVSSX AD7779_AREG1CAP_AVSSX_ATT AD7779_AREG2CAP_AVSSX_ATT AD7779_DREGCAP_DGND_ATT AD7779_AVDD1A_AVSSX_ATT AD7779_AVDD1B_AVSSX_ATT AD7779_AVDD2A_AVSSX_ATT AD7779_AVDD2B_AVSSX_ATT AD7779_IOVDD_DGND_ATT AD7779_AVDD4_AVSSX AD7779_DGND_AVSS1A_ATT AD7779_DGND_AVSS1B_ATT AD7779_DGND_AVSSX_ATT AD7779_AVDD4_AVSSX_ATT AD7779_REF1P_AVSSX AD7779_REF2P_AVSSX AD7779_AVSSX_AVDD4_ATT
sar_code	- SAR conversion code.

Returns

0 in case of success, negative error code otherwise.

ad7779_do_spi_soft_reset()

int32_t ad7779_do_spi_soft_reset

(

ad7779_dev *

dev

)

Do a SPI software reset.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad7779_do_update_mode_pins()

int32_t ad7779_do_update_mode_pins

(

ad7779_dev *

dev

)

Update the state of the MODEx pins according to the settings specified in the device structure.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_dclk_div()

int32_t ad7779_get_dclk_div	(	ad7779_dev *	dev,
		ad7779_dclk_div *	div )

Get the DCLK divider.

Parameters

dev	- The device structure.
div	- The DCLK divider.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_dec_rate()

int32_t ad7779_get_dec_rate	(	ad7779_dev *	dev,
		uint16_t *	int_val,
		uint16_t *	dec_val )

Get the decimation rate.

Parameters

dev	- The device structure.
int_val	- The integer value.
dec_val	- The decimal value.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_gain()

int32_t ad7779_get_gain	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		ad7779_gain *	gain )

Get the gain of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
gain	- The gain value.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_gain_corr()

int32_t ad7779_get_gain_corr	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		uint32_t *	gain )

Get the gain correction of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
gain	- The gain value.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_offset_corr()

int32_t ad7779_get_offset_corr	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		uint32_t *	offset )

Get the offset correction of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
offset	- The offset value.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_power_mode()

int32_t ad7779_get_power_mode	(	ad7779_dev *	dev,
		ad7779_pwr_mode *	pwr_mode )

Get the power mode.

Parameters

dev	- The device structure.
pwr_mode	- The power mode.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_ref_buf_op_mode()

int32_t ad7779_get_ref_buf_op_mode	(	ad7779_dev *	dev,
		ad7779_refx_pin	refx_pin,
		ad7779_ref_buf_op_mode *	mode )

Get the reference buffer operation mode of the selected pin.

Parameters

dev	- The device structure.
refx_pin	- The selected pin. Accepted values: AD7779_REFX_P AD7779_REFX_N
mode	- The reference buffer operation mode. Accepted values: AD7779_REF_BUF_ENABLED AD7779_REF_BUF_PRECHARGED AD7779_REF_BUF_DISABLED

Returns

0 in case of success, negative error code otherwise.

ad7779_get_reference_type()

int32_t ad7779_get_reference_type	(	ad7779_dev *	dev,
		ad7779_ref_type *	ref_type )

Get the reference type.

Parameters

dev	- The device structure.
ref_type	- The reference type.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_sar_cfg()

int32_t ad7779_get_sar_cfg	(	ad7779_dev *	dev,
		ad7779_state *	state,
		ad7779_sar_mux *	mux )

Get the SAR ADC configuration.

Parameters

dev	- The device structure.
state	- The SAR ADC state.
mux	- The SAR mux input configuration.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_spi_op_mode()

int32_t ad7779_get_spi_op_mode	(	ad7779_dev *	dev,
		ad7779_spi_op_mode *	mode )

Get SPI operation mode.

Parameters

dev	- The device structure.
mode	- The SPI operation mode.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_state()

int32_t ad7779_get_state	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		ad7779_state *	state )

Get the state (enable, disable) of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
state	- The channel state.

Returns

0 in case of success, negative error code otherwise.

ad7779_get_sync_offset()

int32_t ad7779_get_sync_offset	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		uint8_t *	sync_offset )

Get the synchronization offset of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
sync_offset	- The synchronization offset value.

Returns

0 in case of success, negative error code otherwise.

ad7779_init()

int32_t ad7779_init	(	ad7779_dev **	device,
		ad7779_init_param	init_param )

Initialize the device.

Parameters

device	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns

0 in case of success, negative error code otherwise.

ad7779_remove()

int32_t ad7779_remove

(

ad7779_dev *

dev

)

Free the resources allocated by ad7779_init().

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad7779_set_dclk_div()

int32_t ad7779_set_dclk_div	(	ad7779_dev *	dev,
		ad7779_dclk_div	div )

Set the DCLK divider.

Parameters

dev	- The device structure.
div	- The DCLK divider. Accepted values: AD7779_DCLK_DIV_1 AD7779_DCLK_DIV_2 AD7779_DCLK_DIV_4 AD7779_DCLK_DIV_8 AD7779_DCLK_DIV_16 AD7779_DCLK_DIV_32 AD7779_DCLK_DIV_64 AD7779_DCLK_DIV_128

Returns

0 in case of success, negative error code otherwise.

ad7779_set_dec_rate()

int32_t ad7779_set_dec_rate	(	ad7779_dev *	dev,
		uint16_t	int_val,
		uint16_t	dec_val )

Set the decimation rate.

Parameters

dev	- The device structure.
int_val	- The integer value.
dec_val	- The decimal value.

Returns

0 in case of success, negative error code otherwise.

ad7779_set_gain()

int32_t ad7779_set_gain	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		ad7779_gain	gain )

Set the gain of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
gain	- The gain value. Accepted values: AD7779_GAIN_1 AD7779_GAIN_2 AD7779_GAIN_4 AD7779_GAIN_8

Returns

0 in case of success, negative error code otherwise.

ad7779_set_gain_corr()

int32_t ad7779_set_gain_corr	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		uint32_t	gain )

Set the gain correction of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
gain	- The gain value.

Returns

0 in case of success, negative error code otherwise.

ad7779_set_offset_corr()

int32_t ad7779_set_offset_corr	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		uint32_t	offset )

Set the offset correction of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
offset	- The offset value.

Returns

0 in case of success, negative error code otherwise.

ad7779_set_power_mode()

int32_t ad7779_set_power_mode	(	ad7779_dev *	dev,
		ad7779_pwr_mode	pwr_mode )

Set the power mode.

Parameters

dev	- The device structure.
pwr_mode	- The power mode. Accepted values: AD7779_HIGH_RES AD7779_LOW_PWR

Returns

0 in case of success, negative error code otherwise.

ad7779_set_ref_buf_op_mode()

int32_t ad7779_set_ref_buf_op_mode	(	ad7779_dev *	dev,
		ad7779_refx_pin	refx_pin,
		ad7779_ref_buf_op_mode	mode )

Set the reference buffer operation mode of the selected pin.

Parameters

dev	- The device structure.
refx_pin	- The selected pin. Accepted values: AD7779_REFX_P AD7779_REFX_N
mode	- The reference buffer operation mode. Accepted values: AD7779_REF_BUF_ENABLED AD7779_REF_BUF_PRECHARGED AD7779_REF_BUF_DISABLED

Returns

0 in case of success, negative error code otherwise.

ad7779_set_reference_type()

int32_t ad7779_set_reference_type	(	ad7779_dev *	dev,
		ad7779_ref_type	ref_type )

Set the reference type.

Parameters

dev	- The device structure.
ref_type	- The reference type. Accepted values: AD7779_EXT_REF AD7779_INT_REF AD7779_EXT_SUPPLY AD7779_EXT_REF_INV

Returns

0 in case of success, negative error code otherwise.

ad7779_set_sar_cfg()

int32_t ad7779_set_sar_cfg	(	ad7779_dev *	dev,
		ad7779_state	state,
		ad7779_sar_mux	mux )

Set the SAR ADC configuration.

Parameters

dev	- The device structure.
state	- The SAR ADC state. Accepted values: AD7779_ENABLE AD7779_DISABLE
mux	- The SAR mux input configuration. Accepted values: AD7779_AUXAINP_AUXAINN AD7779_DVBE_AVSSX AD7779_REF1P_REF1N AD7779_REF2P_REF2N AD7779_REF_OUT_AVSSX AD7779_VCM_AVSSX AD7779_AREG1CAP_AVSSX_ATT AD7779_AREG2CAP_AVSSX_ATT AD7779_DREGCAP_DGND_ATT AD7779_AVDD1A_AVSSX_ATT AD7779_AVDD1B_AVSSX_ATT AD7779_AVDD2A_AVSSX_ATT AD7779_AVDD2B_AVSSX_ATT AD7779_IOVDD_DGND_ATT AD7779_AVDD4_AVSSX AD7779_DGND_AVSS1A_ATT AD7779_DGND_AVSS1B_ATT AD7779_DGND_AVSSX_ATT AD7779_AVDD4_AVSSX_ATT AD7779_REF1P_AVSSX AD7779_REF2P_AVSSX AD7779_AVSSX_AVDD4_ATT

Returns

0 in case of success, negative error code otherwise.

ad7779_set_spi_op_mode()

int32_t ad7779_set_spi_op_mode	(	ad7779_dev *	dev,
		ad7779_spi_op_mode	mode )

Set SPI operation mode.

Parameters

dev	- The device structure.
mode	- The SPI operation mode. Accepted values: AD7779_INT_REG AD7779_SD_CONV AD7779_SAR_CONV

Returns

0 in case of success, negative error code otherwise.

ad7779_set_state()

int32_t ad7779_set_state	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		ad7779_state	state )

Set the state (enable, disable) of the channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
state	- The channel state. Accepted values: AD7779_ENABLE AD7779_DISABLE

Returns

0 in case of success, negative error code otherwise.

ad7779_set_sync_offset()

int32_t ad7779_set_sync_offset	(	ad7779_dev *	dev,
		ad7779_ch	ch,
		uint8_t	sync_offset )

Set the synchronization offset of the selected channel.

Parameters

dev	- The device structure.
ch	- The channel number. Accepted values: AD7779_CH0 AD7779_CH1 AD7779_CH2 AD7779_CH3 AD7779_CH4 AD7779_CH5 AD7779_CH6 AD7779_CH7
sync_offset	- The synchronization offset value.

Returns

0 in case of success, negative error code otherwise.

ad7779_spi_int_reg_read()

int32_t ad7779_spi_int_reg_read	(	ad7779_dev *	dev,
		uint8_t	reg_addr,
		uint8_t *	reg_data )

SPI internal register read from device.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad7779_spi_int_reg_read_mask()

int32_t ad7779_spi_int_reg_read_mask	(	ad7779_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	mask,
		uint8_t *	data )

SPI internal register read from device using a mask.

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- The mask.
data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad7779_spi_int_reg_write()

int32_t ad7779_spi_int_reg_write	(	ad7779_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	reg_data )

SPI internal register write to device.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad7779_spi_int_reg_write_mask()

int32_t ad7779_spi_int_reg_write_mask	(	ad7779_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	mask,
		uint8_t	data )

SPI internal register write to device using a mask.

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- The mask.
data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad7779_spi_sar_read_code()

int32_t ad7779_spi_sar_read_code	(	ad7779_dev *	dev,
		ad7779_sar_mux	mux_next_conv,
		uint16_t *	sar_code )

SPI SAR conversion code read.

Parameters

dev	- The device structure.
mux_next_conv	- The SAR mux input configuration for the next conversion. Accepted values: AD7779_AUXAINP_AUXAINN AD7779_DVBE_AVSSX AD7779_REF1P_REF1N AD7779_REF2P_REF2N AD7779_REF_OUT_AVSSX AD7779_VCM_AVSSX AD7779_AREG1CAP_AVSSX_ATT AD7779_AREG2CAP_AVSSX_ATT AD7779_DREGCAP_DGND_ATT AD7779_AVDD1A_AVSSX_ATT AD7779_AVDD1B_AVSSX_ATT AD7779_AVDD2A_AVSSX_ATT AD7779_AVDD2B_AVSSX_ATT AD7779_IOVDD_DGND_ATT AD7779_AVDD4_AVSSX AD7779_DGND_AVSS1A_ATT AD7779_DGND_AVSS1B_ATT AD7779_DGND_AVSSX_ATT AD7779_AVDD4_AVSSX_ATT AD7779_REF1P_AVSSX AD7779_REF2P_AVSSX AD7779_AVSSX_AVDD4_ATT
sar_code	- SAR conversion code.

Returns

0 in case of success, negative error code otherwise.