 |
no-OS
|
Loading...
Searching...
No Matches
Go to the documentation of this file.
33#ifndef APP_PARAMETERS_H_
34#define APP_PARAMETERS_H_
36#include <xparameters.h>
38#define UART_BAUDRATE 115200
40#ifdef XPS_BOARD_ZCU102
52#define PHY_RESET (GPIO_OFFSET + 41)
54#define ADRF5020_CTRL_GPIO (GPIO_OFFSET + 34)
55#define MS_SYNC_ENABLE_GPIO (GPIO_OFFSET + 44)
57#define GPIO_2_DEVICE_ID XPAR_AXI_GPIO_2_DEVICE_ID
58#define SPI_2_DEVICE_ID XPAR_AXI_SPI_2_DEVICE_ID
61#define PHY_RESET (GPIO_OFFSET + 55)
64#if defined(PLATFORM_MB)
65#define GPIO_DEVICE_ID XPAR_AXI_GPIO_DEVICE_ID
66#define PHY_SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID
67#define CLK_SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID
68#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID
69#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR
70#define INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID
71#define DDR_CNTRL_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR
73#elif defined(PLATFORM_ZYNQMP)
74#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
75#define GPIO_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID
76#define PHY_SPI_DEVICE_ID XPAR_PSU_SPI_0_DEVICE_ID
77#define CLK_SPI_DEVICE_ID XPAR_PSU_SPI_1_DEVICE_ID
78#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
79#define UART_IRQ_ID XPAR_XUARTPS_0_INTR
80#define DDR_CNTRL_BASEADDR XPAR_PSU_DDRC_0_BASEADDR
83#error Unsupported platform.
86#define RX_JESD_BASEADDR XPAR_AXI_MXFE_RX_JESD_RX_AXI_BASEADDR
87#define TX_JESD_BASEADDR XPAR_AXI_MXFE_TX_JESD_TX_AXI_BASEADDR
89#ifdef XPAR_AXI_MXFE_RX_XCVR_BASEADDR
90#define RX_XCVR_BASEADDR XPAR_AXI_MXFE_RX_XCVR_BASEADDR
92#ifdef XPAR_AXI_MXFE_TX_XCVR_BASEADDR
93#define TX_XCVR_BASEADDR XPAR_AXI_MXFE_TX_XCVR_BASEADDR
96#ifdef XPAR_RX_MXFE_TPL_CORE_ADC_TPL_CORE_BASEADDR
97#define RX_CORE_BASEADDR XPAR_RX_MXFE_TPL_CORE_ADC_TPL_CORE_BASEADDR
99#define RX_CORE_BASEADDR XPAR_RX_MXFE_TPL_CORE_TPL_CORE_BASEADDR
101#ifdef XPAR_TX_MXFE_TPL_CORE_DAC_TPL_CORE_BASEADDR
102#define TX_CORE_BASEADDR XPAR_TX_MXFE_TPL_CORE_DAC_TPL_CORE_BASEADDR
104#define TX_CORE_BASEADDR XPAR_TX_MXFE_TPL_CORE_TPL_CORE_BASEADDR
107#define RX_DMA_BASEADDR XPAR_AXI_MXFE_RX_DMA_BASEADDR
108#define TX_DMA_BASEADDR XPAR_AXI_MXFE_TX_DMA_BASEADDR
112#define MAX_DAC_BUF_SAMPLES 10000000
113#define MAX_ADC_BUF_SAMPLES 10000000