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ad917x_reg.h
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1
12#ifndef __AD917X_REGISTERS_H__
13#define __AD917X_REGISTERS_H__
14
15#include "api_def.h"
16
18 struct adi_reg_data *tbl, uint32_t count);
19
21 const uint16_t address, uint8_t *data, uint32_t count);
22
23/*Device DEFINITION */
24#define AD917X_JESD_NOF_LANES 8
25#define AD917X_JESD_NOF_LINKS 2
26#define AD917X_JESD_NOF_SYNCOUTB 2
27#define AD9171_ID 9171
28#define AD9172_ID 9172
29#define AD9173_ID 9173
30
31/*REGISTER SUMMARY : (AD917X_REGMAP_V4)*/
32#define AD917X_IF_CFG_A_REG 0x000
33#define AD917X_IF_CFG_B_REG 0x001
34#define AD917X_DEV_CFG_REG 0x002
35#define AD917X_CHIP_TYPE_REG 0x003
36#define AD917X_PROD_ID_LSB_REG 0x004
37#define AD917X_PROD_ID_MSB_REG 0x005
38#define AD917X_CHIP_GRADE_REG 0x006
39#define AD917X_SPI_PAGEINDX_REG 0x008
40#define AD917X_CHANNEL_PAGE_0 NO_OS_BIT(0)
41#define AD917X_CHANNEL_PAGE_1 NO_OS_BIT(1)
42#define AD917X_CHANNEL_PAGE_2 NO_OS_BIT(2)
43#define AD917X_CHANNEL_PAGE_3 NO_OS_BIT(3)
44#define AD917X_CHANNEL_PAGE_4 NO_OS_BIT(4)
45#define AD917X_CHANNEL_PAGE_5 NO_OS_BIT(5)
46#define AD917X_MAINDAC_PAGE_0 NO_OS_BIT(6)
47#define AD917X_MAINDAC_PAGE_1 NO_OS_BIT(7)
48
49#define AD917X_SYSREF_ROTATION_REG 0x03B
50#define AD917X_SYNC_LOGIC_EN NO_OS_BIT(7)
51#define AD917X_SYNC_RSV_EN NO_OS_BIT(6)
52#define AD917X_PERIODIC_RST_EN NO_OS_BIT(5)
53#define AD917X_NCORST_AFTER_ROTATION NO_OS_BIT(4)
54#define AD917X_ROTATION_MODE(x) (((x) & 0x3) << 0)
55
56
57
58#define AD917X_SYSREF_CTRL_REG 0x084
59#define AD917X_SYSREF_PD NO_OS_BIT(0)
60#define AD917X_SYSREF_DC_COUPLED NO_OS_BIT(6)
61
62#define AD917X_PLL_VCO_CTRL_REG 0x094
63#define AD917X_PLL_VCO_DIV_EN(x) (((x) & 0x3) << 0)
64
65#define AD917X_PLL_BYPASS_REG 0x095
66#define AD917X_PLL_BYPASS(x) ((x) ? NO_OS_BIT(0) : 0)
67
68#define AD917X_DLL_CTRL0_REG 0x0C1
69#define AD917X_DLL_CFG NO_OS_BIT(6) | NO_OS_BIT(3)
70#define AD917X_DLL_HF NO_OS_BIT(5)
71#define AD917X_DLL_RST NO_OS_BIT(0)
72#define AD917X_DLL_STATUS_REG 0x0C3
73#define AD917X_DLL_LOCK NO_OS_BIT(0)
74
75#define AD917X_DIG_RESET_REG 0x100
76#define AD917X_DIG_PATH_PDN(x) ((x) ? NO_OS_BIT(0) : 0)
77
78#define AD917X_JESD_MODE_REG 0x110
79#define AD917X_JESD_MODE_INVALID NO_OS_BIT(7)
80#define AD917X_LINK_MODE NO_OS_BIT(5)
81#define AD917X_JESD_MODE(x) (((x) & 0x1F) << 0)
82
83#define AD917X_INTERP_MODE_REG 0x111
84#define AD917X_CH_INTERP_MODE(x) (((x) & 0xF) << 0)
85#define AD917X_DP_INTERP_MODE(x) (((x) & 0xF) << 4)
86
87#define AD917X_DDSM_DATAPATH_CFG_REG 0x112
88#define AD917X_DDSM_MODE(x) (((x) & 0x3) << 4)
89#define AD917X_DDSM_NCO_EN NO_OS_BIT(3)
90#define AD917X_DDSM_MODULUS_EN NO_OS_BIT(2)
91#define AD917X_DDSM_SEL_SIDEBAND NO_OS_BIT(1)
92#define AD917X_DDSM_EN_SYNC_ALL_CHNL_NCO_RESETS NO_OS_BIT(0)
93
94#define AD917X_DDSM_FTW_UPDATE_REG 0x113
95#define AD917X_DDSM_FTW_LOAD_SYSREF NO_OS_BIT(2)
96#define AD917X_DDSM_FTW_LOAD_ACK NO_OS_BIT(1)
97#define AD917X_DDSM_FTW_LOAD_REQ NO_OS_BIT(0)
98
99#define AD917X_DDSM_FTW0_REG 0x114
100#define AD917X_DDSM_FTW1_REG 0x115
101#define AD917X_DDSM_FTW2_REG 0x116
102#define AD917X_DDSM_FTW3_REG 0x117
103#define AD917X_DDSM_FTW4_REG 0x118
104#define AD917X_DDSM_FTW5_REG 0x119
105
106#define AD917X_DDSM_PHASE_OFFSET0_REG 0x11C
107#define AD917X_DDSM_PHASE_OFFSET1_REG 0x11D
108
109#define AD917X_DDSM_ACC_MODULUS0_REG 0x124
110#define AD917X_DDSM_ACC_MODULUS1_REG 0x125
111#define AD917X_DDSM_ACC_MODULUS2_REG 0x126
112#define AD917X_DDSM_ACC_MODULUS3_REG 0x127
113#define AD917X_DDSM_ACC_MODULUS4_REG 0x128
114#define AD917X_DDSM_ACC_MODULUS5_REG 0x129
115
116#define AD917X_DDSM_ACC_DELTA0_REG 0x12A
117#define AD917X_DDSM_ACC_DELTA1_REG 0x12B
118#define AD917X_DDSM_ACC_DELTA2_REG 0x12C
119#define AD917X_DDSM_ACC_DELTA3_REG 0x12D
120#define AD917X_DDSM_ACC_DELTA4_REG 0x12E
121#define AD917X_DDSM_ACC_DELTA5_REG 0x12F
122
123#define AD917X_DDSC_DATAPATH_CFG_REG 0x130
124#define AD917X_DDSC_NCO_EN NO_OS_BIT(6)
125#define AD917X_DDSC_MODULUS_EN NO_OS_BIT(2)
126#define AD917X_DDSC_SEL_SIDEBAND NO_OS_BIT(1)
127#define AD917X_DDSC_TEST_TONE_EN NO_OS_BIT(0)
128
129#define AD917X_DDSC_FTW_UPDATE_REG 0x131
130#define AD917X_DDSC_FTW_LOAD_SYSREF NO_OS_BIT(2)
131#define AD917X_DDSC_FTW_LOAD_ACK NO_OS_BIT(1)
132#define AD917X_DDSC_FTW_LOAD_REQ NO_OS_BIT(0)
133
134#define AD917X_DDSC_FTW0_REG 0x132
135#define AD917X_DDSC_FTW1_REG 0x133
136#define AD917X_DDSC_FTW2_REG 0x134
137#define AD917X_DDSC_FTW3_REG 0x135
138#define AD917X_DDSC_FTW4_REG 0x136
139#define AD917X_DDSC_FTW5_REG 0x137
140
141#define AD917X_DDSC_PHASE_OFFSET0_REG 0x138
142#define AD917X_DDSC_PHASE_OFFSET1_REG 0x139
143
144#define AD917X_DDSC_ACC_MODULUS0_REG 0x13A
145#define AD917X_DDSC_ACC_MODULUS1_REG 0x13B
146#define AD917X_DDSC_ACC_MODULUS2_REG 0x13C
147#define AD917X_DDSC_ACC_MODULUS3_REG 0x13D
148#define AD917X_DDSC_ACC_MODULUS4_REG 0x13E
149#define AD917X_DDSC_ACC_MODULUS5_REG 0x13F
150
151#define AD917X_DDSC_ACC_DELTA0_REG 0x140
152#define AD917X_DDSC_ACC_DELTA1_REG 0x141
153#define AD917X_DDSC_ACC_DELTA2_REG 0x142
154#define AD917X_DDSC_ACC_DELTA3_REG 0x143
155#define AD917X_DDSC_ACC_DELTA4_REG 0x144
156#define AD917X_DDSC_ACC_DELTA5_REG 0x145
157
158#define AD917X_X_FTW_UPDATE_REG(x) ((x)==AD917X_DDSM?0x113:0x131)
159
160#define AD917X_X_FTW0_REG(x) ((x)==AD917X_DDSM?0x114:0x132)
161#define AD917X_X_FTW1_REG(x) ((x)==AD917X_DDSM?0x115:0x133)
162#define AD917X_X_FTW2_REG(x) ((x)==AD917X_DDSM?0x116:0x134)
163#define AD917X_X_FTW3_REG(x) ((x)==AD917X_DDSM?0x117:0x135)
164#define AD917X_X_FTW4_REG(x) ((x)==AD917X_DDSM?0x118:0x136)
165#define AD917X_X_FTW5_REG(x) ((x)==AD917X_DDSM?0x119:0x137)
166
167#define AD917X_X_PHASE_OFFSET0_REG(x) ((x)==AD917X_DDSM?0x11C:0x138)
168#define AD917X_X_PHASE_OFFSET1_REG(x) ((x)==AD917X_DDSM?0x11D:0x139)
169
170#define AD917X_X_ACC_MODULUS0_REG(x) ((x)==AD917X_DDSM?0x124:0x13A)
171#define AD917X_X_ACC_MODULUS1_REG(x) ((x)==AD917X_DDSM?0x125:0x13B)
172#define AD917X_X_ACC_MODULUS2_REG(x) ((x)==AD917X_DDSM?0x126:0x13C)
173#define AD917X_X_ACC_MODULUS3_REG(x) ((x)==AD917X_DDSM?0x127:0x13D)
174#define AD917X_X_ACC_MODULUS4_REG(x) ((x)==AD917X_DDSM?0x128:0x13E)
175#define AD917X_X_ACC_MODULUS5_REG(x) ((x)==AD917X_DDSM?0x129:0x13F)
176
177#define AD917X_X_ACC_DELTA0_REG(x) ((x)==AD917X_DDSM?0x12A:0x140)
178#define AD917X_X_ACC_DELTA1_REG(x) ((x)==AD917X_DDSM?0x12B:0x141)
179#define AD917X_X_ACC_DELTA2_REG(x) ((x)==AD917X_DDSM?0x12C:0x142)
180#define AD917X_X_ACC_DELTA3_REG(x) ((x)==AD917X_DDSM?0x12D:0x143)
181#define AD917X_X_ACC_DELTA4_REG(x) ((x)==AD917X_DDSM?0x12E:0x144)
182#define AD917X_X_ACC_DELTA5_REG(x) ((x)==AD917X_DDSM?0x12F:0x145)
183
184#define AD917X_CHNL_GAIN0_REG 0x146
185#define AD917X_CHNL_GAIN1_REG 0x147
186#define CHANNEL_GAIN0(x) (uint8_t)((x) & 0xFF)
187#define CHANNEL_GAIN1(x) (uint8_t)(((x) >> 8) & 0x0F)
188#define CHANNEL_GAIN(g0, g1) (uint16_t)(((uint16_t)((g1) << 8) | (g0)) & 0xFFF)
189
190#define AD917X_DC_CAL_TONE0_REG 0x148
191#define AD917X_DC_CAL_TONE1_REG 0x149
192
193#define AD917X_DDSM_CAL_MODE_DEF_REG 0x1E6
194#define AD917X_DDSM_EN_CAL_ACC NO_OS_BIT(2)
195#define AD917X_DDSM_EN_CAL_DC_INPUT NO_OS_BIT(1)
196#define AD917X_DDSM_EN_CAL_FREQ_TUNE NO_OS_BIT(0)
197
198
199#define AD917X_MASTER_PD_REG 0x200
200#define AD917X_SERDES_PDN(x) ((x) ? NO_OS_BIT(0) : 0)
201#define AD917X_PHY_PD_REG 0x201
202#define AD917X_PLL_EN_CTRL_REG 0x280
203#define AD917X_SERDES_PLL_STARTUP NO_OS_BIT(0)
204
205#define AD917X_GEN_PD_REG 0x203
206#define AD917X_SYNCOUTB_0_PD NO_OS_BIT(1)
207#define AD917X_SYNCOUTB_1_PD NO_OS_BIT(0)
208#define AD917X_SYNCOUTB_PD(x) (((x) & 0x3) << 0)
209
210#define AD917X_SYNCOUTB_CTRL_0_REG 0x253
211#define AD917X_SYNCOUTB_CTRL_1_REG 0x254
212#define AD917X_SYNCOUTB_MODE(x) ((x) ? NO_OS_BIT(0) : 0)
213
214#define AD917X_PLL_STATUS_REG 0x281
215
216#define AD917X_JESD_RX_CTL_REG 0x300
217#define AD917X_DUAL_MODE NO_OS_BIT(3)
218#define AD917X_LINK_PAGE(x) ((x) ? NO_OS_BIT(2) : 0)
219#define AD917X_LINK_EN(x) (((x) & 0x3) << 0)
220#define AD917X_LINK_0_EN NO_OS_BIT(0)
221#define AD917X_LINK_1_EN NO_OS_BIT(1)
222
223#define AD917X_JESD_LMFC_DELAY0_REG 0x304
224#define AD917X_JESD_LMFC_DELAY1_REG 0x305
225#define AD917X_JESD_LMFC_DELAY(x) (((x) & 0x3F) << 0)
226#define AD917X_JESD_LMFC_VAR0_REG 0x306
227#define AD917X_JESD_LMFC_VAR1_REG 0x307
228#define AD917X_JESD_LMFC_VAR(x) (((x) & 0x3F) << 0)
229
230#define AD917X_JESD_XBAR_LANE_REG 0x308
231#define AD917X_JESD_XBAR_LANE_REG 0x308
232#define AD917X_JESD_XBAR_LANE_REG 0x308
233
234#define AD917X_JESD_XBAR_LANE_REG 0x308
235#define AD917X_XBAR_LANE_EVEN(x) (((x) & 0x7) << 0)
236#define AD917X_XBAR_LANE_ODD(x) (((x) & 0x7) << 3)
237
238#define AD917X_JESD_INVERT_LANE_REG 0x334
239#define AD917X_JESD_INVERT_LANE(x) NO_OS_BIT(x)
240
241#define AD917X_JESD_PARAM_REG_BASE 0x450
242#define AD917X_JESD_PARAM_REG_LEN 0xB
243#define AD917X_JESD_L_GET(x) ((x[3] & 0xF) + 1)
244#define AD917X_JESD_F_GET(x) ((x[4]) + 1)
245#define AD917X_JESD_K_GET(x) ((x[5] & 0x1F) + 1)
246#define AD917X_JESD_M_GET(x) ((x[6]) + 1)
247#define AD917X_JESD_N_GET(x) ((x[7] & 0xF) + 1)
248#define AD917X_JESD_NP_GET(x) ((x[8] & 0xF) + 1)
249#define AD917X_JESD_S_GET(x) ((x[9] & 0xF) + 1)
250#define AD917X_JESD_HD_GET(x) ((x[10] & 0x80) >> 7)
251#define AD917X_JESD_DID_GET(x) (x[0])
252#define AD917X_JESD_BID_GET(x) (x[1])
253#define AD917X_JESD_LID0_GET(x) (x[2] & 0xF)
254#define AD917X_JESD_V_GET(x) ((x[9] & 0xF8) >> 5)
255#define AD917X_JESD_L(x) (((x) & 0xF) << 0)
256#define AD917X_JESD_NP(x) (((x) & 0xF) << 0)
257
258#define AD917X_JESD_ILS_SCR_L_REG 0x453
259#define AD917X_JESD_SCR NO_OS_BIT(7)
260#define AD917X_JESD_ILS_NP_REG 0x458
261#define AD917X_JESD_JESDV NO_OS_BIT(5)
262
263#define AD917X_JESD_CODE_GRP_SYNC_REG 0x470
264#define AD917X_JESD_FRAME_SYNC_REG 0x471
265#define AD917X_JESD_GOOD_CHECKSUM_REG 0x472
266#define AD917X_JESD_INIT_LANE_SYNC_REG 0x473
267
268#define AD917X_JESD_CTRL0_REG 0x475
269#define AD917X_JESD_QBD_SOFT_RST NO_OS_BIT(3)
270
271
272
273#define AD917X_NVM_LOADER_REG 0x705
274#define AD917X_NVM_BLR_DONE NO_OS_BIT(1)
275
276
277#define AD917X_DACPLL_CTRLX_REG 0x790
278#define AD917X_DACPLL_CTRLY_REG 0x791
279#define AD917X_DACPLL_CTRL0_REG 0x792
280#define AD917X_RESET_VCO_DIV NO_OS_BIT(1)
281
282#define AD917X_DACPLL_CTRL1_REG 0x793
283#define AD917X_M_DIV(x) (((x) & 0x3) << 0)
284
285#define AD917X_DACPLL_CTRL7_REG 0x799
286#define AD917X_L_DIV(x) (((x) & 0x3) << 6)
287#define AD917X_N_DIV(x) (((x) & 0x3F) << 0)
288
289
290#define AD917X_DACPLL_STATUS_REG 0x7B5
291#define AD917X_DACPLL_LOCK NO_OS_BIT(0)
292
293#endif /*__AD917X_REG_H__*/
int32_t ad917x_register_read_block(ad917x_handle_t *h, const uint16_t address, uint8_t *data, uint32_t count)
Definition ad917x_reg.c:64
int32_t ad917x_register_write_tbl(ad917x_handle_t *h, struct adi_reg_data *tbl, uint32_t count)
Definition ad917x_reg.c:79
API definitions header file.
Definition AD917x.h:84
Definition api_def.h:155