Go to the documentation of this file.
46 #define AD9265_REG_CHIP_PORT_CONF 0x00
47 #define AD9265_REG_CHIP_ID 0x01
48 #define AD9265_REG_CHIP_GRADE 0x02
49 #define AD9265_REG_CHAN_INDEX 0x05
50 #define AD9265_REG_TRANSFER 0xFF
51 #define AD9265_REG_MODES 0x08
52 #define AD9265_REG_TEST_IO 0x0D
53 #define AD9265_REG_ADC_INPUT 0x0F
54 #define AD9265_REG_OFFSET 0x10
55 #define AD9265_REG_OUTPUT_MODE 0x14
56 #define AD9265_REG_OUTPUT_ADJUST 0x15
57 #define AD9265_REG_OUTPUT_PHASE 0x16
58 #define AD9265_REG_OUTPUT_DELAY 0x17
59 #define AD9265_REG_VREF 0x18
60 #define AD9265_REG_ANALOG_INPUT 0x2C
63 #define TRANSFER_SYNC 0x1
66 #define TESTMODE_OFF 0x0
67 #define TESTMODE_MIDSCALE_SHORT 0x1
68 #define TESTMODE_POS_FULLSCALE 0x2
69 #define TESTMODE_NEG_FULLSCALE 0x3
70 #define TESTMODE_ALT_CHECKERBOARD 0x4
71 #define TESTMODE_PN23_SEQ 0x5
72 #define TESTMODE_PN9_SEQ 0x6
73 #define TESTMODE_ONE_ZERO_TOGGLE 0x7
76 #define OUTPUT_MODE_OFFSET_BINARY 0x0
77 #define OUTPUT_MODE_TWOS_COMPLEMENT 0x1
78 #define OUTPUT_MODE_GRAY_CODE 0x2
81 #define OUTPUT_EVEN_ODD_MODE_EN 0x20
82 #define INVERT_DCO_CLK 0x80
84 #define AD9265_CHIP_ID 0x64
85 #define AD9265_DEF_OUTPUT_MODE 0x40
Driver for the Analog Devices AXI-ADC-CORE module.
int32_t ad9265_calibrate(struct ad9265_dev *dev, struct ad9265_init_param init_param, struct axi_adc core)
ad9265_calibrate
Definition: ad9265.c:119
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:159
int32_t ad9265_remove(struct ad9265_dev *dev)
ad9265_remove
Definition: ad9265.c:321
uint8_t dco_en
Definition: ad9265.h:96
Header file of SPI Interface.
#define AD9265_REG_TEST_IO
Definition: ad9265.h:52
int32_t axi_adc_write(struct axi_adc *adc, uint32_t reg_addr, uint32_t reg_data)
AXI ADC Data Write.
Definition: axi_adc_core.c:71
struct no_os_spi_init_param spi_init
Definition: ad9265.h:92
Header file of Delay functions.
int32_t ad9265_calibrate(struct ad9265_dev *dev, struct ad9265_init_param init_param, struct axi_adc core)
ad9265_calibrate
Definition: ad9265.c:119
AXI ADC Device Descriptor.
Definition: axi_adc_core.h:122
#define AD9265_CHIP_ID
Definition: ad9265.h:84
Definition: ad9361_util.h:69
#define AXI_ADC_ENABLE
Definition: axi_adc_core.h:87
#define OUTPUT_EVEN_ODD_MODE_EN
Definition: ad9265.h:81
uint8_t dco
Definition: ad9265.h:95
#define AD9265_REG_OUTPUT_PHASE
Definition: ad9265.h:57
#define OUTPUT_MODE_TWOS_COMPLEMENT
Definition: ad9265.h:77
int32_t ad9265_remove(struct ad9265_dev *dev)
ad9265_remove
Definition: ad9265.c:321
int32_t ad9265_testmode_set(struct ad9265_dev *dev, uint8_t mode)
ad9265_setup
Definition: ad9265.c:107
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:126
#define AXI_ADC_PN_OOS
Definition: axi_adc_core.h:91
int32_t ad9265_spi_read(struct ad9265_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
ad9265_spi_read
Definition: ad9265.c:48
#define AD9265_REG_CHIP_ID
Definition: ad9265.h:47
void axi_adc_idelay_set(struct axi_adc *adc, uint32_t lane, uint32_t val)
Set input/output delay primitive for specific interface line.
Definition: axi_adc_core.c:192
int32_t axi_adc_read(struct axi_adc *adc, uint32_t reg_addr, uint32_t *reg_data)
AXI ADC Data read.
Definition: axi_adc_core.c:55
#define TESTMODE_OFF
Definition: ad9265.h:66
int32_t ad9265_outputmode_set(struct ad9265_dev *dev, uint8_t mode)
ad9265_setup
Definition: ad9265.c:89
#define AD9265_DEF_OUTPUT_MODE
Definition: ad9265.h:85
#define AXI_ADC_REG_CHAN_STATUS(c)
Definition: axi_adc_core.h:89
int32_t ad9265_outputmode_set(struct ad9265_dev *dev, uint8_t mode)
ad9265_setup
Definition: ad9265.c:89
#define AXI_ADC_REG_CHAN_CNTRL(c)
Definition: axi_adc_core.h:79
Structure holding SPI descriptor.
Definition: no_os_spi.h:192
int32_t ad9265_setup(struct ad9265_dev **device, struct ad9265_init_param init_param, struct axi_adc core)
ad9265_setup
Definition: ad9265.c:281
int32_t ad9265_spi_write(struct ad9265_dev *dev, uint16_t reg_addr, uint8_t reg_data)
ad9265_spi_write
Definition: ad9265.c:69
int32_t ad9265_spi_read(struct ad9265_dev *dev, uint16_t reg_addr, uint8_t *reg_data)
ad9265_spi_read
Definition: ad9265.c:48
int32_t ad9265_setup(struct ad9265_dev **device, struct ad9265_init_param init_param, struct axi_adc core)
ad9265_setup
Definition: ad9265.c:281
Header file of AD9265 Driver.
void * no_os_malloc(size_t size)
Allocate memory and return a pointer to it.
Definition: chibios_alloc.c:43
int32_t axi_adc_set_pnsel(struct axi_adc *adc, uint32_t chan, enum axi_adc_pn_sel sel)
Set AXI ADC PN sequence.
Definition: axi_adc_core.c:115
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:69
#define AD9265_REG_OUTPUT_DELAY
Definition: ad9265.h:58
#define TRANSFER_SYNC
Definition: ad9265.h:63
uint8_t output_mode
Definition: ad9265.h:94
#define TESTMODE_PN9_SEQ
Definition: ad9265.h:72
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:113
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:116
int32_t ad9265_spi_write(struct ad9265_dev *dev, uint16_t reg_addr, uint8_t reg_data)
ad9265_spi_write
Definition: ad9265.c:69
#define AD9265_REG_TRANSFER
Definition: ad9265.h:50
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:52
#define AXI_ADC_PN_ERR
Definition: axi_adc_core.h:90
#define AXI_ADC_DDR_EDGESEL
Definition: axi_adc_core.h:51
#define AD9265_REG_OUTPUT_MODE
Definition: ad9265.h:55
enum no_os_spi_mode mode
Definition: no_os_spi.h:202
int32_t ad9265_testmode_set(struct ad9265_dev *dev, uint8_t mode)
ad9265_setup
Definition: ad9265.c:107
@ AXI_ADC_PN9
Definition: axi_adc_core.h:157
struct no_os_spi_desc * spi_desc
Definition: ad9265.h:102
uint8_t nb_lanes
Definition: ad9265.h:97
chip_id
Definition: ad9172.h:51
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:140
#define AXI_ADC_REG_CNTRL
Definition: axi_adc_core.h:49