Header file of ADE7753 Driver. More...

#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include "no_os_util.h"
#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "no_os_irq.h"
#include "no_os_delay.h"
#include "no_os_units.h"
#include "no_os_alloc.h"
#include "no_os_crc16.h"
#include "no_os_print_log.h"
#include <stdlib.h>
#include <errno.h>
#include <math.h>

Include dependency graph for ade7753.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes
struct	ade7753_init_param
	ADE7753 Device initialization parameters. More...

struct	ade7753_dev
	ADE7753 Device structure. More...

struct	ade7753_energy_values
	ADE7753 energy registers values. More...

struct	ade7753_rms_values
	ADE7753 rms registers values. More...

struct	ade7753_period_value
	ADE7753 pq values. More...

Macros
#define	ADE7753_SPI_READ NO_OS_BIT(7)

#define	ADE7753_VERSION 0x3F

#define	ADE7753_REG_VERSION_PRODUCT 0x14

#define	IS_6BITS_REG(x)

#define	IS_8BITS_REG(x)

#define	IS_12BITS_REG(x)

#define	IS_16BITS_REG(x)

#define	IS_24BITS_REG(x)

#define	ADE7753_RESET_DEL 1

#define	ENABLE 1u

#define	DISABLE 0u

#define	ADE7753_REG_WAVEFORM 0x01

#define	ADE7753_REG_AENERGY 0x02

#define	ADE7753_REG_RAENERGY 0x03

#define	ADE7753_REG_LAENERGY 0x04

#define	ADE7753_REG_VAENERGY 0x05

#define	ADE7753_REG_RVAENERGY 0x06

#define	ADE7753_REG_LVAENERGY 0x07

#define	ADE7753_REG_LVARENERGY 0x08

#define	ADE7753_REG_MODE 0x09

#define	ADE7753_REG_IRQEN 0x0A

#define	ADE7753_REG_STATUS 0x0B

#define	ADE7753_REG_RSTSTATUS 0x0C

#define	ADE7753_REG_CH1OS 0x0D

#define	ADE7753_REG_CH2OS 0X0E

#define	ADE7753_REG_GAIN 0x0F

#define	ADE7753_REG_PHCAL 0x10

#define	ADE7753_REG_APOS 0x11

#define	ADE7753_REG_WGAIN 0x12

#define	ADE7753_REG_WDIV 0x13

#define	ADE7753_REG_CFNUM 0x14

#define	ADE7753_REG_CFDEN 0x15

#define	ADE7753_REG_IRMS 0x16

#define	ADE7753_REG_VRMS 0x17

#define	ADE7753_REG_IRMSOS 0x18

#define	ADE7753_REG_VRMSOS 0x19

#define	ADE7753_REG_VAGAIN 0x1A

#define	ADE7753_REG_VADIV 0X1B

#define	ADE7753_REG_LINECYC 0x1C

#define	ADE7753_REG_ZXTOUT 0x1D

#define	ADE7753_REG_SAGCYC 0x1E

#define	ADE7753_REG_SAGLVL 0x1F

#define	ADE7753_REG_IPKLVL 0x20

#define	ADE7753_REG_VPKLVL 0x21

#define	ADE7753_REG_IPEAK 0x22

#define	ADE7753_REG_RSTIPEAK 0x23

#define	ADE7753_REG_VPEAK 0x24

#define	ADE7753_REG_RSTVPEAK 0x25

#define	ADE7753_REG_TEMP 0x26

#define	ADE7753_REG_PERIOD 0x27

#define	ADE7753_REG_TMODE 0x3D

#define	ADE7753_REG_CHKSUM 0x3E

#define	ADE7753_REG_DIEREV 0x3F

#define	ADE7753_POAM_MSK NO_OS_BIT(15)

#define	ADE7753_WAVSEL_MSK NO_OS_GENMASK(14, 13)

#define	ADE7753_DTRT_MSK NO_OS_GENMASK(12, 11)

#define	ADE7753_SWAP_MSK NO_OS_BIT(10)

#define	ADE7753_DISCH2_MSK NO_OS_BIT(9)

#define	ADE7753_DISCH1_MSK NO_OS_BIT(8)

#define	ADE7753_CYCMODE_MSK NO_OS_BIT(7)

#define	ADE7753_SWRST_MSK NO_OS_BIT(6)

#define	ADE7753_TEMPSEL_MSK NO_OS_BIT(5)

#define	ADE7753_ASUSPEND_MSK NO_OS_BIT(4)

#define	ADE7753_DISSAG_MSK NO_OS_BIT(3)

#define	ADE7753_DISCF_MSK NO_OS_BIT(2)

#define	ADE7753_DISLPF2_MSK NO_OS_BIT(1)

#define	ADE7753_DISHPF_MSK NO_OS_BIT(0)

#define	ADE7753_PNEG_MSK NO_OS_BIT(14)

#define	ADE7753_PPOS_MSK NO_OS_BIT(13)

#define	ADE7753_ZXTO_MSK NO_OS_BIT(12)

#define	ADE7753_VAEOF_MSK NO_OS_BIT(11)

#define	ADE7753_VAEHF_MSK NO_OS_BIT(10)

#define	ADE7753_PKI_MSK NO_OS_BIT(9)

#define	ADE7753_PKV_MSK NO_OS_BIT(8)

#define	ADE7753_AEOF_MSK NO_OS_BIT(7)

#define	ADE7753_RESET_MSK NO_OS_BIT(6)

#define	ADE7753_TEMP_MSK NO_OS_BIT(5)

#define	ADE7753_ZX_MSK NO_OS_BIT(4)

#define	ADE7753_WSMP_MSK NO_OS_BIT(3)

#define	ADE7753_CYCEND_MSK NO_OS_BIT(2)

#define	ADE7753_SAG_MSK NO_OS_BIT(1)

#define	ADE7753_AEHF_MSK NO_OS_BIT(0)

#define	ADE7753_INTEGRATOR_MSK NO_OS_BIT(7)

#define	ADE7753_OFFSET_MSK NO_OS_GENMASK(5, 0)

#define	ADE7753_PGA2_GAIN_MSK NO_OS_GENMASK(7, 5)

#define	ADE7753_FULL_SCALE_MSK NO_OS_GENMASK(4, 3)

#define	ADE7753_PGA1_GAIN_MSK NO_OS_GENMASK(2, 0)

Enumerations
enum	ade7753_pga_gain_e { ADE7753_PGA_GAIN_1 , ADE7753_PGA_GAIN_2 , ADE7753_PGA_GAIN_4 , ADE7753_PGA_GAIN_8 , ADE7753_PGA_GAIN_16 }
	ADE7753 select the PGA gain. More...

enum	ade7753_ch_full_scale_sel_e { ADE7753_FS_0_5 , ADE7753_FS_0_25 , ADE7753_FS_0_125 }
	ADE7753 Channel 1 full-scale select. More...

enum	ade7753_dtrt_e { ADE7753_UPDATE_27_9KSPS , ADE7753_UPDATE_14KSPS , ADE7753_UPDATE_7KSPS , ADE7753_UPDATE_3_5KSPS }
	ADE7753 select the waveform register update rate. More...

enum	ade7753_wavsel_e { ADE7753_24BITS_ACTIVE_POWER , ADE7753_24BITS_CH1 = 2 , ADE7753_24BITS_CH2 }
	ADE7753 select the source of the sampled data for the waveform register. More...

Functions
int	ade7753_init (struct ade7753_dev **device, struct ade7753_init_param init_param)
	Initialize the device.

int	ade7753_read (struct ade7753_dev dev, uint16_t reg_addr, int32_t reg_data)
	Read device register.

int	ade7753_write (struct ade7753_dev *dev, uint16_t reg_addr, uint32_t reg_data)
	Write device register.

int	ade7753_update_bits (struct ade7753_dev *dev, uint16_t reg_addr, uint32_t mask, uint32_t reg_data)
	Update specific register bits.

int	ade7753_remove (struct ade7753_dev *dev)
	Remove the device and release resources.

int	ade7753_sw_reset (struct ade7753_dev *dev)
	Reset the device using SW reset.

int	ade7753_hw_reset (struct ade7753_dev *dev)
	Reset the device using HW reset.

int	ade7753_version_product (struct ade7753_dev dev, uint32_t data_read)
	Version product.

int	ade7753_read_reset_iapk_val (struct ade7753_dev dev, uint32_t val)
	read with reset Ipeak val

int	ade7753_reset_vpk_val (struct ade7753_dev dev, uint32_t val)
	read with reset Vpeak val

int	ade7753_get_int_status (struct ade7753_dev dev, uint32_t msk, uint8_t status)
	Get interrupt indicator from STATUS register.

int	ade7753_clear_irq_status (struct ade7753_dev dev, int32_t reg_data)
	Clear irq status flags.

int	ade7753_enable_irq (struct ade7753_dev *dev, uint32_t msk, uint8_t en)
	Enable/Disable interrupt.

int	ade7753_wave_update_rate (struct ade7753_dev *dev, enum ade7753_dtrt_e sel)
	Select waveform register update rate.

int	ade7753_wave_sample_data_source (struct ade7753_dev *dev, enum ade7753_wavsel_e sel)
	Select source of sampled data for wave register.

int	ade7753_energy_vals (struct ade7753_dev dev, struct ade7753_energy_values data)
	Read energy values.

int	ade7753_rms_vals (struct ade7753_dev dev, struct ade7753_rms_values data)
	Read rms values.

int	ade7753_period_val (struct ade7753_dev dev, struct ade7753_period_value data)
	Read period value.

Detailed Description

Header file of ADE7753 Driver.

Author: REtz (radu..nosp@m.etz@.nosp@m.analo.nosp@m.g.co.nosp@m.m)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ADE7753_AEHF_MSK

#define ADE7753_AEHF_MSK NO_OS_BIT(0)

◆ ADE7753_AEOF_MSK

#define ADE7753_AEOF_MSK NO_OS_BIT(7)

◆ ADE7753_ASUSPEND_MSK

#define ADE7753_ASUSPEND_MSK NO_OS_BIT(4)

◆ ADE7753_CYCEND_MSK

#define ADE7753_CYCEND_MSK NO_OS_BIT(2)

◆ ADE7753_CYCMODE_MSK

#define ADE7753_CYCMODE_MSK NO_OS_BIT(7)

◆ ADE7753_DISCF_MSK

#define ADE7753_DISCF_MSK NO_OS_BIT(2)

◆ ADE7753_DISCH1_MSK

#define ADE7753_DISCH1_MSK NO_OS_BIT(8)

◆ ADE7753_DISCH2_MSK

#define ADE7753_DISCH2_MSK NO_OS_BIT(9)

◆ ADE7753_DISHPF_MSK

#define ADE7753_DISHPF_MSK NO_OS_BIT(0)

◆ ADE7753_DISLPF2_MSK

#define ADE7753_DISLPF2_MSK NO_OS_BIT(1)

◆ ADE7753_DISSAG_MSK

#define ADE7753_DISSAG_MSK NO_OS_BIT(3)

◆ ADE7753_DTRT_MSK

#define ADE7753_DTRT_MSK NO_OS_GENMASK(12, 11)

◆ ADE7753_FULL_SCALE_MSK

#define ADE7753_FULL_SCALE_MSK NO_OS_GENMASK(4, 3)

◆ ADE7753_INTEGRATOR_MSK

#define ADE7753_INTEGRATOR_MSK NO_OS_BIT(7)

◆ ADE7753_OFFSET_MSK

#define ADE7753_OFFSET_MSK NO_OS_GENMASK(5, 0)

◆ ADE7753_PGA1_GAIN_MSK

#define ADE7753_PGA1_GAIN_MSK NO_OS_GENMASK(2, 0)

◆ ADE7753_PGA2_GAIN_MSK

#define ADE7753_PGA2_GAIN_MSK NO_OS_GENMASK(7, 5)

◆ ADE7753_PKI_MSK

#define ADE7753_PKI_MSK NO_OS_BIT(9)

◆ ADE7753_PKV_MSK

#define ADE7753_PKV_MSK NO_OS_BIT(8)

◆ ADE7753_PNEG_MSK

#define ADE7753_PNEG_MSK NO_OS_BIT(14)

◆ ADE7753_POAM_MSK

#define ADE7753_POAM_MSK NO_OS_BIT(15)

◆ ADE7753_PPOS_MSK

#define ADE7753_PPOS_MSK NO_OS_BIT(13)

◆ ADE7753_REG_AENERGY

#define ADE7753_REG_AENERGY 0x02

◆ ADE7753_REG_APOS

#define ADE7753_REG_APOS 0x11

◆ ADE7753_REG_CFDEN

#define ADE7753_REG_CFDEN 0x15

◆ ADE7753_REG_CFNUM

#define ADE7753_REG_CFNUM 0x14

◆ ADE7753_REG_CH1OS

#define ADE7753_REG_CH1OS 0x0D

◆ ADE7753_REG_CH2OS

#define ADE7753_REG_CH2OS 0X0E

◆ ADE7753_REG_CHKSUM

#define ADE7753_REG_CHKSUM 0x3E

◆ ADE7753_REG_DIEREV

#define ADE7753_REG_DIEREV 0x3F

◆ ADE7753_REG_GAIN

#define ADE7753_REG_GAIN 0x0F

◆ ADE7753_REG_IPEAK

#define ADE7753_REG_IPEAK 0x22

◆ ADE7753_REG_IPKLVL

#define ADE7753_REG_IPKLVL 0x20

◆ ADE7753_REG_IRMS

#define ADE7753_REG_IRMS 0x16

◆ ADE7753_REG_IRMSOS

#define ADE7753_REG_IRMSOS 0x18

◆ ADE7753_REG_IRQEN

#define ADE7753_REG_IRQEN 0x0A

◆ ADE7753_REG_LAENERGY

#define ADE7753_REG_LAENERGY 0x04

◆ ADE7753_REG_LINECYC

#define ADE7753_REG_LINECYC 0x1C

◆ ADE7753_REG_LVAENERGY

#define ADE7753_REG_LVAENERGY 0x07

◆ ADE7753_REG_LVARENERGY

#define ADE7753_REG_LVARENERGY 0x08

◆ ADE7753_REG_MODE

#define ADE7753_REG_MODE 0x09

◆ ADE7753_REG_PERIOD

#define ADE7753_REG_PERIOD 0x27

◆ ADE7753_REG_PHCAL

#define ADE7753_REG_PHCAL 0x10

◆ ADE7753_REG_RAENERGY

#define ADE7753_REG_RAENERGY 0x03

◆ ADE7753_REG_RSTIPEAK

#define ADE7753_REG_RSTIPEAK 0x23

◆ ADE7753_REG_RSTSTATUS

#define ADE7753_REG_RSTSTATUS 0x0C

◆ ADE7753_REG_RSTVPEAK

#define ADE7753_REG_RSTVPEAK 0x25

◆ ADE7753_REG_RVAENERGY

#define ADE7753_REG_RVAENERGY 0x06

◆ ADE7753_REG_SAGCYC

#define ADE7753_REG_SAGCYC 0x1E

◆ ADE7753_REG_SAGLVL

#define ADE7753_REG_SAGLVL 0x1F

◆ ADE7753_REG_STATUS

#define ADE7753_REG_STATUS 0x0B

◆ ADE7753_REG_TEMP

#define ADE7753_REG_TEMP 0x26

◆ ADE7753_REG_TMODE

#define ADE7753_REG_TMODE 0x3D

◆ ADE7753_REG_VADIV

#define ADE7753_REG_VADIV 0X1B

◆ ADE7753_REG_VAENERGY

#define ADE7753_REG_VAENERGY 0x05

◆ ADE7753_REG_VAGAIN

#define ADE7753_REG_VAGAIN 0x1A

◆ ADE7753_REG_VERSION_PRODUCT

#define ADE7753_REG_VERSION_PRODUCT 0x14

◆ ADE7753_REG_VPEAK

#define ADE7753_REG_VPEAK 0x24

◆ ADE7753_REG_VPKLVL

#define ADE7753_REG_VPKLVL 0x21

◆ ADE7753_REG_VRMS

#define ADE7753_REG_VRMS 0x17

◆ ADE7753_REG_VRMSOS

#define ADE7753_REG_VRMSOS 0x19

◆ ADE7753_REG_WAVEFORM

#define ADE7753_REG_WAVEFORM 0x01

◆ ADE7753_REG_WDIV

#define ADE7753_REG_WDIV 0x13

◆ ADE7753_REG_WGAIN

#define ADE7753_REG_WGAIN 0x12

◆ ADE7753_REG_ZXTOUT

#define ADE7753_REG_ZXTOUT 0x1D

◆ ADE7753_RESET_DEL

#define ADE7753_RESET_DEL 1

◆ ADE7753_RESET_MSK

#define ADE7753_RESET_MSK NO_OS_BIT(6)

◆ ADE7753_SAG_MSK

#define ADE7753_SAG_MSK NO_OS_BIT(1)

◆ ADE7753_SPI_READ

#define ADE7753_SPI_READ NO_OS_BIT(7)

◆ ADE7753_SWAP_MSK

#define ADE7753_SWAP_MSK NO_OS_BIT(10)

◆ ADE7753_SWRST_MSK

#define ADE7753_SWRST_MSK NO_OS_BIT(6)

◆ ADE7753_TEMP_MSK

#define ADE7753_TEMP_MSK NO_OS_BIT(5)

◆ ADE7753_TEMPSEL_MSK

#define ADE7753_TEMPSEL_MSK NO_OS_BIT(5)

◆ ADE7753_VAEHF_MSK

#define ADE7753_VAEHF_MSK NO_OS_BIT(10)

◆ ADE7753_VAEOF_MSK

#define ADE7753_VAEOF_MSK NO_OS_BIT(11)

◆ ADE7753_VERSION

#define ADE7753_VERSION 0x3F

◆ ADE7753_WAVSEL_MSK

#define ADE7753_WAVSEL_MSK NO_OS_GENMASK(14, 13)

◆ ADE7753_WSMP_MSK

#define ADE7753_WSMP_MSK NO_OS_BIT(3)

◆ ADE7753_ZX_MSK

#define ADE7753_ZX_MSK NO_OS_BIT(4)

◆ ADE7753_ZXTO_MSK

#define ADE7753_ZXTO_MSK NO_OS_BIT(12)

◆ DISABLE

#define DISABLE 0u

◆ ENABLE

#define ENABLE 1u

◆ IS_12BITS_REG

#define IS_12BITS_REG ( x )

Value:

(((x) == ADE7753_REG_WGAIN) || ((x) >= ADE7753_REG_IRMSOS && (x) <= ADE7753_REG_VAGAIN) \

|| ((x) >= ADE7753_REG_CFNUM && (x) <= ADE7753_REG_CFDEN) || ((x) == ADE7753_REG_ZXTOUT))

ADE7753_REG_CFDEN

#define ADE7753_REG_CFDEN

Definition ade7753.h:101

ADE7753_REG_ZXTOUT

#define ADE7753_REG_ZXTOUT

Definition ade7753.h:109

ADE7753_REG_IRMSOS

#define ADE7753_REG_IRMSOS

Definition ade7753.h:104

ADE7753_REG_CFNUM

#define ADE7753_REG_CFNUM

Definition ade7753.h:100

ADE7753_REG_VAGAIN

#define ADE7753_REG_VAGAIN

Definition ade7753.h:106

ADE7753_REG_WGAIN

#define ADE7753_REG_WGAIN

Definition ade7753.h:98

◆ IS_16BITS_REG

#define IS_16BITS_REG ( x )

Value:

(((x) >= ADE7753_REG_MODE && (x) <= ADE7753_REG_RSTSTATUS) \

|| ((x) == ADE7753_REG_APOS) || ((x) == ADE7753_REG_LINECYC) || ((x) == ADE7753_REG_PERIOD))

ADE7753_REG_PERIOD

#define ADE7753_REG_PERIOD

Definition ade7753.h:119

ADE7753_REG_APOS

#define ADE7753_REG_APOS

Definition ade7753.h:97

ADE7753_REG_MODE

#define ADE7753_REG_MODE

Definition ade7753.h:89

ADE7753_REG_LINECYC

#define ADE7753_REG_LINECYC

Definition ade7753.h:108

ADE7753_REG_RSTSTATUS

#define ADE7753_REG_RSTSTATUS

Definition ade7753.h:92

◆ IS_24BITS_REG

#define IS_24BITS_REG ( x )

Value:

        (((x) >= ADE7753_REG_WAVEFORM && (x) <= ADE7753_REG_LVARENERGY) || \
        ((x) >= ADE7753_REG_IRMS && (x) <= ADE7753_REG_VRMS) ||  \
        ((x) >= ADE7753_REG_IPEAK && (x) <= ADE7753_REG_RSTVPEAK))

◆ IS_6BITS_REG

#define IS_6BITS_REG ( x )

Value:

(((x) == ADE7753_REG_PHCAL) || ((x) == ADE7753_REG_CHKSUM))

ADE7753_REG_PHCAL

#define ADE7753_REG_PHCAL

Definition ade7753.h:96

ADE7753_REG_CHKSUM

#define ADE7753_REG_CHKSUM

Definition ade7753.h:121

◆ IS_8BITS_REG

#define IS_8BITS_REG ( x )

Value:

            (((x) >= ADE7753_REG_CH1OS && (x) <= ADE7753_REG_GAIN) \
            || ((x) == ADE7753_REG_WDIV) || ((x) == ADE7753_REG_VADIV) || \
        ((x) >= ADE7753_REG_SAGCYC && (x) <= ADE7753_REG_VPKLVL) || ((x) == ADE7753_REG_TEMP) \
        || ((x) == ADE7753_REG_TMODE) || ((x) == ADE7753_REG_DIEREV))

Enumeration Type Documentation

◆ ade7753_ch_full_scale_sel_e

enum ade7753_ch_full_scale_sel_e

ADE7753 Channel 1 full-scale select.

Enumerator
ADE7753_FS_0_5
ADE7753_FS_0_25
ADE7753_FS_0_125

◆ ade7753_dtrt_e

enum ade7753_dtrt_e

ADE7753 select the waveform register update rate.

Enumerator
ADE7753_UPDATE_27_9KSPS
ADE7753_UPDATE_14KSPS
ADE7753_UPDATE_7KSPS
ADE7753_UPDATE_3_5KSPS

◆ ade7753_pga_gain_e

enum ade7753_pga_gain_e

ADE7753 select the PGA gain.

Enumerator
ADE7753_PGA_GAIN_1
ADE7753_PGA_GAIN_2
ADE7753_PGA_GAIN_4
ADE7753_PGA_GAIN_8
ADE7753_PGA_GAIN_16

◆ ade7753_wavsel_e

enum ade7753_wavsel_e

ADE7753 select the source of the sampled data for the waveform register.

Enumerator
ADE7753_24BITS_ACTIVE_POWER
ADE7753_24BITS_CH1
ADE7753_24BITS_CH2

Function Documentation

◆ ade7753_clear_irq_status()

int ade7753_clear_irq_status	(	struct ade7753_dev *	dev,
		int32_t *	reg_data )

Clear irq status flags.

Parameters

dev	- The device structure.
reg_data	- value of the status register

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_enable_irq()

int ade7753_enable_irq	(	struct ade7753_dev *	dev,
		uint32_t	msk,
		uint8_t	en )

Enable/Disable interrupt.

Parameters

dev	- The device structure.
msk	- Interrupt mask.
en	-Enable/Disable

Returns: 0 in case of success, negative error code otherwise.

◆ ade7753_energy_vals()

int ade7753_energy_vals	(	struct ade7753_dev *	dev,
		struct ade7753_energy_values *	data )

Read energy values.

Parameters

dev	- The device structure.
data	- Structure to store energy values

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_get_int_status()

int ade7753_get_int_status	(	struct ade7753_dev *	dev,
		uint32_t	msk,
		uint8_t *	status )

Get interrupt indicator from STATUS register.

Parameters

dev	- The device structure.
msk	- Interrupt mask.
status	- Status indicator.

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_hw_reset()

int ade7753_hw_reset ( struct ade7753_dev * dev )

Reset the device using HW reset.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_init()

int ade7753_init	(	struct ade7753_dev **	device,
		struct ade7753_init_param	init_param )

Initialize the device.

Parameters

device	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_period_val()

int ade7753_period_val	(	struct ade7753_dev *	dev,
		struct ade7753_period_value *	data )

Read period value.

Parameters

dev	- The device structure.
data	- Structure to store the period val

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_read()

int ade7753_read	(	struct ade7753_dev *	dev,
		uint16_t	reg_addr,
		int32_t *	reg_data )

Read device register.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The data read from 32bit register.

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_read_reset_iapk_val()

int ade7753_read_reset_iapk_val	(	struct ade7753_dev *	dev,
		uint32_t *	val )

read with reset Ipeak val

Parameters

dev	- The device structure.
val	- Iapeak val

Returns: 0 in case of success, negative error code otherwise.

◆ ade7753_remove()

int ade7753_remove ( struct ade7753_dev * dev )

Remove the device and release resources.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ade7753_reset_vpk_val()

int ade7753_reset_vpk_val	(	struct ade7753_dev *	dev,
		uint32_t *	val )

read with reset Vpeak val

Parameters

dev	- The device structure.
val	- Vpeak val

Returns: 0 in case of success, negative error code otherwise.

◆ ade7753_rms_vals()

int ade7753_rms_vals	(	struct ade7753_dev *	dev,
		struct ade7753_rms_values *	data )

Read rms values.

Parameters

dev	- The device structure.
data	- Structure to store rms values

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_sw_reset()

int ade7753_sw_reset ( struct ade7753_dev * dev )

Reset the device using SW reset.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_update_bits()

int ade7753_update_bits	(	struct ade7753_dev *	dev,
		uint16_t	reg_addr,
		uint32_t	mask,
		uint32_t	reg_data )

Update specific register bits.

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- Specific bits mask.
reg_data	- The data to be written.

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_version_product()

int ade7753_version_product	(	struct ade7753_dev *	dev,
		uint32_t *	data_read )

Version product.

Parameters

dev	- The device structure.
data_read	- The version product read value

Returns: 0 in case of success, negative error code otherwise.

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◆ ade7753_wave_sample_data_source()

int ade7753_wave_sample_data_source	(	struct ade7753_dev *	dev,
		enum ade7753_wavsel_e	sel )

Select source of sampled data for wave register.

Parameters

dev	- The device structure.
sel	- Update rate

Returns: 0 in case of success, negative error code otherwise.

◆ ade7753_wave_update_rate()

int ade7753_wave_update_rate	(	struct ade7753_dev *	dev,
		enum ade7753_dtrt_e	sel )

Select waveform register update rate.

Parameters

dev	- The device structure.
sel	- Update rate

Returns: 0 in case of success, negative error code otherwise.

◆ ade7753_write()

int ade7753_write	(	struct ade7753_dev *	dev,
		uint16_t	reg_addr,
		uint32_t	reg_data )

Write device register.

Parameters

dev-	The device structure.
reg_addr	- The register address.
reg_data	- The data to be written.

Returns: 0 in case of success, negative error code otherwise.

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Classes

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ ADE7753_AEHF_MSK

◆ ADE7753_AEOF_MSK

◆ ADE7753_ASUSPEND_MSK

◆ ADE7753_CYCEND_MSK

◆ ADE7753_CYCMODE_MSK

◆ ADE7753_DISCF_MSK

◆ ADE7753_DISCH1_MSK

◆ ADE7753_DISCH2_MSK

◆ ADE7753_DISHPF_MSK

◆ ADE7753_DISLPF2_MSK

◆ ADE7753_DISSAG_MSK

◆ ADE7753_DTRT_MSK

◆ ADE7753_FULL_SCALE_MSK

◆ ADE7753_INTEGRATOR_MSK

◆ ADE7753_OFFSET_MSK

◆ ADE7753_PGA1_GAIN_MSK

◆ ADE7753_PGA2_GAIN_MSK

◆ ADE7753_PKI_MSK

◆ ADE7753_PKV_MSK

◆ ADE7753_PNEG_MSK

◆ ADE7753_POAM_MSK

◆ ADE7753_PPOS_MSK

◆ ADE7753_REG_AENERGY

◆ ADE7753_REG_APOS

◆ ADE7753_REG_CFDEN

◆ ADE7753_REG_CFNUM

◆ ADE7753_REG_CH1OS

◆ ADE7753_REG_CH2OS

◆ ADE7753_REG_CHKSUM

◆ ADE7753_REG_DIEREV

◆ ADE7753_REG_GAIN

◆ ADE7753_REG_IPEAK

◆ ADE7753_REG_IPKLVL

◆ ADE7753_REG_IRMS

◆ ADE7753_REG_IRMSOS

◆ ADE7753_REG_IRQEN

◆ ADE7753_REG_LAENERGY

◆ ADE7753_REG_LINECYC

◆ ADE7753_REG_LVAENERGY

◆ ADE7753_REG_LVARENERGY

◆ ADE7753_REG_MODE

◆ ADE7753_REG_PERIOD

◆ ADE7753_REG_PHCAL

◆ ADE7753_REG_RAENERGY

◆ ADE7753_REG_RSTIPEAK

◆ ADE7753_REG_RSTSTATUS

◆ ADE7753_REG_RSTVPEAK

◆ ADE7753_REG_RVAENERGY

◆ ADE7753_REG_SAGCYC

◆ ADE7753_REG_SAGLVL

◆ ADE7753_REG_STATUS

◆ ADE7753_REG_TEMP

◆ ADE7753_REG_TMODE

◆ ADE7753_REG_VADIV

◆ ADE7753_REG_VAENERGY

◆ ADE7753_REG_VAGAIN

◆ ADE7753_REG_VERSION_PRODUCT

◆ ADE7753_REG_VPEAK

◆ ADE7753_REG_VPKLVL

◆ ADE7753_REG_VRMS

◆ ADE7753_REG_VRMSOS

◆ ADE7753_REG_WAVEFORM

◆ ADE7753_REG_WDIV

◆ ADE7753_REG_WGAIN

◆ ADE7753_REG_ZXTOUT

◆ ADE7753_RESET_DEL

◆ ADE7753_RESET_MSK

◆ ADE7753_SAG_MSK

◆ ADE7753_SPI_READ

◆ ADE7753_SWAP_MSK

◆ ADE7753_SWRST_MSK

◆ ADE7753_TEMP_MSK

◆ ADE7753_TEMPSEL_MSK

◆ ADE7753_VAEHF_MSK