no-OS
ade9430.h
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1 /***************************************************************************/
33 #ifndef __ADE9430_H__
34 #define __ADE9430_H__
35 
36 /******************************************************************************/
37 /***************************** Include Files **********************************/
38 /******************************************************************************/
39 #include <stdbool.h>
40 #include <stdint.h>
41 #include <string.h>
42 #include "no_os_util.h"
43 #include "no_os_spi.h"
44 
45 /******************************************************************************/
46 /********************** Macros and Constants Definitions **********************/
47 /******************************************************************************/
48 
49 /* SPI commands */
50 #define ADE9430_SPI_READ NO_OS_BIT(3)
51 #define ADE9430_R1B NO_OS_BIT(16)
52 #define ADE9430_R2B NO_OS_BIT(17)
53 
54 /* ADE9430 Register Map */
55 #define ADE9430_REG_AIGAIN 0x0000
56 #define ADE9430_REG_AIGAIN0 0x0001
57 #define ADE9430_REG_AIGAIN1 0x0002
58 #define ADE9430_REG_AIGAIN2 0x0003
59 #define ADE9430_REG_AIGAIN3 0x0004
60 #define ADE9430_REG_AIGAIN4 0x0005
61 #define ADE9430_REG_APHCAL0 0x0006
62 #define ADE9430_REG_APHCAL1 0x0007
63 #define ADE9430_REG_APHCAL2 0x0008
64 #define ADE9430_REG_APHCAL3 0x0009
65 #define ADE9430_REG_APHCAL4 0x000A
66 #define ADE9430_REG_AVGAIN 0x000B
67 #define ADE9430_REG_AIRMSOS 0x000C
68 #define ADE9430_REG_AVRMSOS 0x000D
69 #define ADE9430_REG_APGAIN 0x000E
70 #define ADE9430_REG_AWATTOS 0x000F
71 #define ADE9430_REG_AVAROS 0x0010
72 #define ADE9430_REG_AFWATTOS 0x0011
73 #define ADE9430_REG_AFVAROS 0x0012
74 #define ADE9430_REG_AIFRMSOS 0x0013
75 #define ADE9430_REG_AVFRMSOS 0x0014
76 #define ADE9430_REG_AVRMSONEOS 0x0015
77 #define ADE9430_REG_AIRMSONEOS 0x0016
78 #define ADE9430_REG_AVRMS1012OS 0x0017
79 #define ADE9430_REG_AIRMS1012OS 0x0018
80 #define ADE9430_REG_BIGAIN 0x0020
81 #define ADE9430_REG_BIGAIN0 0x0021
82 #define ADE9430_REG_BIGAIN1 0x0022
83 #define ADE9430_REG_BIGAIN2 0x0023
84 #define ADE9430_REG_BIGAIN3 0x0024
85 #define ADE9430_REG_BIGAIN4 0x0025
86 #define ADE9430_REG_BPHCAL0 0x0026
87 #define ADE9430_REG_BPHCAL1 0x0027
88 #define ADE9430_REG_BPHCAL2 0x0028
89 #define ADE9430_REG_BPHCAL3 0x0029
90 #define ADE9430_REG_BPHCAL4 0x002A
91 #define ADE9430_REG_BVGAIN 0x002B
92 #define ADE9430_REG_BIRMSOS 0x002C
93 #define ADE9430_REG_BVRMSOS 0x002D
94 #define ADE9430_REG_BPGAIN 0x002E
95 #define ADE9430_REG_BWATTOS 0x002F
96 #define ADE9430_REG_BVAROS 0x0030
97 #define ADE9430_REG_BFWATTOS 0x0031
98 #define ADE9430_REG_BFVAROS 0x0032
99 #define ADE9430_REG_BIFRMSOS 0x0033
100 #define ADE9430_REG_BVFRMSOS 0x0034
101 #define ADE9430_REG_BVRMSONEOS 0x0035
102 #define ADE9430_REG_BIRMSONEOS 0x0036
103 #define ADE9430_REG_BVRMS1012OS 0x0037
104 #define ADE9430_REG_BIRMS1012OS 0x0038
105 #define ADE9430_REG_CIGAIN 0x0040
106 #define ADE9430_REG_CIGAIN0 0x0041
107 #define ADE9430_REG_CIGAIN1 0x0042
108 #define ADE9430_REG_CIGAIN2 0x0043
109 #define ADE9430_REG_CIGAIN3 0x0044
110 #define ADE9430_REG_CIGAIN4 0x0045
111 #define ADE9430_REG_CPHCAL0 0x0046
112 #define ADE9430_REG_CPHCAL1 0x0047
113 #define ADE9430_REG_CPHCAL2 0x0048
114 #define ADE9430_REG_CPHCAL3 0x0049
115 #define ADE9430_REG_CPHCAL4 0x004A
116 #define ADE9430_REG_CVGAIN 0x004B
117 #define ADE9430_REG_CIRMSOS 0x004C
118 #define ADE9430_REG_CVRMSOS 0x004D
119 #define ADE9430_REG_CPGAIN 0x004E
120 #define ADE9430_REG_CWATTOS 0x004F
121 #define ADE9430_REG_CVAROS 0x0050
122 #define ADE9430_REG_CFWATTOS 0x0051
123 #define ADE9430_REG_CFVAROS 0x0052
124 #define ADE9430_REG_CIFRMSOS 0x0053
125 #define ADE9430_REG_CVFRMSOS 0x0054
126 #define ADE9430_REG_CVRMSONEOS 0x0055
127 #define ADE9430_REG_CIRMSONEOS 0x0056
128 #define ADE9430_REG_CVRMS1012OS 0x0057
129 #define ADE9430_REG_CIRMS1012OS 0x0058
130 #define ADE9430_REG_CONFIG0 0x0060
131 #define ADE9430_REG_MTTHR_L0 0x0061
132 #define ADE9430_REG_MTTHR_L1 0x0062
133 #define ADE9430_REG_MTTHR_L2 0x0063
134 #define ADE9430_REG_MTTHR_L3 0x0064
135 #define ADE9430_REG_MTTHR_L4 0x0065
136 #define ADE9430_REG_MTTHR_H0 0x0066
137 #define ADE9430_REG_MTTHR_H1 0x0067
138 #define ADE9430_REG_MTTHR_H2 0x0068
139 #define ADE9430_REG_MTTHR_H3 0x0069
140 #define ADE9430_REG_MTTHR_H4 0x006A
141 #define ADE9430_REG_NIRMSOS 0x006B
142 #define ADE9430_REG_ISUMRMSOS 0x006C
143 #define ADE9430_REG_NIGAIN 0x006D
144 #define ADE9430_REG_NPHCAL 0x006E
145 #define ADE9430_REG_NIRMSONEOS 0x006F
146 #define ADE9430_REG_NIRMS1012OS 0x0070
147 #define ADE9430_REG_VNOM 0x0071
148 #define ADE9430_REG_ISUMLVL 0x0073
149 #define ADE9430_REG_AI_PCF 0x020A
150 #define ADE9430_REG_AV_PCF 0x020B
151 #define ADE9430_REG_AIRMS 0x020C
152 #define ADE9430_REG_AVRMS 0x020D
153 #define ADE9430_REG_AIFRMS 0x020E
154 #define ADE9430_REG_AVFRMS 0x020F
155 #define ADE9430_REG_AWATT 0x0210
156 #define ADE9430_REG_AVAR 0x0211
157 #define ADE9430_REG_AVA 0x0212
158 #define ADE9430_REG_AFWATT 0x0213
159 #define ADE9430_REG_AFVAR 0x0214
160 #define ADE9430_REG_AFVA 0x0215
161 #define ADE9430_REG_APF 0x0216
162 #define ADE9430_REG_AIRMSONE 0x0219
163 #define ADE9430_REG_AVRMSONE 0x021A
164 #define ADE9430_REG_AIRMS1012 0x021B
165 #define ADE9430_REG_AVRMS1012 0x021C
166 #define ADE9430_REG_AMTREGION 0x021D
167 #define ADE9430_REG_BI_PCF 0x022A
168 #define ADE9430_REG_BV_PCF 0x022B
169 #define ADE9430_REG_BIRMS 0x022C
170 #define ADE9430_REG_BVRMS 0x022D
171 #define ADE9430_REG_BIFRMS 0x022E
172 #define ADE9430_REG_BVFRMS 0x022F
173 #define ADE9430_REG_BWATT 0x0230
174 #define ADE9430_REG_BVAR 0x0231
175 #define ADE9430_REG_BVA 0x0232
176 #define ADE9430_REG_BFWATT 0x0233
177 #define ADE9430_REG_BFVAR 0x0234
178 #define ADE9430_REG_BFVA 0x0235
179 #define ADE9430_REG_BPF 0x0236
180 #define ADE9430_REG_BIRMSONE 0x0239
181 #define ADE9430_REG_BVRMSONE 0x023A
182 #define ADE9430_REG_BIRMS1012 0x023B
183 #define ADE9430_REG_BVRMS1012 0x023C
184 #define ADE9430_REG_BMTREGION 0x023D
185 #define ADE9430_REG_CI_PCF 0x024A
186 #define ADE9430_REG_CV_PCF 0x024B
187 #define ADE9430_REG_CIRMS 0x024C
188 #define ADE9430_REG_CVRMS 0x024D
189 #define ADE9430_REG_CIFRMS 0x024E
190 #define ADE9430_REG_CVFRMS 0x024F
191 #define ADE9430_REG_CWATT 0x0250
192 #define ADE9430_REG_CVAR 0x0251
193 #define ADE9430_REG_CVA 0x0252
194 #define ADE9430_REG_CFWATT 0x0253
195 #define ADE9430_REG_CFVAR 0x0254
196 #define ADE9430_REG_CFVA 0x0255
197 #define ADE9430_REG_CPF 0x0256
198 #define ADE9430_REG_CIRMSONE 0x0259
199 #define ADE9430_REG_CVRMSONE 0x025A
200 #define ADE9430_REG_CIRMS1012 0x025B
201 #define ADE9430_REG_CVRMS1012 0x025C
202 #define ADE9430_REG_CMTREGION 0x025D
203 #define ADE9430_REG_NI_PCF 0x0265
204 #define ADE9430_REG_NIRMS 0x0266
205 #define ADE9430_REG_NIRMSONE 0x0267
206 #define ADE9430_REG_NIRMS1012 0x0268
207 #define ADE9430_REG_ISUMRMS 0x0269
208 #define ADE9430_REG_VERSION2 0x026A
209 #define ADE9430_REG_NPERIOD_FORRMS 0x026B
210 #define ADE9430_REG_COH_PAGE 0x026C
211 #define ADE9430_REG_RESAMPLE_STATUS 0x026D
212 #define ADE9430_REG_AWATT_ACC 0x02E5
213 #define ADE9430_REG_AWATTHR_LO 0x02E6
214 #define ADE9430_REG_AWATTHR_HI 0x02E7
215 #define ADE9430_REG_AVAR_ACC 0x02EF
216 #define ADE9430_REG_AVARHR_LO 0x02F0
217 #define ADE9430_REG_AVARHR_HI 0x02F1
218 #define ADE9430_REG_AVA_ACC 0x02F9
219 #define ADE9430_REG_AVAHR_LO 0x02FA
220 #define ADE9430_REG_AVAHR_HI 0x02FB
221 #define ADE9430_REG_AFWATT_ACC 0x0303
222 #define ADE9430_REG_AFWATTHR_LO 0x0304
223 #define ADE9430_REG_AFWATTHR_HI 0x0305
224 #define ADE9430_REG_AFVAR_ACC 0x030D
225 #define ADE9430_REG_AFVARHR_LO 0x030E
226 #define ADE9430_REG_AFVARHR_HI 0x030F
227 #define ADE9430_REG_AFVA_ACC 0x0317
228 #define ADE9430_REG_AFVAHR_LO 0x0318
229 #define ADE9430_REG_AFVAHR_HI 0x0319
230 #define ADE9430_REG_BWATT_ACC 0x0321
231 #define ADE9430_REG_BWATTHR_LO 0x0322
232 #define ADE9430_REG_BWATTHR_HI 0x0323
233 #define ADE9430_REG_BVAR_ACC 0x032B
234 #define ADE9430_REG_BVARHR_LO 0x032C
235 #define ADE9430_REG_BVARHR_HI 0x032D
236 #define ADE9430_REG_BVA_ACC 0x0335
237 #define ADE9430_REG_BVAHR_LO 0x0336
238 #define ADE9430_REG_BVAHR_HI 0x0337
239 #define ADE9430_REG_BFWATT_ACC 0x033F
240 #define ADE9430_REG_BFWATTHR_LO 0x0340
241 #define ADE9430_REG_BFWATTHR_HI 0x0341
242 #define ADE9430_REG_BFVAR_ACC 0x0349
243 #define ADE9430_REG_BFVARHR_LO 0x034A
244 #define ADE9430_REG_BFVARHR_HI 0x034B
245 #define ADE9430_REG_BFVA_ACC 0x0353
246 #define ADE9430_REG_BFVAHR_LO 0x0354
247 #define ADE9430_REG_BFVAHR_HI 0x0355
248 #define ADE9430_REG_CWATT_ACC 0x0355
249 #define ADE9430_REG_CWATTHR_LO 0x035E
250 #define ADE9430_REG_CWATTHR_HI 0x035F
251 #define ADE9430_REG_CVAR_ACC 0x0367
252 #define ADE9430_REG_CVARHR_LO 0x0368
253 #define ADE9430_REG_CVARHR_HI 0x0369
254 #define ADE9430_REG_CVA_ACC 0x0371
255 #define ADE9430_REG_CVAHR_LO 0x0372
256 #define ADE9430_REG_CVAHR_HI 0x0373
257 #define ADE9430_REG_CFWATT_ACC 0x037B
258 #define ADE9430_REG_CFWATTHR_LO 0x037C
259 #define ADE9430_REG_CFWATTHR_HI 0x037D
260 #define ADE9430_REG_CFVAR_ACC 0x0385
261 #define ADE9430_REG_CFVARHR_LO 0x0386
262 #define ADE9430_REG_CFVARHR_HI 0x0387
263 #define ADE9430_REG_CFVA_ACC 0x038F
264 #define ADE9430_REG_CFVAHR_LO 0x0390
265 #define ADE9430_REG_CFVAHR_HI 0x0391
266 #define ADE9430_REG_PWATT_ACC 0x0397
267 #define ADE9430_REG_NWATT_ACC 0x039B
268 #define ADE9430_REG_PVAR_ACC 0x039F
269 #define ADE9430_REG_NVAR_ACC 0x03A3
270 #define ADE9430_REG_IPEAK 0x0400
271 #define ADE9430_REG_VPEAK 0x0401
272 #define ADE9430_REG_STATUS0 0x0402
273 #define ADE9430_REG_STATUS1 0x0403
274 #define ADE9430_REG_EVENT_STATUS 0x0404
275 #define ADE9430_REG_MASK0 0x0405
276 #define ADE9430_REG_MASK1 0x0406
277 #define ADE9430_REG_EVENT_MASK 0x0407
278 #define ADE9430_REG_OILVL 0x0409
279 #define ADE9430_REG_OIA 0x040A
280 #define ADE9430_REG_OIB 0x040B
281 #define ADE9430_REG_OIC 0x040C
282 #define ADE9430_REG_OIN 0x040D
283 #define ADE9430_REG_USER_PERIOD 0x040E
284 #define ADE9430_REG_VLEVEL 0x040F
285 #define ADE9430_REG_APERIOD 0x0418
286 #define ADE9430_REG_BPERIOD 0x0419
287 #define ADE9430_REG_CPERIOD 0x041A
288 #define ADE9430_REG_COM_PERIOD 0x041B
289 #define ADE9430_REG_ACT_NL_LVL 0x041C
290 #define ADE9430_REG_REACT_NL_LVL 0x041D
291 #define ADE9430_REG_APP_NL_LVL 0x041E
292 #define ADE9430_REG_PHNOLOAD 0x041F
293 #define ADE9430_REG_WTHR 0x0420
294 #define ADE9430_REG_VARTHR 0x0421
295 #define ADE9430_REG_VATHR 0x0422
296 #define ADE9430_REG_LAST_DATA_32 0x0423
297 #define ADE9430_REG_ADC_REDIRECT 0x0424
298 #define ADE9430_REG_CF_LCFG 0x0425
299 #define ADE9430_REG_PART_ID 0x0472
300 #define ADE9430_REG_TEMP_TRIM 0x0474
301 #define ADE9430_REG_RUN 0x0480
302 #define ADE9430_REG_CONFIG1 0x0481
303 #define ADE9430_REG_ANGL_VA_VB 0x0482
304 #define ADE9430_REG_ANGL_VB_VC 0x0483
305 #define ADE9430_REG_ANGL_VA_VC 0x0484
306 #define ADE9430_REG_ANGL_VB_IA 0x0485
307 #define ADE9430_REG_ANGL_VB_IB 0x0486
308 #define ADE9430_REG_ANGL_VC_IC 0x0487
309 #define ADE9430_REG_ANGL_IA_IB 0x0488
310 #define ADE9430_REG_ANGL_IB_IC 0x0489
311 #define ADE9430_REG_ANGL_IA_IC 0x048A
312 #define ADE9430_REG_OISTATUS 0x048F
313 #define ADE9430_REG_CFMODE 0x0490
314 #define ADE9430_REG_COMPMODE 0x0491
315 #define ADE9430_REG_ACCMODE 0x0492
316 #define ADE9430_REG_CONFIG3 0x0493
317 #define ADE9430_REG_CF1DEN 0x0494
318 #define ADE9430_REG_CF2DEN 0x0495
319 #define ADE9430_REG_CF3DEN 0x0496
320 #define ADE9430_REG_CF4DEN 0x0497
321 #define ADE9430_REG_ZXTOUT 0x0498
322 #define ADE9430_REG_ZXTHRSH 0x0499
323 #define ADE9430_REG_ZX_LP_SEL 0x049A
324 #define ADE9430_REG_SEQ_CYC 0x049C
325 #define ADE9430_REG_PHSIGN 0x049D
326 #define ADE9430_REG_WFB_CFG 0x04A0
327 #define ADE9430_REG_WFB_PG_IRQEN 0x04A1
328 #define ADE9430_REG_WFB_TRG_CFG 0x04A2
329 #define ADE9430_REG_WFB_TRG_STAT 0x04A3
330 #define ADE9430_REG_CONFIG5 0x04A4
331 #define ADE9430_REG_CRC_RSLT 0x04A8
332 #define ADE9430_REG_CRC_SPI 0x04A9
333 #define ADE9430_REG_LAST_DATA_16 0x04AC
334 #define ADE9430_REG_LAST_CMD 0x04AE
335 #define ADE9430_REG_CONFIG2 0x04AF
336 #define ADE9430_REG_EP_CFG 0x04B0
337 #define ADE9430_REG_PWR_TIME 0x04B1
338 #define ADE9430_REG_EGY_TIME 0x04B2
339 #define ADE9430_REG_CRC_FORCE 0x04B4
340 #define ADE9430_REG_CRC_OPTEN 0x04B5
341 #define ADE9430_REG_TEMP_CFG 0x04B6
342 #define ADE9430_REG_TEMP_RSLT 0x04B7
343 #define ADE9430_REG_PGA_GAIN 0x04B9
344 #define ADE9430_REG_CHNL_DIS 0x04BA
345 #define ADE9430_REG_WR_LOCK 0x04BF
346 #define ADE9430_REG_VAR_DIS 0x04E0
347 #define ADE9430_REG_RESERVED1 0x04F0
348 #define ADE9430_REG_VERSION 0x04FE
349 #define ADE9430_REG_AI_SINC_DAT 0x0500
350 #define ADE9430_REG_AV_SINC_DAT 0x0501
351 #define ADE9430_REG_BI_SINC_DAT 0x0502
352 #define ADE9430_REG_BV_SINC_DAT 0x0503
353 #define ADE9430_REG_CI_SINC_DAT 0x0504
354 #define ADE9430_REG_CV_SINC_DAT 0x0505
355 #define ADE9430_REG_NI_SINC_DAT 0x0506
356 #define ADE9430_REG_AI_LPF_DAT 0x0510
357 #define ADE9430_REG_AV_LPF_DAT 0x0511
358 #define ADE9430_REG_BI_LPF_DAT 0x0512
359 #define ADE9430_REG_BV_LPF_DAT 0x0513
360 #define ADE9430_REG_CI_LPF_DAT 0x0514
361 #define ADE9430_REG_CV_LPF_DAT 0x0515
362 #define ADE9430_REG_NI_LPF_DAT 0x0516
363 #define ADE9430_REG_AV_PCF_1 0x0600
364 #define ADE9430_REG_BV_PCF_1 0x0601
365 #define ADE9430_REG_CV_PCF_1 0x0602
366 #define ADE9430_REG_NI_PCF_1 0x0603
367 #define ADE9430_REG_AI_PCF_1 0x0604
368 #define ADE9430_REG_BI_PCF_1 0x0605
369 #define ADE9430_REG_CI_PCF_1 0x0606
370 #define ADE9430_REG_AIRMS_1 0x0607
371 #define ADE9430_REG_BIRMS_1 0x0608
372 #define ADE9430_REG_CIRMS_1 0x0609
373 #define ADE9430_REG_AVRMS_1 0x060A
374 #define ADE9430_REG_BVRMS_1 0x060B
375 #define ADE9430_REG_CVRMS_1 0x060C
376 #define ADE9430_REG_NIRMS_1 0x060D
377 #define ADE9430_REG_AWATT_1 0x060E
378 #define ADE9430_REG_BWATT_1 0x060F
379 #define ADE9430_REG_CWATT_1 0x0610
380 #define ADE9430_REG_AVA_1 0x0611
381 #define ADE9430_REG_BVA_1 0x0612
382 #define ADE9430_REG_CVA_1 0x0613
383 #define ADE9430_REG_AVAR_1 0x0614
384 #define ADE9430_REG_BVAR_1 0x0615
385 #define ADE9430_REG_CVAR_1 0x0616
386 #define ADE9430_REG_AFVAR_1 0x0617
387 #define ADE9430_REG_BFVAR_1 0x0618
388 #define ADE9430_REG_CFVAR_1 0x0619
389 #define ADE9430_REG_APF_1 0x061A
390 #define ADE9430_REG_BPF_1 0x061B
391 #define ADE9430_REG_CPF_1 0x061C
392 #define ADE9430_REG_AFWATT_1 0x0623
393 #define ADE9430_REG_BFWATT_1 0x0624
394 #define ADE9430_REG_CFWATT_1 0x0625
395 #define ADE9430_REG_AFVA_1 0x0626
396 #define ADE9430_REG_BFVA_1 0x0627
397 #define ADE9430_REG_CFVA_1 0x0628
398 #define ADE9430_REG_AFIRMS_1 0x0629
399 #define ADE9430_REG_BFIRMS_1 0x062A
400 #define ADE9430_REG_CFIRMS_1 0x062B
401 #define ADE9430_REG_AFVRMS_1 0x062C
402 #define ADE9430_REG_BFVRMS_1 0x062D
403 #define ADE9430_REG_CFVRMS_1 0x062E
404 #define ADE9430_REG_AIRMSONE_1 0x062F
405 #define ADE9430_REG_BIRMSONE_1 0x0630
406 #define ADE9430_REG_CIRMSONE_1 0x0631
407 #define ADE9430_REG_AVRMSONE_1 0x0622
408 #define ADE9430_REG_BVRMSONE_1 0x0633
409 #define ADE9430_REG_CVRMSONE_1 0x0634
410 #define ADE9430_REG_NIRSONE_1 0x0635
411 #define ADE9430_REG_AIRMS1012_1 0x0636
412 #define ADE9430_REG_BIRMS1012_1 0x0637
413 #define ADE9430_REG_CIRMS1012_1 0x0638
414 #define ADE9430_REG_AVRMS1012_1 0x0639
415 #define ADE9430_REG_BVRMS1012_1 0x063A
416 #define ADE9430_REG_CVRMS1012_1 0x063B
417 #define ADE9430_REG_NIRMS1012_1 0x063C
418 #define ADE9430_REG_AV_PCF_2 0x0680
419 #define ADE9430_REG_AI_PCF_2 0x0681
420 #define ADE9430_REG_AIRMS_2 0x0682
421 #define ADE9430_REG_AVRMS_2 0x0683
422 #define ADE9430_REG_AWATT_2 0x0684
423 #define ADE9430_REG_AVA_2 0x0685
424 #define ADE9430_REG_AVAR_2 0x0686
425 #define ADE9430_REG_AFVAR_2 0x0687
426 #define ADE9430_REG_APF_2 0x0688
427 #define ADE9430_REG_AFWATT_2 0x068B
428 #define ADE9430_REG_AFVA_2 0x068C
429 #define ADE9430_REG_AFIRMS_2 0x068D
430 #define ADE9430_REG_AFVRMS_2 0x068E
431 #define ADE9430_REG_AIRMSONE_2 0x068F
432 #define ADE9430_REG_AVRMSONE_2 0x0690
433 #define ADE9430_REG_AIRMS1012_2 0x0691
434 #define ADE9430_REG_AVRMS1012_2 0x0692
435 #define ADE9430_REG_BV_PCF_2 0x0693
436 #define ADE9430_REG_BI_PCF_2 0x0694
437 #define ADE9430_REG_BIRMS_2 0x0695
438 #define ADE9430_REG_BVRMS_2 0x0696
439 #define ADE9430_REG_BWATT_2 0x0697
440 #define ADE9430_REG_BVA_2 0x0698
441 #define ADE9430_REG_BVAR_2 0x0699
442 #define ADE9430_REG_BFVAR_2 0x069A
443 #define ADE9430_REG_BPF_2 0x069B
444 #define ADE9430_REG_BFWATT_2 0x069E
445 #define ADE9430_REG_BFVA_2 0x069F
446 #define ADE9430_REG_BFIRMS_2 0x06A0
447 #define ADE9430_REG_BFVRMS_2 0x06A1
448 #define ADE9430_REG_BIRMSONE_2 0x06A2
449 #define ADE9430_REG_BVRMSONE_2 0x06A3
450 #define ADE9430_REG_BIRMS1012_2 0x06A4
451 #define ADE9430_REG_BVRMS1012_2 0x06A5
452 #define ADE9430_REG_CV_PCF_2 0x06A6
453 #define ADE9430_REG_CI_PCF_2 0x06A7
454 #define ADE9430_REG_CIRMS_2 0x06A8
455 #define ADE9430_REG_CVRMS_2 0x06A9
456 #define ADE9430_REG_CWATT_2 0x06AA
457 #define ADE9430_REG_CVA_2 0x06AB
458 #define ADE9430_REG_CVAR_2 0x06AC
459 #define ADE9430_REG_CFVAR_2 0x06AD
460 #define ADE9430_REG_CPF_2 0x06AE
461 #define ADE9430_REG_CFWATT_2 0x06B1
462 #define ADE9430_REG_CFVA_2 0x06B2
463 #define ADE9430_REG_CFIRMS_2 0x06B3
464 #define ADE9430_REG_CFVRMS_2 0x06B4
465 #define ADE9430_REG_CIRMSONE_2 0x06B5
466 #define ADE9430_REG_CVRMSONE_2 0x06B6
467 #define ADE9430_REG_CIRMS1012_2 0x06B7
468 #define ADE9430_REG_CVRMS1012_2 0x06B8
469 #define ADE9430_REG_NI_PCF_2 0x06B9
470 #define ADE9430_REG_NIRMS_2 0x06BA
471 #define ADE9430_REG_NIRMSONE_2 0x06BB
472 #define ADE9430_REG_NIRMS1012_2 0x06BC
473 
474 /* ADE9430_REG_CONFIG0 Bit Definition */
475 #define ADE9430_PERIOD_AVG_CFG NO_OS_GENMASK(17, 16)
476 #define ADE9430_RESAMPLE_RATE NO_OS_BIT(15)
477 #define ADE9430_RMSONE_RATE NO_OS_BIT(14)
478 #define ADE9430_DISRPLPF NO_OS_BIT(13)
479 #define ADE9430_DISAPLPF NO_OS_BIT(12)
480 #define ADE9430_ININTEN NO_OS_BIT(11)
481 #define ADE9430_VNOMC_EN NO_OS_BIT(10)
482 #define ADE9430_VNOMB_EN NO_OS_BIT(9)
483 #define ADE9430_VNOMA_EN NO_OS_BIT(8)
484 #define ADE9430_RMS_SRC_SEL NO_OS_BIT(7)
485 #define ADE9430_ZX_SRC_SEL NO_OS_BIT(6)
486 #define ADE9430_INTEN NO_OS_BIT(5)
487 #define ADE9430_MTEN NO_OS_BIT(4)
488 #define ADE9430_HPFDIS NO_OS_BIT(3)
489 #define ADE9430_ISUM_CFG NO_OS_GENMASK(1, 0)
490 
491 /* ADE9430_REG_AMTREGION Bit Definition */
492 #define ADE9430_AREGION NO_OS_GENMASK(3, 0)
493 
494 /* ADE9430_REG_BMTREGION Bit Definition */
495 #define ADE9430_BREGION NO_OS_GENMASK(3, 0)
496 
497 /* ADE9430_REG_CMTREGION Bit Definition */
498 #define ADE9430_CREGION NO_OS_GENMASK(3, 0)
499 
500 /* ADE9430_REG_IPEAK Bit Definition */
501 #define ADE9430_IPPHASE NO_OS_GENMASK(26, 24)
502 #define ADE9430_IPEAKVAL NO_OS_GENMASK(23, 0)
503 
504 /* ADE9430_REG_VPEAK Bit Definition */
505 #define ADE9430_VPPHASE NO_OS_GENMASK(26, 24)
506 #define ADE9430_VPEAKVAL NO_OS_GENMASK(23, 0)
507 
508 /* ADE9430_REG_STATUS0 Bit Definition */
509 #define ADE9430_STATUS0_TEMP_RDY NO_OS_BIT(25)
510 #define ADE9430_STATUS0_MISMTCH NO_OS_BIT(24)
511 #define ADE9430_STATUS0_COH_PAGE_RDY NO_OS_BIT(23)
512 #define ADE9430_STATUS0_WFB_TRIG NO_OS_BIT(22)
513 #define ADE9430_STATUS0_PF_RDY NO_OS_BIT(21)
514 #define ADE9430_STATUS0_RMS1012RDY NO_OS_BIT(20)
515 #define ADE9430_STATUS0_RMSONERDY NO_OS_BIT(19)
516 #define ADE9430_STATUS0_PWRRDY NO_OS_BIT(18)
517 #define ADE9430_STATUS0_PAGE_FULL NO_OS_BIT(17)
518 #define ADE9430_STATUS0_WFB_TRIG_IRQ NO_OS_BIT(16)
519 #define ADE9430_STATUS0_DREADY NO_OS_BIT(15)
520 #define ADE9430_STATUS0_CF4 NO_OS_BIT(14)
521 #define ADE9430_STATUS0_CF3 NO_OS_BIT(13)
522 #define ADE9430_STATUS0_CF2 NO_OS_BIT(12)
523 #define ADE9430_STATUS0_CF1 NO_OS_BIT(11)
524 #define ADE9430_STATUS0_REVPSUM4 NO_OS_BIT(10)
525 #define ADE9430_STATUS0_REVPSUM3 NO_OS_BIT(9)
526 #define ADE9430_STATUS0_REVPSUM2 NO_OS_BIT(8)
527 #define ADE9430_STATUS0_REVPSUM1 NO_OS_BIT(7)
528 #define ADE9430_STATUS0_REVRPC NO_OS_BIT(6)
529 #define ADE9430_STATUS0_REVRPB NO_OS_BIT(5)
530 #define ADE9430_STATUS0_REVRPA NO_OS_BIT(4)
531 #define ADE9430_STATUS0_REVAPC NO_OS_BIT(3)
532 #define ADE9430_STATUS0_REVAPB NO_OS_BIT(2)
533 #define ADE9430_STATUS0_REVAPA NO_OS_BIT(1)
534 #define ADE9430_STATUS0_EGYRDY NO_OS_BIT(0)
535 
536 /* ADE9430_REG_STATUS1 Bit Definition */
537 #define ADE9430_STATUS1_ERROR3 NO_OS_BIT(31)
538 #define ADE9430_STATUS1_RROR2 NO_OS_BIT(30)
539 #define ADE9430_STATUS1_ERROR1 NO_OS_BIT(29)
540 #define ADE9430_STATUS1_ERROR0 NO_OS_BIT(28)
541 #define ADE9430_STATUS1_CRC_DONE NO_OS_BIT(27)
542 #define ADE9430_STATUS1_CRC_CHG NO_OS_BIT(26)
543 #define ADE9430_STATUS1_SEQERR NO_OS_BIT(18)
544 #define ADE9430_STATUS1_OI NO_OS_BIT(17)
545 #define ADE9430_STATUS1_RSTDONE NO_OS_BIT(16)
546 #define ADE9430_STATUS1_ZXIC NO_OS_BIT(15)
547 #define ADE9430_STATUS1_ZXIB NO_OS_BIT(14)
548 #define ADE9430_STATUS1_ZXIA NO_OS_BIT(13)
549 #define ADE9430_STATUS1_ZXCOMB NO_OS_BIT(12)
550 #define ADE9430_STATUS1_ZXVC NO_OS_BIT(11)
551 #define ADE9430_STATUS1_ZXVB NO_OS_BIT(10)
552 #define ADE9430_STATUS1_ZXVA NO_OS_BIT(9)
553 #define ADE9430_STATUS1_ZXTOVC NO_OS_BIT(8)
554 #define ADE9430_STATUS1_ZXTOVB NO_OS_BIT(7)
555 #define ADE9430_STATUS1_ZXTOVA NO_OS_BIT(6)
556 #define ADE9430_STATUS1_VAFNOLOAD NO_OS_BIT(5)
557 #define ADE9430_STATUS1_RFNOLOAD NO_OS_BIT(4)
558 #define ADE9430_STATUS1_AFNOLOAD NO_OS_BIT(3)
559 #define ADE9430_STATUS1_VANLOAD NO_OS_BIT(2)
560 #define ADE9430_STATUS1_RNLOAD NO_OS_BIT(1)
561 #define ADE9430_STATUS1_ANLOAD NO_OS_BIT(0)
562 
563 /* ADE9430_REG_EVENT_STATUS Bit Definition */
564 #define ADE9430_EVENT_DREADY NO_OS_BIT(16)
565 #define ADE9430_EVENT_VAFNOLOAD NO_OS_BIT(15)
566 #define ADE9430_EVENT_RFNOLOAD NO_OS_BIT(14)
567 #define ADE9430_EVENT_AFNOLOAD NO_OS_BIT(13)
568 #define ADE9430_EVENT_VANLOAD NO_OS_BIT(12)
569 #define ADE9430_EVENT_RNLOAD NO_OS_BIT(11)
570 #define ADE9430_EVENT_ANLOAD NO_OS_BIT(10)
571 #define ADE9430_EVENT_REVPSUM4 NO_OS_BIT(9)
572 #define ADE9430_EVENT_REVPSUM3 NO_OS_BIT(8)
573 #define ADE9430_EVENT_REVPSUM2 NO_OS_BIT(7)
574 #define ADE9430_EVENT_REVPSUM1 NO_OS_BIT(6)
575 
576 /* ADE9430_REG_MASK0 Bit Definition */
577 #define ADE9430_MASK0_TEMP_RDY NO_OS_BIT(25)
578 #define ADE9430_MASK0_ISMTCH NO_OS_BIT(24)
579 #define ADE9430_MASK0_COH_PAGE_RDY NO_OS_BIT(23)
580 #define ADE9430_MASK0_WFB_TRIG NO_OS_BIT(22)
581 #define ADE9430_MASK0_PF_RDY NO_OS_BIT(21)
582 #define ADE9430_MASK0_RMS1012RDY NO_OS_BIT(20)
583 #define ADE9430_MASK0_RMSONERDY NO_OS_BIT(19)
584 #define ADE9430_MASK0_PWRRDY NO_OS_BIT(18)
585 #define ADE9430_MASK0_PAGE_FULL NO_OS_BIT(17)
586 #define ADE9430_MASK0_WFB_TRIG_IRQ NO_OS_BIT(16)
587 #define ADE9430_MASK0_DREADY NO_OS_BIT(15)
588 #define ADE9430_MASK0_CF4 NO_OS_BIT(14)
589 #define ADE9430_MASK0_CF3 NO_OS_BIT(13)
590 #define ADE9430_MASK0_CF2 NO_OS_BIT(12)
591 #define ADE9430_MASK0_CF1 NO_OS_BIT(11)
592 #define ADE9430_MASK0_REVPSUM4 NO_OS_BIT(10)
593 #define ADE9430_MASK0_REVPSUM3 NO_OS_BIT(9)
594 #define ADE9430_MASK0_REVPSUM2 NO_OS_BIT(8)
595 #define ADE9430_MASK0_REVPSUM1 NO_OS_BIT(7)
596 #define ADE9430_MASK0_REVRPC NO_OS_BIT(6)
597 #define ADE9430_MASK0_REVRPB NO_OS_BIT(5)
598 #define ADE9430_MASK0_REVRPA NO_OS_BIT(4)
599 #define ADE9430_MASK0_REVAPC NO_OS_BIT(3)
600 #define ADE9430_MASK0_REVAPB NO_OS_BIT(2)
601 #define ADE9430_MASK0_REVAPA NO_OS_BIT(1)
602 #define ADE9430_MASK0_EGYRDY NO_OS_BIT(0)
603 
604 /* ADE9430_REG_MASK1 Bit Definition */
605 #define ADE9430_MASK1_ERROR3 NO_OS_BIT(31)
606 #define ADE9430_MASK1_ERROR2 NO_OS_BIT(30)
607 #define ADE9430_MASK1_ERROR1 NO_OS_BIT(29)
608 #define ADE9430_MASK1_ERROR0 NO_OS_BIT(28)
609 #define ADE9430_MASK1_CRC_DONE NO_OS_BIT(27)
610 #define ADE9430_MASK1_CRC_CHG NO_OS_BIT(26)
611 #define ADE9430_MASK1_SEQERR NO_OS_BIT(18)
612 #define ADE9430_MASK1_OI NO_OS_BIT(17)
613 #define ADE9430_MASK1_ZXIC NO_OS_BIT(15)
614 #define ADE9430_MASK1_ZXIB NO_OS_BIT(14)
615 #define ADE9430_MASK1_ZXIA NO_OS_BIT(13)
616 #define ADE9430_MASK1_ZXCOMB NO_OS_BIT(12)
617 #define ADE9430_MASK1_ZXVC NO_OS_BIT(11)
618 #define ADE9430_MASK1_ZXVB NO_OS_BIT(10)
619 #define ADE9430_MASK1_ZXVA NO_OS_BIT(9)
620 #define ADE9430_MASK1_ZXTOVC NO_OS_BIT(8)
621 #define ADE9430_MASK1_ZXTOVB NO_OS_BIT(7)
622 #define ADE9430_MASK1_ZXTOVA NO_OS_BIT(6)
623 #define ADE9430_MASK1_VAFNOLOAD NO_OS_BIT(5)
624 #define ADE9430_MASK1_RFNOLOAD NO_OS_BIT(4)
625 #define ADE9430_MASK1_AFNOLOAD NO_OS_BIT(3)
626 #define ADE9430_MASK1_VANLOAD NO_OS_BIT(2)
627 #define ADE9430_MASK1_RNLOAD NO_OS_BIT(1)
628 #define ADE9430_MASK1_ANLOAD NO_OS_BIT(0)
629 
630 /* ADE9430_REG_EVENT_MASK Bit Definition */
631 #define ADE9430_EVENT_READY_MSK NO_OS_BIT(16)
632 #define ADE9430_EVENT_VAFNOLOAD_MSK NO_OS_BIT(15)
633 #define ADE9430_EVENT_RFNOLOAD_MSK NO_OS_BIT(14)
634 #define ADE9430_EVENT_AFNOLOAD_MSK NO_OS_BIT(13)
635 #define ADE9430_EVENT_VANLOAD_MSK NO_OS_BIT(12)
636 #define ADE9430_EVENT_RNLOAD_MSK NO_OS_BIT(11)
637 #define ADE9430_EVENT_ANLOAD_MSK NO_OS_BIT(10)
638 #define ADE9430_EVENT_REVPSUM4_MSK NO_OS_BIT(9)
639 #define ADE9430_EVENT_REVPSUM3_MSK NO_OS_BIT(8)
640 #define ADE9430_EVENT_REVPSUM2_MSK NO_OS_BIT(7)
641 #define ADE9430_EVENT_REVPSUM1_MSK NO_OS_BIT(6)
642 
643 /* ADE9430_REG_OILVL Bit Definition */
644 #define ADE9430_OILVL_VAL NO_OS_GENMASK(23, 0)
645 
646 /* ADE9430_REG_OIA Bit Definition */
647 #define ADE9430_OI_VAL NO_OS_GENMASK(23, 0)
648 
649 /* ADE9430_REG_OIB Bit Definition */
650 #define ADE9430_OIB_VAL NO_OS_GENMASK(23, 0)
651 
652 /* ADE9430_REG_OIC Bit Definition */
653 #define ADE9430_OIC_VAL NO_OS_GENMASK(23, 0)
654 
655 /* ADE9430_REG_OIN Bit Definition */
656 #define ADE9430_OIN_VAL NO_OS_GENMASK(23, 0)
657 
658 /* ADE9430_REG_VLEVEL Bit Definition */
659 #define ADE9430_VLEVEL_VAL NO_OS_GENMASK(23, 0)
660 
661 /* ADE9430_REG_PHNOLOAD Bit Definition */
662 #define ADE9430_CFVANL NO_OS_BIT(17)
663 #define ADE9430_CFVARNL NO_OS_BIT(16)
664 #define ADE9430_CFWATTNL NO_OS_BIT(15)
665 #define ADE9430_CVANL NO_OS_BIT(14)
666 #define ADE9430_CVARNL NO_OS_BIT(13)
667 #define ADE9430_CWATTNL NO_OS_BIT(12)
668 #define ADE9430_BFVANL NO_OS_BIT(11)
669 #define ADE9430_BFVARNL NO_OS_BIT(10)
670 #define ADE9430_BFWATTNL NO_OS_BIT(9)
671 #define ADE9430_BVANL NO_OS_BIT(8)
672 #define ADE9430_BVARNL NO_OS_BIT(7)
673 #define ADE9430_BWATTNL NO_OS_BIT(6)
674 #define ADE9430_AFVANL NO_OS_BIT(5)
675 #define ADE9430_AFVARNL NO_OS_BIT(4)
676 #define ADE9430_AFWATTNL NO_OS_BIT(3)
677 #define ADE9430_AVANL NO_OS_BIT(2)
678 #define ADE9430_AVARNL NO_OS_BIT(1)
679 #define ADE9430_AWATTNL NO_OS_BIT(0)
680 
681 /* ADE9430_REG_ADC_REDIRECT Bit Definition */
682 #define ADE9430_VC_DIN NO_OS_GENMASK(20, 18)
683 #define ADE9430_VB_DIN NO_OS_GENMASK(17, 15)
684 #define ADE9430_VA_DIN NO_OS_GENMASK(14, 12)
685 #define ADE9430_IN_DIN NO_OS_GENMASK(11, 9)
686 #define ADE9430_IC_DIN NO_OS_GENMASK(8, 6)
687 #define ADE9430_IB_DIN NO_OS_GENMASK(5, 3)
688 #define ADE9430_IA_DIN NO_OS_GENMASK(2, 0)
689 
690 /* ADE9430_REG_CF_LCFG Bit Definition */
691 #define ADE9430_CF4_LT NO_OS_BIT(22)
692 #define ADE9430_CF3_LT NO_OS_BIT(21)
693 #define ADE9430_CF2_LT NO_OS_BIT(20)
694 #define ADE9430_CF1_LT NO_OS_BIT(19)
695 #define ADE9430_CF_LTMR NO_OS_GENMASK(18, 0)
696 
697 /* ADE9430_REG_PART_ID Bit Definition */
698 #define ADE9430_ADE9430_ID NO_OS_BIT(20)
699 
700 /* ADE9430_REG_TEMP_TRIM Bit Definition */
701 #define ADE9430_TEMP_OFFSET NO_OS_GENMASK(31, 16)
702 #define ADE9430_TEMP_GAIN NO_OS_GENMASK(15, 0)
703 
704 /* ADE9430_REG_CONFIG1 Bit Definition */
705 #define ADE9430_EXT_REF NO_OS_BIT(15)
706 #define ADE9430_IRQ0_ON_IRQ1 NO_OS_BIT(12)
707 #define ADE9430_BURST_EN NO_OS_BIT(11)
708 #define ADE9430_PWR_SETTLE NO_OS_GENMASK(9, 8)
709 #define ADE9430_CF_ACC_CLR NO_OS_BIT(5)
710 #define ADE9430_CF4_CFG NO_OS_GENMASK(3, 2)
711 #define ADE9430_CF3_CFG NO_OS_BIT(1)
712 #define ADE9430_SWRST NO_OS_BIT(0)
713 
714 /* ADE9430_REG_OISTATUS Bit Definition */
715 #define ADE9430_OIPHASE NO_OS_GENMASK(3, 0)
716 
717 /* ADE9430_REG_CFMODE Bit Definition */
718 #define ADE9430_CF4DIS NO_OS_BIT(15)
719 #define ADE9430_CF3DIS NO_OS_BIT(14)
720 #define ADE9430_CF2DIS NO_OS_BIT(13)
721 #define ADE9430_CF1DIS NO_OS_BIT(12)
722 #define ADE9430_CF4SEL NO_OS_GENMASK(11, 9)
723 #define ADE9430_CF3SEL NO_OS_GENMASK(8, 6)
724 #define ADE9430_CF2SEL NO_OS_GENMASK(5, 3)
725 #define ADE9430_CF1SEL NO_OS_GENMASK(2, 0)
726 
727 /* ADE9430_REG_COMPMODE Bit Definition */
728 #define ADE9430_TERMSEL4 NO_OS_GENMASK(11, 9)
729 #define ADE9430_TERMSEL3 NO_OS_GENMASK(8, 6)
730 #define ADE9430_TERMSEL2 NO_OS_GENMASK(5, 3)
731 #define ADE9430_TERMSEL1 NO_OS_GENMASK(2, 0)
732 
733 /* ADE9430_REG_ACCMODE Bit Definition */
734 #define ADE9430_SELFREQ NO_OS_BIT(8)
735 #define ADE9430_ICONSEL NO_OS_BIT(7)
736 #define ADE9430_VCONSEL NO_OS_GENMASK(6, 4)
737 #define ADE9430_VARACC NO_OS_GENMASK(3, 2)
738 #define ADE9430_WATTACC NO_OS_GENMASK(3, 2)
739 
740 /* ADE9430_REG_CONFIG3 Bit Definition */
741 #define ADE9430_OC_EN NO_OS_GENMASK(15, 12)
742 #define ADE9430_PEAKSEL NO_OS_GENMASK(4, 2)
743 
744 /* ADE9430_REG_ZX_LP_SEL Bit Definition */
745 #define ADE9430_LP_SEL NO_OS_GENMASK(4, 3)
746 #define ADE9430_ZX_SEL NO_OS_GENMASK(2, 1)
747 
748 /* ADE9430_REG_PHSIGN Bit Definition */
749 #define ADE9430_SUM4SIGN NO_OS_BIT(9)
750 #define ADE9430_SUM3SIGN NO_OS_BIT(8)
751 #define ADE9430_SUM2SIGN NO_OS_BIT(7)
752 #define ADE9430_SUM1SIGN NO_OS_BIT(6)
753 #define ADE9430_CVARSIGN NO_OS_BIT(5)
754 #define ADE9430_CWSIGN NO_OS_BIT(4)
755 #define ADE9430_BVARSIGN NO_OS_BIT(3)
756 #define ADE9430_BWSIGN NO_OS_BIT(2)
757 #define ADE9430_AVARSIGN NO_OS_BIT(1)
758 #define ADE9430_AWSIGN NO_OS_BIT(0)
759 
760 /* ADE9430_REG_WFB_CFG Bit Definition */
761 #define ADE9430_WF_IN_EN NO_OS_BIT(12)
762 #define ADE9430_WF_SRC NO_OS_GENMASK(9, 8)
763 #define ADE9430_WF_MODE NO_OS_BIT(7, 6)
764 #define ADE9430_WF_CAP_SEL NO_OS_BIT(5)
765 #define ADE9430_WF_CAP_EN NO_OS_BIT(4)
766 #define ADE9430_BURST_CHAN NO_OS_GENMASK(3, 0)
767 
768 /* ADE9430_WFB_TRG_CFG Bit Definition */
769 #define ADE9430_TRIG_FORCE NO_OS_BIT(10)
770 #define ADE9430_ZXCOMB NO_OS_BIT(9)
771 #define ADE9430_ZXVC NO_OS_BIT(8)
772 #define ADE9430_ZXVB NO_OS_BIT(7)
773 #define ADE9430_ZXVA NO_OS_BIT(6)
774 #define ADE9430_ZXIC NO_OS_BIT(5)
775 #define ADE9430_ZXIB NO_OS_BIT(4)
776 #define ADE9430_ZXIA NO_OS_BIT(3)
777 #define ADE9430_OI NO_OS_BIT(2)
778 
779 /* ADE9430_WFB_TRG_STAT Bit Definition */
780 #define ADE9430_WFB_LAST_PAGE NO_OS_GENMASK(15, 12)
781 #define ADE9430_WFB_TRIG_ADDR NO_OS_GENMASK(10, 0)
782 
783 /* ADE9430_CONFIG2 Bit Definition */
784 #define ADE9430_UPERIOD_SEL NO_OS_BIT(12)
785 #define ADE9430_HPF_CRN NO_OS_GENMASK(12, 9)
786 
787 /* ADE9430_EP_CFG Bit Definition */
788 #define ADE9430_NOLOAD_TMR NO_OS_GENMASK(15, 13)
789 #define ADE9430_PWR_SIGN_SEL_1 NO_OS_BIT(7)
790 #define ADE9430_PWR_SIGN_SEL_0 NO_OS_BIT(6)
791 #define ADE9430_RD_RST_EN NO_OS_BIT(5)
792 #define ADE9430_EGY_LD_ACCUM NO_OS_BIT(4)
793 #define ADE9430_EGY_TMR_MODE NO_OS_BIT(1)
794 #define ADE9430_EGY_PWR_EN NO_OS_BIT(0)
795 
796 /* ADE9430_CRC_FORCE Bit Definition */
797 #define ADE9430_FORCE_CRC_UPDATE NO_OS_BIT(0)
798 
799 /* ADE9430_CRC_OPTEN Bit Definition */
800 #define ADE9430_CRC_WFB_TRG_CFG_EN NO_OS_BIT(15)
801 #define ADE9430_CRC_WFB_PG_IRQEN NO_OS_BIT(15)
802 #define ADE9430_CRC_WFB_CFG_EN NO_OS_BIT(15)
803 #define ADE9430_CRC_SEQ_CYC_EN NO_OS_BIT(15)
804 #define ADE9430_CRC_ZXLPSEL_EN NO_OS_BIT(15)
805 #define ADE9430_CRC_ZXTOUT_EN NO_OS_BIT(15)
806 #define ADE9430_CRC_APP_NL_LVL_EN NO_OS_BIT(15)
807 #define ADE9430_CRC_REACT_NL_LVL_EN NO_OS_BIT(15)
808 #define ADE9430_CRC_ACT_NL_LVL_EN NO_OS_BIT(15)
809 #define ADE9430_CRC_EVENT_MASK_EN NO_OS_BIT(15)
810 #define ADE9430_CRC_MASK1_EN NO_OS_BIT(15)
811 #define ADE9430_CRC_MASK0_EN NO_OS_BIT(15)
812 
813 /* ADE9430_TEMP_CFG Bit Definition */
814 #define ADE9430_TEMP_START NO_OS_BIT(3)
815 #define ADE9430_TEMP_EN NO_OS_BIT(2)
816 #define ADE9430_TEMP_TIME NO_OS_GENMASK(1, 0)
817 
818 /* ADE9430_TEMP_RSLT Bit Definition */
819 #define ADE9430_TEMP_RESULT NO_OS_GENMASK(11, 0)
820 
821 /* ADE9430_PGA_GAIN Bit Definition */
822 #define ADE9430_VC_GAIN NO_OS_GENMASK(13, 12)
823 #define ADE9430_VB_GAIN NO_OS_GENMASK(11, 10)
824 #define ADE9430_VA_GAIN NO_OS_GENMASK(9, 8)
825 #define ADE9430_IN_GAIN NO_OS_GENMASK(7, 6)
826 #define ADE9430_IC_GAIN NO_OS_GENMASK(5, 4)
827 #define ADE9430_IB_GAIN NO_OS_GENMASK(3, 2)
828 #define ADE9430_IA_GAIN NO_OS_GENMASK(1, 0)
829 
830 /* ADE9430_CHNL_DIS Bit Definition */
831 #define ADE9430_VC_DISADC NO_OS_BIT(6)
832 #define ADE9430_VB_DISADC NO_OS_BIT(5)
833 #define ADE9430_VA_DISADC NO_OS_BIT(4)
834 #define ADE9430_IN_DISADC NO_OS_BIT(3)
835 #define ADE9430_IC_DISADC NO_OS_BIT(2)
836 #define ADE9430_IB_DISADC NO_OS_BIT(1)
837 #define ADE9430_IA_DISADC NO_OS_BIT(0)
838 
839 /* ADE9430_VAR_DIS Bit Definition */
840 #define ADE9430_VARDIS NO_OS_BIT(0)
841 
842 /* Miscellaneous Definitions */
843 #define ADE9430_CHIP_ID 0x63
844 #define ADE9430_I_RES_NA 4018ULL
845 #define ADE9430_V_RES_NV 13357ULL
846 #define ADE9430_W_RES_UW 7203ULL
847 
848 /******************************************************************************/
849 /*************************** Types Declarations *******************************/
850 /******************************************************************************/
851 
860 };
861 
870 };
871 
880  bool temp_en;
881 };
882 
887 struct ade9430_dev {
891  uint32_t watt_val;
893  uint32_t irms_val;
895  uint32_t vrms_val;
897  int32_t temp_deg;
898 };
899 
900 /******************************************************************************/
901 /************************ Functions Declarations ******************************/
902 /******************************************************************************/
903 
904 /* Read device register. */
905 int ade9430_read(struct ade9430_dev *dev, uint16_t reg_addr,
906  uint32_t *reg_data);
907 
908 /* Write device register. */
909 int ade9430_write(struct ade9430_dev *dev, uint16_t reg_addr,
910  uint32_t reg_data);
911 
912 /* Update specific register bits. */
913 int ade9430_update_bits(struct ade9430_dev *dev, uint16_t reg_addr,
914  uint32_t mask, uint32_t reg_data);
915 
916 /* Read temperature */
917 int ade9430_read_temp(struct ade9430_dev *dev);
918 
919 /* Read Energy/Power for specific phase */
920 int ade9430_read_data_ph(struct ade9430_dev *dev, enum ade9430_phase phase);
921 
922 /* Set User Energy use model */
923 int ade9430_set_egy_model(struct ade9430_dev *dev, enum ade9430_egy_model model,
924  uint16_t value);
925 
926 /* Initialize the device. */
927 int ade9430_init(struct ade9430_dev **device,
929 
930 /* Remove the device and release resources. */
931 int ade9430_remove(struct ade9430_dev *dev);
932 
933 #endif // __ADE9430_H__
ADE9430_PHASE_B
@ ADE9430_PHASE_B
Definition: ade9430.h:858
ADE9430_REG_TEMP_RSLT
#define ADE9430_REG_TEMP_RSLT
Definition: ade9430.h:342
ADE9430_REG_EGY_TIME
#define ADE9430_REG_EGY_TIME
Definition: ade9430.h:338
no_os_put_unaligned_be16
void no_os_put_unaligned_be16(uint16_t val, uint8_t *buf)
ADE9430_REG_EP_CFG
#define ADE9430_REG_EP_CFG
Definition: ade9430.h:336
ade9430_dev::irms_val
uint32_t irms_val
Definition: ade9430.h:893
no_os_alloc.h
ade9430.h
Header file of ADE9430 Driver.
ade9430_dev
ADE9430 Device structure.
Definition: ade9430.h:887
ADE9430_EGY_HALF_LINE_CYCLES
@ ADE9430_EGY_HALF_LINE_CYCLES
Definition: ade9430.h:868
ade9430_read_data_ph
int ade9430_read_data_ph(struct ade9430_dev *dev, enum ade9430_phase phase)
Read the power/energy for specific phase.
Definition: ade9430.c:170
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:159
no_os_spi.h
Header file of SPI Interface.
MICROWATT_PER_WATT
#define MICROWATT_PER_WATT
Definition: no_os_units.h:69
ADE9430_EGY_LD_ACCUM
#define ADE9430_EGY_LD_ACCUM
Definition: ade9430.h:792
ADE9430_PHASE_C
@ ADE9430_PHASE_C
Definition: ade9430.h:859
ade9430_read_data_ph
int ade9430_read_data_ph(struct ade9430_dev *dev, enum ade9430_phase phase)
Read the power/energy for specific phase.
Definition: ade9430.c:170
no_os_units.h
Header file of Units.
ade9430_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: ade9430.h:889
ade9430_init
int ade9430_init(struct ade9430_dev **device, struct ade9430_init_param init_param)
Initialize the device.
Definition: ade9430.c:284
ade9430_init_param::temp_en
bool temp_en
Definition: ade9430.h:880
no_os_delay.h
Header file of Delay functions.
ade9430_write
int ade9430_write(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t reg_data)
Write device register.
Definition: ade9430.c:87
ADE9430_SWRST
#define ADE9430_SWRST
Definition: ade9430.h:712
device
Definition: ad9361_util.h:69
ADE9430_EGY_NR_SAMPLES
@ ADE9430_EGY_NR_SAMPLES
Definition: ade9430.h:869
no_os_calloc
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:54
ADE9430_REG_CONFIG1
#define ADE9430_REG_CONFIG1
Definition: ade9430.h:302
ade9430_init
int ade9430_init(struct ade9430_dev **device, struct ade9430_init_param init_param)
Initialize the device.
Definition: ade9430.c:284
ADE9430_TEMP_OFFSET
#define ADE9430_TEMP_OFFSET
Definition: ade9430.h:701
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:126
no_os_field_prep
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)
ADE9430_PHASE_A
@ ADE9430_PHASE_A
Definition: ade9430.h:857
ADE9430_REG_RUN
#define ADE9430_REG_RUN
Definition: ade9430.h:301
ADE9430_SPI_READ
#define ADE9430_SPI_READ
Definition: ade9430.h:50
no_os_put_unaligned_be32
void no_os_put_unaligned_be32(uint32_t val, uint8_t *buf)
ADE9430_REG_CIRMS
#define ADE9430_REG_CIRMS
Definition: ade9430.h:187
ade9430_remove
int ade9430_remove(struct ade9430_dev *dev)
Remove the device and release resources.
Definition: ade9430.c:343
ADE9430_REG_AIRMS
#define ADE9430_REG_AIRMS
Definition: ade9430.h:151
ade9430_update_bits
int ade9430_update_bits(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t mask, uint32_t reg_data)
Update specific register bits.
Definition: ade9430.c:111
ade9430_remove
int ade9430_remove(struct ade9430_dev *dev)
Remove the device and release resources.
Definition: ade9430.c:343
ade9430_read_temp
int ade9430_read_temp(struct ade9430_dev *dev)
Read the temperature.
Definition: ade9430.c:132
ADE9430_REG_BWATT
#define ADE9430_REG_BWATT
Definition: ade9430.h:173
NANOVOLT_PER_VOLT
#define NANOVOLT_PER_VOLT
Definition: no_os_units.h:60
ade9430_egy_model
ade9430_egy_model
ADE9430 available user energy use models.
Definition: ade9430.h:866
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:192
ADE9430_REG_AWATT
#define ADE9430_REG_AWATT
Definition: ade9430.h:155
ADE9430_REG_VERSION
#define ADE9430_REG_VERSION
Definition: ade9430.h:348
ade9430_read
int ade9430_read(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t *reg_data)
Read device register.
Definition: ade9430.c:55
ade9430_init_param
ADE9430 Device initialization parameters.
Definition: ade9430.h:876
ADE9430_RD_RST_EN
#define ADE9430_RD_RST_EN
Definition: ade9430.h:791
ADE9430_CHIP_ID
#define ADE9430_CHIP_ID
Definition: ade9430.h:843
ADE9430_TEMP_GAIN
#define ADE9430_TEMP_GAIN
Definition: ade9430.h:702
ade9430_read
int ade9430_read(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t *reg_data)
Read device register.
Definition: ade9430.c:55
ADE9430_I_RES_NA
#define ADE9430_I_RES_NA
Definition: ade9430.h:844
ADE9430_TEMP_START
#define ADE9430_TEMP_START
Definition: ade9430.h:814
ADE9430_EGY_WITH_RESET
@ ADE9430_EGY_WITH_RESET
Definition: ade9430.h:867
ADE9430_TEMP_RESULT
#define ADE9430_TEMP_RESULT
Definition: ade9430.h:819
ade9430_update_bits
int ade9430_update_bits(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t mask, uint32_t reg_data)
Update specific register bits.
Definition: ade9430.c:111
ADE9430_W_RES_UW
#define ADE9430_W_RES_UW
Definition: ade9430.h:846
ADE9430_TEMP_EN
#define ADE9430_TEMP_EN
Definition: ade9430.h:815
no_os_field_get
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
ade9430_init_param::spi_init
struct no_os_spi_init_param * spi_init
Definition: ade9430.h:878
no_os_free
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:69
ADE9430_REG_TEMP_CFG
#define ADE9430_REG_TEMP_CFG
Definition: ade9430.h:341
ADE9430_EGY_PWR_EN
#define ADE9430_EGY_PWR_EN
Definition: ade9430.h:794
ade9430_read_temp
int ade9430_read_temp(struct ade9430_dev *dev)
Read the temperature.
Definition: ade9430.c:132
no_os_get_unaligned_be32
uint32_t no_os_get_unaligned_be32(uint8_t *buf)
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:113
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:116
ADE9430_REG_CWATT
#define ADE9430_REG_CWATT
Definition: ade9430.h:191
ade9430_set_egy_model
int ade9430_set_egy_model(struct ade9430_dev *dev, enum ade9430_egy_model model, uint16_t value)
Set User Energy use model.
Definition: ade9430.c:226
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:52
no_os_get_unaligned_be16
uint16_t no_os_get_unaligned_be16(uint8_t *buf)
ade9430_dev::temp_deg
int32_t temp_deg
Definition: ade9430.h:897
ade9430_dev::watt_val
uint32_t watt_val
Definition: ade9430.h:891
NANOAMPER_PER_AMPER
#define NANOAMPER_PER_AMPER
Definition: no_os_units.h:65
ADE9430_V_RES_NV
#define ADE9430_V_RES_NV
Definition: ade9430.h:845
ade9430_phase
ade9430_phase
ADE9430 available phases.
Definition: ade9430.h:856
no_os_util.h
Header file of utility functions.
ADE9430_REG_BIRMS
#define ADE9430_REG_BIRMS
Definition: ade9430.h:169
ade9430_set_egy_model
int ade9430_set_egy_model(struct ade9430_dev *dev, enum ade9430_egy_model model, uint16_t value)
Set User Energy use model.
Definition: ade9430.c:226
ADE9430_REG_CVRMS
#define ADE9430_REG_CVRMS
Definition: ade9430.h:188
ADE9430_REG_AVRMS
#define ADE9430_REG_AVRMS
Definition: ade9430.h:152
ADE9430_EGY_TMR_MODE
#define ADE9430_EGY_TMR_MODE
Definition: ade9430.h:793
ADE9430_REG_BVRMS
#define ADE9430_REG_BVRMS
Definition: ade9430.h:170
ADE9430_REG_TEMP_TRIM
#define ADE9430_REG_TEMP_TRIM
Definition: ade9430.h:300
errno.h
Error macro definition for ARM Compiler.
ADE9430_REG_CONFIG5
#define ADE9430_REG_CONFIG5
Definition: ade9430.h:330
ade9430_dev::vrms_val
uint32_t vrms_val
Definition: ade9430.h:895
ade9430_write
int ade9430_write(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t reg_data)
Write device register.
Definition: ade9430.c:87
chip_id
chip_id
Definition: ad9172.h:51
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:140