no-OS
ade9430.h
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1 /***************************************************************************/
39 #ifndef __ADE9430_H__
40 #define __ADE9430_H__
41 
42 /******************************************************************************/
43 /***************************** Include Files **********************************/
44 /******************************************************************************/
45 #include <stdbool.h>
46 #include <stdint.h>
47 #include <string.h>
48 #include "no_os_util.h"
49 #include "no_os_spi.h"
50 
51 /******************************************************************************/
52 /********************** Macros and Constants Definitions **********************/
53 /******************************************************************************/
54 
55 /* SPI commands */
56 #define ADE9430_SPI_READ NO_OS_BIT(3)
57 #define ADE9430_R1B NO_OS_BIT(16)
58 #define ADE9430_R2B NO_OS_BIT(17)
59 
60 /* ADE9430 Register Map */
61 #define ADE9430_REG_AIGAIN 0x0000
62 #define ADE9430_REG_AIGAIN0 0x0001
63 #define ADE9430_REG_AIGAIN1 0x0002
64 #define ADE9430_REG_AIGAIN2 0x0003
65 #define ADE9430_REG_AIGAIN3 0x0004
66 #define ADE9430_REG_AIGAIN4 0x0005
67 #define ADE9430_REG_APHCAL0 0x0006
68 #define ADE9430_REG_APHCAL1 0x0007
69 #define ADE9430_REG_APHCAL2 0x0008
70 #define ADE9430_REG_APHCAL3 0x0009
71 #define ADE9430_REG_APHCAL4 0x000A
72 #define ADE9430_REG_AVGAIN 0x000B
73 #define ADE9430_REG_AIRMSOS 0x000C
74 #define ADE9430_REG_AVRMSOS 0x000D
75 #define ADE9430_REG_APGAIN 0x000E
76 #define ADE9430_REG_AWATTOS 0x000F
77 #define ADE9430_REG_AVAROS 0x0010
78 #define ADE9430_REG_AFWATTOS 0x0011
79 #define ADE9430_REG_AFVAROS 0x0012
80 #define ADE9430_REG_AIFRMSOS 0x0013
81 #define ADE9430_REG_AVFRMSOS 0x0014
82 #define ADE9430_REG_AVRMSONEOS 0x0015
83 #define ADE9430_REG_AIRMSONEOS 0x0016
84 #define ADE9430_REG_AVRMS1012OS 0x0017
85 #define ADE9430_REG_AIRMS1012OS 0x0018
86 #define ADE9430_REG_BIGAIN 0x0020
87 #define ADE9430_REG_BIGAIN0 0x0021
88 #define ADE9430_REG_BIGAIN1 0x0022
89 #define ADE9430_REG_BIGAIN2 0x0023
90 #define ADE9430_REG_BIGAIN3 0x0024
91 #define ADE9430_REG_BIGAIN4 0x0025
92 #define ADE9430_REG_BPHCAL0 0x0026
93 #define ADE9430_REG_BPHCAL1 0x0027
94 #define ADE9430_REG_BPHCAL2 0x0028
95 #define ADE9430_REG_BPHCAL3 0x0029
96 #define ADE9430_REG_BPHCAL4 0x002A
97 #define ADE9430_REG_BVGAIN 0x002B
98 #define ADE9430_REG_BIRMSOS 0x002C
99 #define ADE9430_REG_BVRMSOS 0x002D
100 #define ADE9430_REG_BPGAIN 0x002E
101 #define ADE9430_REG_BWATTOS 0x002F
102 #define ADE9430_REG_BVAROS 0x0030
103 #define ADE9430_REG_BFWATTOS 0x0031
104 #define ADE9430_REG_BFVAROS 0x0032
105 #define ADE9430_REG_BIFRMSOS 0x0033
106 #define ADE9430_REG_BVFRMSOS 0x0034
107 #define ADE9430_REG_BVRMSONEOS 0x0035
108 #define ADE9430_REG_BIRMSONEOS 0x0036
109 #define ADE9430_REG_BVRMS1012OS 0x0037
110 #define ADE9430_REG_BIRMS1012OS 0x0038
111 #define ADE9430_REG_CIGAIN 0x0040
112 #define ADE9430_REG_CIGAIN0 0x0041
113 #define ADE9430_REG_CIGAIN1 0x0042
114 #define ADE9430_REG_CIGAIN2 0x0043
115 #define ADE9430_REG_CIGAIN3 0x0044
116 #define ADE9430_REG_CIGAIN4 0x0045
117 #define ADE9430_REG_CPHCAL0 0x0046
118 #define ADE9430_REG_CPHCAL1 0x0047
119 #define ADE9430_REG_CPHCAL2 0x0048
120 #define ADE9430_REG_CPHCAL3 0x0049
121 #define ADE9430_REG_CPHCAL4 0x004A
122 #define ADE9430_REG_CVGAIN 0x004B
123 #define ADE9430_REG_CIRMSOS 0x004C
124 #define ADE9430_REG_CVRMSOS 0x004D
125 #define ADE9430_REG_CPGAIN 0x004E
126 #define ADE9430_REG_CWATTOS 0x004F
127 #define ADE9430_REG_CVAROS 0x0050
128 #define ADE9430_REG_CFWATTOS 0x0051
129 #define ADE9430_REG_CFVAROS 0x0052
130 #define ADE9430_REG_CIFRMSOS 0x0053
131 #define ADE9430_REG_CVFRMSOS 0x0054
132 #define ADE9430_REG_CVRMSONEOS 0x0055
133 #define ADE9430_REG_CIRMSONEOS 0x0056
134 #define ADE9430_REG_CVRMS1012OS 0x0057
135 #define ADE9430_REG_CIRMS1012OS 0x0058
136 #define ADE9430_REG_CONFIG0 0x0060
137 #define ADE9430_REG_MTTHR_L0 0x0061
138 #define ADE9430_REG_MTTHR_L1 0x0062
139 #define ADE9430_REG_MTTHR_L2 0x0063
140 #define ADE9430_REG_MTTHR_L3 0x0064
141 #define ADE9430_REG_MTTHR_L4 0x0065
142 #define ADE9430_REG_MTTHR_H0 0x0066
143 #define ADE9430_REG_MTTHR_H1 0x0067
144 #define ADE9430_REG_MTTHR_H2 0x0068
145 #define ADE9430_REG_MTTHR_H3 0x0069
146 #define ADE9430_REG_MTTHR_H4 0x006A
147 #define ADE9430_REG_NIRMSOS 0x006B
148 #define ADE9430_REG_ISUMRMSOS 0x006C
149 #define ADE9430_REG_NIGAIN 0x006D
150 #define ADE9430_REG_NPHCAL 0x006E
151 #define ADE9430_REG_NIRMSONEOS 0x006F
152 #define ADE9430_REG_NIRMS1012OS 0x0070
153 #define ADE9430_REG_VNOM 0x0071
154 #define ADE9430_REG_ISUMLVL 0x0073
155 #define ADE9430_REG_AI_PCF 0x020A
156 #define ADE9430_REG_AV_PCF 0x020B
157 #define ADE9430_REG_AIRMS 0x020C
158 #define ADE9430_REG_AVRMS 0x020D
159 #define ADE9430_REG_AIFRMS 0x020E
160 #define ADE9430_REG_AVFRMS 0x020F
161 #define ADE9430_REG_AWATT 0x0210
162 #define ADE9430_REG_AVAR 0x0211
163 #define ADE9430_REG_AVA 0x0212
164 #define ADE9430_REG_AFWATT 0x0213
165 #define ADE9430_REG_AFVAR 0x0214
166 #define ADE9430_REG_AFVA 0x0215
167 #define ADE9430_REG_APF 0x0216
168 #define ADE9430_REG_AIRMSONE 0x0219
169 #define ADE9430_REG_AVRMSONE 0x021A
170 #define ADE9430_REG_AIRMS1012 0x021B
171 #define ADE9430_REG_AVRMS1012 0x021C
172 #define ADE9430_REG_AMTREGION 0x021D
173 #define ADE9430_REG_BI_PCF 0x022A
174 #define ADE9430_REG_BV_PCF 0x022B
175 #define ADE9430_REG_BIRMS 0x022C
176 #define ADE9430_REG_BVRMS 0x022D
177 #define ADE9430_REG_BIFRMS 0x022E
178 #define ADE9430_REG_BVFRMS 0x022F
179 #define ADE9430_REG_BWATT 0x0230
180 #define ADE9430_REG_BVAR 0x0231
181 #define ADE9430_REG_BVA 0x0232
182 #define ADE9430_REG_BFWATT 0x0233
183 #define ADE9430_REG_BFVAR 0x0234
184 #define ADE9430_REG_BFVA 0x0235
185 #define ADE9430_REG_BPF 0x0236
186 #define ADE9430_REG_BIRMSONE 0x0239
187 #define ADE9430_REG_BVRMSONE 0x023A
188 #define ADE9430_REG_BIRMS1012 0x023B
189 #define ADE9430_REG_BVRMS1012 0x023C
190 #define ADE9430_REG_BMTREGION 0x023D
191 #define ADE9430_REG_CI_PCF 0x024A
192 #define ADE9430_REG_CV_PCF 0x024B
193 #define ADE9430_REG_CIRMS 0x024C
194 #define ADE9430_REG_CVRMS 0x024D
195 #define ADE9430_REG_CIFRMS 0x024E
196 #define ADE9430_REG_CVFRMS 0x024F
197 #define ADE9430_REG_CWATT 0x0250
198 #define ADE9430_REG_CVAR 0x0251
199 #define ADE9430_REG_CVA 0x0252
200 #define ADE9430_REG_CFWATT 0x0253
201 #define ADE9430_REG_CFVAR 0x0254
202 #define ADE9430_REG_CFVA 0x0255
203 #define ADE9430_REG_CPF 0x0256
204 #define ADE9430_REG_CIRMSONE 0x0259
205 #define ADE9430_REG_CVRMSONE 0x025A
206 #define ADE9430_REG_CIRMS1012 0x025B
207 #define ADE9430_REG_CVRMS1012 0x025C
208 #define ADE9430_REG_CMTREGION 0x025D
209 #define ADE9430_REG_NI_PCF 0x0265
210 #define ADE9430_REG_NIRMS 0x0266
211 #define ADE9430_REG_NIRMSONE 0x0267
212 #define ADE9430_REG_NIRMS1012 0x0268
213 #define ADE9430_REG_ISUMRMS 0x0269
214 #define ADE9430_REG_VERSION2 0x026A
215 #define ADE9430_REG_NPERIOD_FORRMS 0x026B
216 #define ADE9430_REG_COH_PAGE 0x026C
217 #define ADE9430_REG_RESAMPLE_STATUS 0x026D
218 #define ADE9430_REG_AWATT_ACC 0x02E5
219 #define ADE9430_REG_AWATTHR_LO 0x02E6
220 #define ADE9430_REG_AWATTHR_HI 0x02E7
221 #define ADE9430_REG_AVAR_ACC 0x02EF
222 #define ADE9430_REG_AVARHR_LO 0x02F0
223 #define ADE9430_REG_AVARHR_HI 0x02F1
224 #define ADE9430_REG_AVA_ACC 0x02F9
225 #define ADE9430_REG_AVAHR_LO 0x02FA
226 #define ADE9430_REG_AVAHR_HI 0x02FB
227 #define ADE9430_REG_AFWATT_ACC 0x0303
228 #define ADE9430_REG_AFWATTHR_LO 0x0304
229 #define ADE9430_REG_AFWATTHR_HI 0x0305
230 #define ADE9430_REG_AFVAR_ACC 0x030D
231 #define ADE9430_REG_AFVARHR_LO 0x030E
232 #define ADE9430_REG_AFVARHR_HI 0x030F
233 #define ADE9430_REG_AFVA_ACC 0x0317
234 #define ADE9430_REG_AFVAHR_LO 0x0318
235 #define ADE9430_REG_AFVAHR_HI 0x0319
236 #define ADE9430_REG_BWATT_ACC 0x0321
237 #define ADE9430_REG_BWATTHR_LO 0x0322
238 #define ADE9430_REG_BWATTHR_HI 0x0323
239 #define ADE9430_REG_BVAR_ACC 0x032B
240 #define ADE9430_REG_BVARHR_LO 0x032C
241 #define ADE9430_REG_BVARHR_HI 0x032D
242 #define ADE9430_REG_BVA_ACC 0x0335
243 #define ADE9430_REG_BVAHR_LO 0x0336
244 #define ADE9430_REG_BVAHR_HI 0x0337
245 #define ADE9430_REG_BFWATT_ACC 0x033F
246 #define ADE9430_REG_BFWATTHR_LO 0x0340
247 #define ADE9430_REG_BFWATTHR_HI 0x0341
248 #define ADE9430_REG_BFVAR_ACC 0x0349
249 #define ADE9430_REG_BFVARHR_LO 0x034A
250 #define ADE9430_REG_BFVARHR_HI 0x034B
251 #define ADE9430_REG_BFVA_ACC 0x0353
252 #define ADE9430_REG_BFVAHR_LO 0x0354
253 #define ADE9430_REG_BFVAHR_HI 0x0355
254 #define ADE9430_REG_CWATT_ACC 0x0355
255 #define ADE9430_REG_CWATTHR_LO 0x035E
256 #define ADE9430_REG_CWATTHR_HI 0x035F
257 #define ADE9430_REG_CVAR_ACC 0x0367
258 #define ADE9430_REG_CVARHR_LO 0x0368
259 #define ADE9430_REG_CVARHR_HI 0x0369
260 #define ADE9430_REG_CVA_ACC 0x0371
261 #define ADE9430_REG_CVAHR_LO 0x0372
262 #define ADE9430_REG_CVAHR_HI 0x0373
263 #define ADE9430_REG_CFWATT_ACC 0x037B
264 #define ADE9430_REG_CFWATTHR_LO 0x037C
265 #define ADE9430_REG_CFWATTHR_HI 0x037D
266 #define ADE9430_REG_CFVAR_ACC 0x0385
267 #define ADE9430_REG_CFVARHR_LO 0x0386
268 #define ADE9430_REG_CFVARHR_HI 0x0387
269 #define ADE9430_REG_CFVA_ACC 0x038F
270 #define ADE9430_REG_CFVAHR_LO 0x0390
271 #define ADE9430_REG_CFVAHR_HI 0x0391
272 #define ADE9430_REG_PWATT_ACC 0x0397
273 #define ADE9430_REG_NWATT_ACC 0x039B
274 #define ADE9430_REG_PVAR_ACC 0x039F
275 #define ADE9430_REG_NVAR_ACC 0x03A3
276 #define ADE9430_REG_IPEAK 0x0400
277 #define ADE9430_REG_VPEAK 0x0401
278 #define ADE9430_REG_STATUS0 0x0402
279 #define ADE9430_REG_STATUS1 0x0403
280 #define ADE9430_REG_EVENT_STATUS 0x0404
281 #define ADE9430_REG_MASK0 0x0405
282 #define ADE9430_REG_MASK1 0x0406
283 #define ADE9430_REG_EVENT_MASK 0x0407
284 #define ADE9430_REG_OILVL 0x0409
285 #define ADE9430_REG_OIA 0x040A
286 #define ADE9430_REG_OIB 0x040B
287 #define ADE9430_REG_OIC 0x040C
288 #define ADE9430_REG_OIN 0x040D
289 #define ADE9430_REG_USER_PERIOD 0x040E
290 #define ADE9430_REG_VLEVEL 0x040F
291 #define ADE9430_REG_APERIOD 0x0418
292 #define ADE9430_REG_BPERIOD 0x0419
293 #define ADE9430_REG_CPERIOD 0x041A
294 #define ADE9430_REG_COM_PERIOD 0x041B
295 #define ADE9430_REG_ACT_NL_LVL 0x041C
296 #define ADE9430_REG_REACT_NL_LVL 0x041D
297 #define ADE9430_REG_APP_NL_LVL 0x041E
298 #define ADE9430_REG_PHNOLOAD 0x041F
299 #define ADE9430_REG_WTHR 0x0420
300 #define ADE9430_REG_VARTHR 0x0421
301 #define ADE9430_REG_VATHR 0x0422
302 #define ADE9430_REG_LAST_DATA_32 0x0423
303 #define ADE9430_REG_ADC_REDIRECT 0x0424
304 #define ADE9430_REG_CF_LCFG 0x0425
305 #define ADE9430_REG_PART_ID 0x0472
306 #define ADE9430_REG_TEMP_TRIM 0x0474
307 #define ADE9430_REG_RUN 0x0480
308 #define ADE9430_REG_CONFIG1 0x0481
309 #define ADE9430_REG_ANGL_VA_VB 0x0482
310 #define ADE9430_REG_ANGL_VB_VC 0x0483
311 #define ADE9430_REG_ANGL_VA_VC 0x0484
312 #define ADE9430_REG_ANGL_VB_IA 0x0485
313 #define ADE9430_REG_ANGL_VB_IB 0x0486
314 #define ADE9430_REG_ANGL_VC_IC 0x0487
315 #define ADE9430_REG_ANGL_IA_IB 0x0488
316 #define ADE9430_REG_ANGL_IB_IC 0x0489
317 #define ADE9430_REG_ANGL_IA_IC 0x048A
318 #define ADE9430_REG_OISTATUS 0x048F
319 #define ADE9430_REG_CFMODE 0x0490
320 #define ADE9430_REG_COMPMODE 0x0491
321 #define ADE9430_REG_ACCMODE 0x0492
322 #define ADE9430_REG_CONFIG3 0x0493
323 #define ADE9430_REG_CF1DEN 0x0494
324 #define ADE9430_REG_CF2DEN 0x0495
325 #define ADE9430_REG_CF3DEN 0x0496
326 #define ADE9430_REG_CF4DEN 0x0497
327 #define ADE9430_REG_ZXTOUT 0x0498
328 #define ADE9430_REG_ZXTHRSH 0x0499
329 #define ADE9430_REG_ZX_LP_SEL 0x049A
330 #define ADE9430_REG_SEQ_CYC 0x049C
331 #define ADE9430_REG_PHSIGN 0x049D
332 #define ADE9430_REG_WFB_CFG 0x04A0
333 #define ADE9430_REG_WFB_PG_IRQEN 0x04A1
334 #define ADE9430_REG_WFB_TRG_CFG 0x04A2
335 #define ADE9430_REG_WFB_TRG_STAT 0x04A3
336 #define ADE9430_REG_CONFIG5 0x04A4
337 #define ADE9430_REG_CRC_RSLT 0x04A8
338 #define ADE9430_REG_CRC_SPI 0x04A9
339 #define ADE9430_REG_LAST_DATA_16 0x04AC
340 #define ADE9430_REG_LAST_CMD 0x04AE
341 #define ADE9430_REG_CONFIG2 0x04AF
342 #define ADE9430_REG_EP_CFG 0x04B0
343 #define ADE9430_REG_PWR_TIME 0x04B1
344 #define ADE9430_REG_EGY_TIME 0x04B2
345 #define ADE9430_REG_CRC_FORCE 0x04B4
346 #define ADE9430_REG_CRC_OPTEN 0x04B5
347 #define ADE9430_REG_TEMP_CFG 0x04B6
348 #define ADE9430_REG_TEMP_RSLT 0x04B7
349 #define ADE9430_REG_PGA_GAIN 0x04B9
350 #define ADE9430_REG_CHNL_DIS 0x04BA
351 #define ADE9430_REG_WR_LOCK 0x04BF
352 #define ADE9430_REG_VAR_DIS 0x04E0
353 #define ADE9430_REG_RESERVED1 0x04F0
354 #define ADE9430_REG_VERSION 0x04FE
355 #define ADE9430_REG_AI_SINC_DAT 0x0500
356 #define ADE9430_REG_AV_SINC_DAT 0x0501
357 #define ADE9430_REG_BI_SINC_DAT 0x0502
358 #define ADE9430_REG_BV_SINC_DAT 0x0503
359 #define ADE9430_REG_CI_SINC_DAT 0x0504
360 #define ADE9430_REG_CV_SINC_DAT 0x0505
361 #define ADE9430_REG_NI_SINC_DAT 0x0506
362 #define ADE9430_REG_AI_LPF_DAT 0x0510
363 #define ADE9430_REG_AV_LPF_DAT 0x0511
364 #define ADE9430_REG_BI_LPF_DAT 0x0512
365 #define ADE9430_REG_BV_LPF_DAT 0x0513
366 #define ADE9430_REG_CI_LPF_DAT 0x0514
367 #define ADE9430_REG_CV_LPF_DAT 0x0515
368 #define ADE9430_REG_NI_LPF_DAT 0x0516
369 #define ADE9430_REG_AV_PCF_1 0x0600
370 #define ADE9430_REG_BV_PCF_1 0x0601
371 #define ADE9430_REG_CV_PCF_1 0x0602
372 #define ADE9430_REG_NI_PCF_1 0x0603
373 #define ADE9430_REG_AI_PCF_1 0x0604
374 #define ADE9430_REG_BI_PCF_1 0x0605
375 #define ADE9430_REG_CI_PCF_1 0x0606
376 #define ADE9430_REG_AIRMS_1 0x0607
377 #define ADE9430_REG_BIRMS_1 0x0608
378 #define ADE9430_REG_CIRMS_1 0x0609
379 #define ADE9430_REG_AVRMS_1 0x060A
380 #define ADE9430_REG_BVRMS_1 0x060B
381 #define ADE9430_REG_CVRMS_1 0x060C
382 #define ADE9430_REG_NIRMS_1 0x060D
383 #define ADE9430_REG_AWATT_1 0x060E
384 #define ADE9430_REG_BWATT_1 0x060F
385 #define ADE9430_REG_CWATT_1 0x0610
386 #define ADE9430_REG_AVA_1 0x0611
387 #define ADE9430_REG_BVA_1 0x0612
388 #define ADE9430_REG_CVA_1 0x0613
389 #define ADE9430_REG_AVAR_1 0x0614
390 #define ADE9430_REG_BVAR_1 0x0615
391 #define ADE9430_REG_CVAR_1 0x0616
392 #define ADE9430_REG_AFVAR_1 0x0617
393 #define ADE9430_REG_BFVAR_1 0x0618
394 #define ADE9430_REG_CFVAR_1 0x0619
395 #define ADE9430_REG_APF_1 0x061A
396 #define ADE9430_REG_BPF_1 0x061B
397 #define ADE9430_REG_CPF_1 0x061C
398 #define ADE9430_REG_AFWATT_1 0x0623
399 #define ADE9430_REG_BFWATT_1 0x0624
400 #define ADE9430_REG_CFWATT_1 0x0625
401 #define ADE9430_REG_AFVA_1 0x0626
402 #define ADE9430_REG_BFVA_1 0x0627
403 #define ADE9430_REG_CFVA_1 0x0628
404 #define ADE9430_REG_AFIRMS_1 0x0629
405 #define ADE9430_REG_BFIRMS_1 0x062A
406 #define ADE9430_REG_CFIRMS_1 0x062B
407 #define ADE9430_REG_AFVRMS_1 0x062C
408 #define ADE9430_REG_BFVRMS_1 0x062D
409 #define ADE9430_REG_CFVRMS_1 0x062E
410 #define ADE9430_REG_AIRMSONE_1 0x062F
411 #define ADE9430_REG_BIRMSONE_1 0x0630
412 #define ADE9430_REG_CIRMSONE_1 0x0631
413 #define ADE9430_REG_AVRMSONE_1 0x0622
414 #define ADE9430_REG_BVRMSONE_1 0x0633
415 #define ADE9430_REG_CVRMSONE_1 0x0634
416 #define ADE9430_REG_NIRSONE_1 0x0635
417 #define ADE9430_REG_AIRMS1012_1 0x0636
418 #define ADE9430_REG_BIRMS1012_1 0x0637
419 #define ADE9430_REG_CIRMS1012_1 0x0638
420 #define ADE9430_REG_AVRMS1012_1 0x0639
421 #define ADE9430_REG_BVRMS1012_1 0x063A
422 #define ADE9430_REG_CVRMS1012_1 0x063B
423 #define ADE9430_REG_NIRMS1012_1 0x063C
424 #define ADE9430_REG_AV_PCF_2 0x0680
425 #define ADE9430_REG_AI_PCF_2 0x0681
426 #define ADE9430_REG_AIRMS_2 0x0682
427 #define ADE9430_REG_AVRMS_2 0x0683
428 #define ADE9430_REG_AWATT_2 0x0684
429 #define ADE9430_REG_AVA_2 0x0685
430 #define ADE9430_REG_AVAR_2 0x0686
431 #define ADE9430_REG_AFVAR_2 0x0687
432 #define ADE9430_REG_APF_2 0x0688
433 #define ADE9430_REG_AFWATT_2 0x068B
434 #define ADE9430_REG_AFVA_2 0x068C
435 #define ADE9430_REG_AFIRMS_2 0x068D
436 #define ADE9430_REG_AFVRMS_2 0x068E
437 #define ADE9430_REG_AIRMSONE_2 0x068F
438 #define ADE9430_REG_AVRMSONE_2 0x0690
439 #define ADE9430_REG_AIRMS1012_2 0x0691
440 #define ADE9430_REG_AVRMS1012_2 0x0692
441 #define ADE9430_REG_BV_PCF_2 0x0693
442 #define ADE9430_REG_BI_PCF_2 0x0694
443 #define ADE9430_REG_BIRMS_2 0x0695
444 #define ADE9430_REG_BVRMS_2 0x0696
445 #define ADE9430_REG_BWATT_2 0x0697
446 #define ADE9430_REG_BVA_2 0x0698
447 #define ADE9430_REG_BVAR_2 0x0699
448 #define ADE9430_REG_BFVAR_2 0x069A
449 #define ADE9430_REG_BPF_2 0x069B
450 #define ADE9430_REG_BFWATT_2 0x069E
451 #define ADE9430_REG_BFVA_2 0x069F
452 #define ADE9430_REG_BFIRMS_2 0x06A0
453 #define ADE9430_REG_BFVRMS_2 0x06A1
454 #define ADE9430_REG_BIRMSONE_2 0x06A2
455 #define ADE9430_REG_BVRMSONE_2 0x06A3
456 #define ADE9430_REG_BIRMS1012_2 0x06A4
457 #define ADE9430_REG_BVRMS1012_2 0x06A5
458 #define ADE9430_REG_CV_PCF_2 0x06A6
459 #define ADE9430_REG_CI_PCF_2 0x06A7
460 #define ADE9430_REG_CIRMS_2 0x06A8
461 #define ADE9430_REG_CVRMS_2 0x06A9
462 #define ADE9430_REG_CWATT_2 0x06AA
463 #define ADE9430_REG_CVA_2 0x06AB
464 #define ADE9430_REG_CVAR_2 0x06AC
465 #define ADE9430_REG_CFVAR_2 0x06AD
466 #define ADE9430_REG_CPF_2 0x06AE
467 #define ADE9430_REG_CFWATT_2 0x06B1
468 #define ADE9430_REG_CFVA_2 0x06B2
469 #define ADE9430_REG_CFIRMS_2 0x06B3
470 #define ADE9430_REG_CFVRMS_2 0x06B4
471 #define ADE9430_REG_CIRMSONE_2 0x06B5
472 #define ADE9430_REG_CVRMSONE_2 0x06B6
473 #define ADE9430_REG_CIRMS1012_2 0x06B7
474 #define ADE9430_REG_CVRMS1012_2 0x06B8
475 #define ADE9430_REG_NI_PCF_2 0x06B9
476 #define ADE9430_REG_NIRMS_2 0x06BA
477 #define ADE9430_REG_NIRMSONE_2 0x06BB
478 #define ADE9430_REG_NIRMS1012_2 0x06BC
479 
480 /* ADE9430_REG_CONFIG0 Bit Definition */
481 #define ADE9430_PERIOD_AVG_CFG NO_OS_GENMASK(17, 16)
482 #define ADE9430_RESAMPLE_RATE NO_OS_BIT(15)
483 #define ADE9430_RMSONE_RATE NO_OS_BIT(14)
484 #define ADE9430_DISRPLPF NO_OS_BIT(13)
485 #define ADE9430_DISAPLPF NO_OS_BIT(12)
486 #define ADE9430_ININTEN NO_OS_BIT(11)
487 #define ADE9430_VNOMC_EN NO_OS_BIT(10)
488 #define ADE9430_VNOMB_EN NO_OS_BIT(9)
489 #define ADE9430_VNOMA_EN NO_OS_BIT(8)
490 #define ADE9430_RMS_SRC_SEL NO_OS_BIT(7)
491 #define ADE9430_ZX_SRC_SEL NO_OS_BIT(6)
492 #define ADE9430_INTEN NO_OS_BIT(5)
493 #define ADE9430_MTEN NO_OS_BIT(4)
494 #define ADE9430_HPFDIS NO_OS_BIT(3)
495 #define ADE9430_ISUM_CFG NO_OS_GENMASK(1, 0)
496 
497 /* ADE9430_REG_AMTREGION Bit Definition */
498 #define ADE9430_AREGION NO_OS_GENMASK(3, 0)
499 
500 /* ADE9430_REG_BMTREGION Bit Definition */
501 #define ADE9430_BREGION NO_OS_GENMASK(3, 0)
502 
503 /* ADE9430_REG_CMTREGION Bit Definition */
504 #define ADE9430_CREGION NO_OS_GENMASK(3, 0)
505 
506 /* ADE9430_REG_IPEAK Bit Definition */
507 #define ADE9430_IPPHASE NO_OS_GENMASK(26, 24)
508 #define ADE9430_IPEAKVAL NO_OS_GENMASK(23, 0)
509 
510 /* ADE9430_REG_VPEAK Bit Definition */
511 #define ADE9430_VPPHASE NO_OS_GENMASK(26, 24)
512 #define ADE9430_VPEAKVAL NO_OS_GENMASK(23, 0)
513 
514 /* ADE9430_REG_STATUS0 Bit Definition */
515 #define ADE9430_STATUS0_TEMP_RDY NO_OS_BIT(25)
516 #define ADE9430_STATUS0_MISMTCH NO_OS_BIT(24)
517 #define ADE9430_STATUS0_COH_PAGE_RDY NO_OS_BIT(23)
518 #define ADE9430_STATUS0_WFB_TRIG NO_OS_BIT(22)
519 #define ADE9430_STATUS0_PF_RDY NO_OS_BIT(21)
520 #define ADE9430_STATUS0_RMS1012RDY NO_OS_BIT(20)
521 #define ADE9430_STATUS0_RMSONERDY NO_OS_BIT(19)
522 #define ADE9430_STATUS0_PWRRDY NO_OS_BIT(18)
523 #define ADE9430_STATUS0_PAGE_FULL NO_OS_BIT(17)
524 #define ADE9430_STATUS0_WFB_TRIG_IRQ NO_OS_BIT(16)
525 #define ADE9430_STATUS0_DREADY NO_OS_BIT(15)
526 #define ADE9430_STATUS0_CF4 NO_OS_BIT(14)
527 #define ADE9430_STATUS0_CF3 NO_OS_BIT(13)
528 #define ADE9430_STATUS0_CF2 NO_OS_BIT(12)
529 #define ADE9430_STATUS0_CF1 NO_OS_BIT(11)
530 #define ADE9430_STATUS0_REVPSUM4 NO_OS_BIT(10)
531 #define ADE9430_STATUS0_REVPSUM3 NO_OS_BIT(9)
532 #define ADE9430_STATUS0_REVPSUM2 NO_OS_BIT(8)
533 #define ADE9430_STATUS0_REVPSUM1 NO_OS_BIT(7)
534 #define ADE9430_STATUS0_REVRPC NO_OS_BIT(6)
535 #define ADE9430_STATUS0_REVRPB NO_OS_BIT(5)
536 #define ADE9430_STATUS0_REVRPA NO_OS_BIT(4)
537 #define ADE9430_STATUS0_REVAPC NO_OS_BIT(3)
538 #define ADE9430_STATUS0_REVAPB NO_OS_BIT(2)
539 #define ADE9430_STATUS0_REVAPA NO_OS_BIT(1)
540 #define ADE9430_STATUS0_EGYRDY NO_OS_BIT(0)
541 
542 /* ADE9430_REG_STATUS1 Bit Definition */
543 #define ADE9430_STATUS1_ERROR3 NO_OS_BIT(31)
544 #define ADE9430_STATUS1_RROR2 NO_OS_BIT(30)
545 #define ADE9430_STATUS1_ERROR1 NO_OS_BIT(29)
546 #define ADE9430_STATUS1_ERROR0 NO_OS_BIT(28)
547 #define ADE9430_STATUS1_CRC_DONE NO_OS_BIT(27)
548 #define ADE9430_STATUS1_CRC_CHG NO_OS_BIT(26)
549 #define ADE9430_STATUS1_SEQERR NO_OS_BIT(18)
550 #define ADE9430_STATUS1_OI NO_OS_BIT(17)
551 #define ADE9430_STATUS1_RSTDONE NO_OS_BIT(16)
552 #define ADE9430_STATUS1_ZXIC NO_OS_BIT(15)
553 #define ADE9430_STATUS1_ZXIB NO_OS_BIT(14)
554 #define ADE9430_STATUS1_ZXIA NO_OS_BIT(13)
555 #define ADE9430_STATUS1_ZXCOMB NO_OS_BIT(12)
556 #define ADE9430_STATUS1_ZXVC NO_OS_BIT(11)
557 #define ADE9430_STATUS1_ZXVB NO_OS_BIT(10)
558 #define ADE9430_STATUS1_ZXVA NO_OS_BIT(9)
559 #define ADE9430_STATUS1_ZXTOVC NO_OS_BIT(8)
560 #define ADE9430_STATUS1_ZXTOVB NO_OS_BIT(7)
561 #define ADE9430_STATUS1_ZXTOVA NO_OS_BIT(6)
562 #define ADE9430_STATUS1_VAFNOLOAD NO_OS_BIT(5)
563 #define ADE9430_STATUS1_RFNOLOAD NO_OS_BIT(4)
564 #define ADE9430_STATUS1_AFNOLOAD NO_OS_BIT(3)
565 #define ADE9430_STATUS1_VANLOAD NO_OS_BIT(2)
566 #define ADE9430_STATUS1_RNLOAD NO_OS_BIT(1)
567 #define ADE9430_STATUS1_ANLOAD NO_OS_BIT(0)
568 
569 /* ADE9430_REG_EVENT_STATUS Bit Definition */
570 #define ADE9430_EVENT_DREADY NO_OS_BIT(16)
571 #define ADE9430_EVENT_VAFNOLOAD NO_OS_BIT(15)
572 #define ADE9430_EVENT_RFNOLOAD NO_OS_BIT(14)
573 #define ADE9430_EVENT_AFNOLOAD NO_OS_BIT(13)
574 #define ADE9430_EVENT_VANLOAD NO_OS_BIT(12)
575 #define ADE9430_EVENT_RNLOAD NO_OS_BIT(11)
576 #define ADE9430_EVENT_ANLOAD NO_OS_BIT(10)
577 #define ADE9430_EVENT_REVPSUM4 NO_OS_BIT(9)
578 #define ADE9430_EVENT_REVPSUM3 NO_OS_BIT(8)
579 #define ADE9430_EVENT_REVPSUM2 NO_OS_BIT(7)
580 #define ADE9430_EVENT_REVPSUM1 NO_OS_BIT(6)
581 
582 /* ADE9430_REG_MASK0 Bit Definition */
583 #define ADE9430_MASK0_TEMP_RDY NO_OS_BIT(25)
584 #define ADE9430_MASK0_ISMTCH NO_OS_BIT(24)
585 #define ADE9430_MASK0_COH_PAGE_RDY NO_OS_BIT(23)
586 #define ADE9430_MASK0_WFB_TRIG NO_OS_BIT(22)
587 #define ADE9430_MASK0_PF_RDY NO_OS_BIT(21)
588 #define ADE9430_MASK0_RMS1012RDY NO_OS_BIT(20)
589 #define ADE9430_MASK0_RMSONERDY NO_OS_BIT(19)
590 #define ADE9430_MASK0_PWRRDY NO_OS_BIT(18)
591 #define ADE9430_MASK0_PAGE_FULL NO_OS_BIT(17)
592 #define ADE9430_MASK0_WFB_TRIG_IRQ NO_OS_BIT(16)
593 #define ADE9430_MASK0_DREADY NO_OS_BIT(15)
594 #define ADE9430_MASK0_CF4 NO_OS_BIT(14)
595 #define ADE9430_MASK0_CF3 NO_OS_BIT(13)
596 #define ADE9430_MASK0_CF2 NO_OS_BIT(12)
597 #define ADE9430_MASK0_CF1 NO_OS_BIT(11)
598 #define ADE9430_MASK0_REVPSUM4 NO_OS_BIT(10)
599 #define ADE9430_MASK0_REVPSUM3 NO_OS_BIT(9)
600 #define ADE9430_MASK0_REVPSUM2 NO_OS_BIT(8)
601 #define ADE9430_MASK0_REVPSUM1 NO_OS_BIT(7)
602 #define ADE9430_MASK0_REVRPC NO_OS_BIT(6)
603 #define ADE9430_MASK0_REVRPB NO_OS_BIT(5)
604 #define ADE9430_MASK0_REVRPA NO_OS_BIT(4)
605 #define ADE9430_MASK0_REVAPC NO_OS_BIT(3)
606 #define ADE9430_MASK0_REVAPB NO_OS_BIT(2)
607 #define ADE9430_MASK0_REVAPA NO_OS_BIT(1)
608 #define ADE9430_MASK0_EGYRDY NO_OS_BIT(0)
609 
610 /* ADE9430_REG_MASK1 Bit Definition */
611 #define ADE9430_MASK1_ERROR3 NO_OS_BIT(31)
612 #define ADE9430_MASK1_ERROR2 NO_OS_BIT(30)
613 #define ADE9430_MASK1_ERROR1 NO_OS_BIT(29)
614 #define ADE9430_MASK1_ERROR0 NO_OS_BIT(28)
615 #define ADE9430_MASK1_CRC_DONE NO_OS_BIT(27)
616 #define ADE9430_MASK1_CRC_CHG NO_OS_BIT(26)
617 #define ADE9430_MASK1_SEQERR NO_OS_BIT(18)
618 #define ADE9430_MASK1_OI NO_OS_BIT(17)
619 #define ADE9430_MASK1_ZXIC NO_OS_BIT(15)
620 #define ADE9430_MASK1_ZXIB NO_OS_BIT(14)
621 #define ADE9430_MASK1_ZXIA NO_OS_BIT(13)
622 #define ADE9430_MASK1_ZXCOMB NO_OS_BIT(12)
623 #define ADE9430_MASK1_ZXVC NO_OS_BIT(11)
624 #define ADE9430_MASK1_ZXVB NO_OS_BIT(10)
625 #define ADE9430_MASK1_ZXVA NO_OS_BIT(9)
626 #define ADE9430_MASK1_ZXTOVC NO_OS_BIT(8)
627 #define ADE9430_MASK1_ZXTOVB NO_OS_BIT(7)
628 #define ADE9430_MASK1_ZXTOVA NO_OS_BIT(6)
629 #define ADE9430_MASK1_VAFNOLOAD NO_OS_BIT(5)
630 #define ADE9430_MASK1_RFNOLOAD NO_OS_BIT(4)
631 #define ADE9430_MASK1_AFNOLOAD NO_OS_BIT(3)
632 #define ADE9430_MASK1_VANLOAD NO_OS_BIT(2)
633 #define ADE9430_MASK1_RNLOAD NO_OS_BIT(1)
634 #define ADE9430_MASK1_ANLOAD NO_OS_BIT(0)
635 
636 /* ADE9430_REG_EVENT_MASK Bit Definition */
637 #define ADE9430_EVENT_READY_MSK NO_OS_BIT(16)
638 #define ADE9430_EVENT_VAFNOLOAD_MSK NO_OS_BIT(15)
639 #define ADE9430_EVENT_RFNOLOAD_MSK NO_OS_BIT(14)
640 #define ADE9430_EVENT_AFNOLOAD_MSK NO_OS_BIT(13)
641 #define ADE9430_EVENT_VANLOAD_MSK NO_OS_BIT(12)
642 #define ADE9430_EVENT_RNLOAD_MSK NO_OS_BIT(11)
643 #define ADE9430_EVENT_ANLOAD_MSK NO_OS_BIT(10)
644 #define ADE9430_EVENT_REVPSUM4_MSK NO_OS_BIT(9)
645 #define ADE9430_EVENT_REVPSUM3_MSK NO_OS_BIT(8)
646 #define ADE9430_EVENT_REVPSUM2_MSK NO_OS_BIT(7)
647 #define ADE9430_EVENT_REVPSUM1_MSK NO_OS_BIT(6)
648 
649 /* ADE9430_REG_OILVL Bit Definition */
650 #define ADE9430_OILVL_VAL NO_OS_GENMASK(23, 0)
651 
652 /* ADE9430_REG_OIA Bit Definition */
653 #define ADE9430_OI_VAL NO_OS_GENMASK(23, 0)
654 
655 /* ADE9430_REG_OIB Bit Definition */
656 #define ADE9430_OIB_VAL NO_OS_GENMASK(23, 0)
657 
658 /* ADE9430_REG_OIC Bit Definition */
659 #define ADE9430_OIC_VAL NO_OS_GENMASK(23, 0)
660 
661 /* ADE9430_REG_OIN Bit Definition */
662 #define ADE9430_OIN_VAL NO_OS_GENMASK(23, 0)
663 
664 /* ADE9430_REG_VLEVEL Bit Definition */
665 #define ADE9430_VLEVEL_VAL NO_OS_GENMASK(23, 0)
666 
667 /* ADE9430_REG_PHNOLOAD Bit Definition */
668 #define ADE9430_CFVANL NO_OS_BIT(17)
669 #define ADE9430_CFVARNL NO_OS_BIT(16)
670 #define ADE9430_CFWATTNL NO_OS_BIT(15)
671 #define ADE9430_CVANL NO_OS_BIT(14)
672 #define ADE9430_CVARNL NO_OS_BIT(13)
673 #define ADE9430_CWATTNL NO_OS_BIT(12)
674 #define ADE9430_BFVANL NO_OS_BIT(11)
675 #define ADE9430_BFVARNL NO_OS_BIT(10)
676 #define ADE9430_BFWATTNL NO_OS_BIT(9)
677 #define ADE9430_BVANL NO_OS_BIT(8)
678 #define ADE9430_BVARNL NO_OS_BIT(7)
679 #define ADE9430_BWATTNL NO_OS_BIT(6)
680 #define ADE9430_AFVANL NO_OS_BIT(5)
681 #define ADE9430_AFVARNL NO_OS_BIT(4)
682 #define ADE9430_AFWATTNL NO_OS_BIT(3)
683 #define ADE9430_AVANL NO_OS_BIT(2)
684 #define ADE9430_AVARNL NO_OS_BIT(1)
685 #define ADE9430_AWATTNL NO_OS_BIT(0)
686 
687 /* ADE9430_REG_ADC_REDIRECT Bit Definition */
688 #define ADE9430_VC_DIN NO_OS_GENMASK(20, 18)
689 #define ADE9430_VB_DIN NO_OS_GENMASK(17, 15)
690 #define ADE9430_VA_DIN NO_OS_GENMASK(14, 12)
691 #define ADE9430_IN_DIN NO_OS_GENMASK(11, 9)
692 #define ADE9430_IC_DIN NO_OS_GENMASK(8, 6)
693 #define ADE9430_IB_DIN NO_OS_GENMASK(5, 3)
694 #define ADE9430_IA_DIN NO_OS_GENMASK(2, 0)
695 
696 /* ADE9430_REG_CF_LCFG Bit Definition */
697 #define ADE9430_CF4_LT NO_OS_BIT(22)
698 #define ADE9430_CF3_LT NO_OS_BIT(21)
699 #define ADE9430_CF2_LT NO_OS_BIT(20)
700 #define ADE9430_CF1_LT NO_OS_BIT(19)
701 #define ADE9430_CF_LTMR NO_OS_GENMASK(18, 0)
702 
703 /* ADE9430_REG_PART_ID Bit Definition */
704 #define ADE9430_ADE9430_ID NO_OS_BIT(20)
705 
706 /* ADE9430_REG_TEMP_TRIM Bit Definition */
707 #define ADE9430_TEMP_OFFSET NO_OS_GENMASK(31, 16)
708 #define ADE9430_TEMP_GAIN NO_OS_GENMASK(15, 0)
709 
710 /* ADE9430_REG_CONFIG1 Bit Definition */
711 #define ADE9430_EXT_REF NO_OS_BIT(15)
712 #define ADE9430_IRQ0_ON_IRQ1 NO_OS_BIT(12)
713 #define ADE9430_BURST_EN NO_OS_BIT(11)
714 #define ADE9430_PWR_SETTLE NO_OS_GENMASK(9, 8)
715 #define ADE9430_CF_ACC_CLR NO_OS_BIT(5)
716 #define ADE9430_CF4_CFG NO_OS_GENMASK(3, 2)
717 #define ADE9430_CF3_CFG NO_OS_BIT(1)
718 #define ADE9430_SWRST NO_OS_BIT(0)
719 
720 /* ADE9430_REG_OISTATUS Bit Definition */
721 #define ADE9430_OIPHASE NO_OS_GENMASK(3, 0)
722 
723 /* ADE9430_REG_CFMODE Bit Definition */
724 #define ADE9430_CF4DIS NO_OS_BIT(15)
725 #define ADE9430_CF3DIS NO_OS_BIT(14)
726 #define ADE9430_CF2DIS NO_OS_BIT(13)
727 #define ADE9430_CF1DIS NO_OS_BIT(12)
728 #define ADE9430_CF4SEL NO_OS_GENMASK(11, 9)
729 #define ADE9430_CF3SEL NO_OS_GENMASK(8, 6)
730 #define ADE9430_CF2SEL NO_OS_GENMASK(5, 3)
731 #define ADE9430_CF1SEL NO_OS_GENMASK(2, 0)
732 
733 /* ADE9430_REG_COMPMODE Bit Definition */
734 #define ADE9430_TERMSEL4 NO_OS_GENMASK(11, 9)
735 #define ADE9430_TERMSEL3 NO_OS_GENMASK(8, 6)
736 #define ADE9430_TERMSEL2 NO_OS_GENMASK(5, 3)
737 #define ADE9430_TERMSEL1 NO_OS_GENMASK(2, 0)
738 
739 /* ADE9430_REG_ACCMODE Bit Definition */
740 #define ADE9430_SELFREQ NO_OS_BIT(8)
741 #define ADE9430_ICONSEL NO_OS_BIT(7)
742 #define ADE9430_VCONSEL NO_OS_GENMASK(6, 4)
743 #define ADE9430_VARACC NO_OS_GENMASK(3, 2)
744 #define ADE9430_WATTACC NO_OS_GENMASK(3, 2)
745 
746 /* ADE9430_REG_CONFIG3 Bit Definition */
747 #define ADE9430_OC_EN NO_OS_GENMASK(15, 12)
748 #define ADE9430_PEAKSEL NO_OS_GENMASK(4, 2)
749 
750 /* ADE9430_REG_ZX_LP_SEL Bit Definition */
751 #define ADE9430_LP_SEL NO_OS_GENMASK(4, 3)
752 #define ADE9430_ZX_SEL NO_OS_GENMASK(2, 1)
753 
754 /* ADE9430_REG_PHSIGN Bit Definition */
755 #define ADE9430_SUM4SIGN NO_OS_BIT(9)
756 #define ADE9430_SUM3SIGN NO_OS_BIT(8)
757 #define ADE9430_SUM2SIGN NO_OS_BIT(7)
758 #define ADE9430_SUM1SIGN NO_OS_BIT(6)
759 #define ADE9430_CVARSIGN NO_OS_BIT(5)
760 #define ADE9430_CWSIGN NO_OS_BIT(4)
761 #define ADE9430_BVARSIGN NO_OS_BIT(3)
762 #define ADE9430_BWSIGN NO_OS_BIT(2)
763 #define ADE9430_AVARSIGN NO_OS_BIT(1)
764 #define ADE9430_AWSIGN NO_OS_BIT(0)
765 
766 /* ADE9430_REG_WFB_CFG Bit Definition */
767 #define ADE9430_WF_IN_EN NO_OS_BIT(12)
768 #define ADE9430_WF_SRC NO_OS_GENMASK(9, 8)
769 #define ADE9430_WF_MODE NO_OS_BIT(7, 6)
770 #define ADE9430_WF_CAP_SEL NO_OS_BIT(5)
771 #define ADE9430_WF_CAP_EN NO_OS_BIT(4)
772 #define ADE9430_BURST_CHAN NO_OS_GENMASK(3, 0)
773 
774 /* ADE9430_WFB_TRG_CFG Bit Definition */
775 #define ADE9430_TRIG_FORCE NO_OS_BIT(10)
776 #define ADE9430_ZXCOMB NO_OS_BIT(9)
777 #define ADE9430_ZXVC NO_OS_BIT(8)
778 #define ADE9430_ZXVB NO_OS_BIT(7)
779 #define ADE9430_ZXVA NO_OS_BIT(6)
780 #define ADE9430_ZXIC NO_OS_BIT(5)
781 #define ADE9430_ZXIB NO_OS_BIT(4)
782 #define ADE9430_ZXIA NO_OS_BIT(3)
783 #define ADE9430_OI NO_OS_BIT(2)
784 
785 /* ADE9430_WFB_TRG_STAT Bit Definition */
786 #define ADE9430_WFB_LAST_PAGE NO_OS_GENMASK(15, 12)
787 #define ADE9430_WFB_TRIG_ADDR NO_OS_GENMASK(10, 0)
788 
789 /* ADE9430_CONFIG2 Bit Definition */
790 #define ADE9430_UPERIOD_SEL NO_OS_BIT(12)
791 #define ADE9430_HPF_CRN NO_OS_GENMASK(12, 9)
792 
793 /* ADE9430_EP_CFG Bit Definition */
794 #define ADE9430_NOLOAD_TMR NO_OS_GENMASK(15, 13)
795 #define ADE9430_PWR_SIGN_SEL_1 NO_OS_BIT(7)
796 #define ADE9430_PWR_SIGN_SEL_0 NO_OS_BIT(6)
797 #define ADE9430_RD_RST_EN NO_OS_BIT(5)
798 #define ADE9430_EGY_LD_ACCUM NO_OS_BIT(4)
799 #define ADE9430_EGY_TMR_MODE NO_OS_BIT(1)
800 #define ADE9430_EGY_PWR_EN NO_OS_BIT(0)
801 
802 /* ADE9430_CRC_FORCE Bit Definition */
803 #define ADE9430_FORCE_CRC_UPDATE NO_OS_BIT(0)
804 
805 /* ADE9430_CRC_OPTEN Bit Definition */
806 #define ADE9430_CRC_WFB_TRG_CFG_EN NO_OS_BIT(15)
807 #define ADE9430_CRC_WFB_PG_IRQEN NO_OS_BIT(15)
808 #define ADE9430_CRC_WFB_CFG_EN NO_OS_BIT(15)
809 #define ADE9430_CRC_SEQ_CYC_EN NO_OS_BIT(15)
810 #define ADE9430_CRC_ZXLPSEL_EN NO_OS_BIT(15)
811 #define ADE9430_CRC_ZXTOUT_EN NO_OS_BIT(15)
812 #define ADE9430_CRC_APP_NL_LVL_EN NO_OS_BIT(15)
813 #define ADE9430_CRC_REACT_NL_LVL_EN NO_OS_BIT(15)
814 #define ADE9430_CRC_ACT_NL_LVL_EN NO_OS_BIT(15)
815 #define ADE9430_CRC_EVENT_MASK_EN NO_OS_BIT(15)
816 #define ADE9430_CRC_MASK1_EN NO_OS_BIT(15)
817 #define ADE9430_CRC_MASK0_EN NO_OS_BIT(15)
818 
819 /* ADE9430_TEMP_CFG Bit Definition */
820 #define ADE9430_TEMP_START NO_OS_BIT(3)
821 #define ADE9430_TEMP_EN NO_OS_BIT(2)
822 #define ADE9430_TEMP_TIME NO_OS_GENMASK(1, 0)
823 
824 /* ADE9430_TEMP_RSLT Bit Definition */
825 #define ADE9430_TEMP_RESULT NO_OS_GENMASK(11, 0)
826 
827 /* ADE9430_PGA_GAIN Bit Definition */
828 #define ADE9430_VC_GAIN NO_OS_GENMASK(13, 12)
829 #define ADE9430_VB_GAIN NO_OS_GENMASK(11, 10)
830 #define ADE9430_VA_GAIN NO_OS_GENMASK(9, 8)
831 #define ADE9430_IN_GAIN NO_OS_GENMASK(7, 6)
832 #define ADE9430_IC_GAIN NO_OS_GENMASK(5, 4)
833 #define ADE9430_IB_GAIN NO_OS_GENMASK(3, 2)
834 #define ADE9430_IA_GAIN NO_OS_GENMASK(1, 0)
835 
836 /* ADE9430_CHNL_DIS Bit Definition */
837 #define ADE9430_VC_DISADC NO_OS_BIT(6)
838 #define ADE9430_VB_DISADC NO_OS_BIT(5)
839 #define ADE9430_VA_DISADC NO_OS_BIT(4)
840 #define ADE9430_IN_DISADC NO_OS_BIT(3)
841 #define ADE9430_IC_DISADC NO_OS_BIT(2)
842 #define ADE9430_IB_DISADC NO_OS_BIT(1)
843 #define ADE9430_IA_DISADC NO_OS_BIT(0)
844 
845 /* ADE9430_VAR_DIS Bit Definition */
846 #define ADE9430_VARDIS NO_OS_BIT(0)
847 
848 /* Miscellaneous Definitions */
849 #define ADE9430_CHIP_ID 0x63
850 #define ADE9430_I_RES_NA 4018ULL
851 #define ADE9430_V_RES_NV 13357ULL
852 #define ADE9430_W_RES_UW 7203ULL
853 
854 /******************************************************************************/
855 /*************************** Types Declarations *******************************/
856 /******************************************************************************/
857 
866 };
867 
876 };
877 
886  bool temp_en;
887 };
888 
893 struct ade9430_dev {
897  uint32_t watt_val;
899  uint32_t irms_val;
901  uint32_t vrms_val;
903  int32_t temp_deg;
904 };
905 
906 /******************************************************************************/
907 /************************ Functions Declarations ******************************/
908 /******************************************************************************/
909 
910 /* Read device register. */
911 int ade9430_read(struct ade9430_dev *dev, uint16_t reg_addr,
912  uint32_t *reg_data);
913 
914 /* Write device register. */
915 int ade9430_write(struct ade9430_dev *dev, uint16_t reg_addr,
916  uint32_t reg_data);
917 
918 /* Update specific register bits. */
919 int ade9430_update_bits(struct ade9430_dev *dev, uint16_t reg_addr,
920  uint32_t mask, uint32_t reg_data);
921 
922 /* Read temperature */
923 int ade9430_read_temp(struct ade9430_dev *dev);
924 
925 /* Read Energy/Power for specific phase */
926 int ade9430_read_data_ph(struct ade9430_dev *dev, enum ade9430_phase phase);
927 
928 /* Set User Energy use model */
929 int ade9430_set_egy_model(struct ade9430_dev *dev, enum ade9430_egy_model model,
930  uint16_t value);
931 
932 /* Initialize the device. */
933 int ade9430_init(struct ade9430_dev **device,
935 
936 /* Remove the device and release resources. */
937 int ade9430_remove(struct ade9430_dev *dev);
938 
939 #endif // __ADE9430_H__
ADE9430_PHASE_B
@ ADE9430_PHASE_B
Definition: ade9430.h:864
ADE9430_REG_TEMP_RSLT
#define ADE9430_REG_TEMP_RSLT
Definition: ade9430.h:348
ADE9430_REG_EGY_TIME
#define ADE9430_REG_EGY_TIME
Definition: ade9430.h:344
no_os_put_unaligned_be16
void no_os_put_unaligned_be16(uint16_t val, uint8_t *buf)
ADE9430_REG_EP_CFG
#define ADE9430_REG_EP_CFG
Definition: ade9430.h:342
ade9430_dev::irms_val
uint32_t irms_val
Definition: ade9430.h:899
no_os_alloc.h
ade9430.h
Header file of ADE9430 Driver.
ade9430_dev
ADE9430 Device structure.
Definition: ade9430.h:893
ADE9430_EGY_HALF_LINE_CYCLES
@ ADE9430_EGY_HALF_LINE_CYCLES
Definition: ade9430.h:874
ade9430_read_data_ph
int ade9430_read_data_ph(struct ade9430_dev *dev, enum ade9430_phase phase)
Read the power/energy for specific phase.
Definition: ade9430.c:176
no_os_spi_write_and_read
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:165
no_os_spi.h
Header file of SPI Interface.
MICROWATT_PER_WATT
#define MICROWATT_PER_WATT
Definition: no_os_units.h:75
ADE9430_EGY_LD_ACCUM
#define ADE9430_EGY_LD_ACCUM
Definition: ade9430.h:798
ADE9430_PHASE_C
@ ADE9430_PHASE_C
Definition: ade9430.h:865
ade9430_read_data_ph
int ade9430_read_data_ph(struct ade9430_dev *dev, enum ade9430_phase phase)
Read the power/energy for specific phase.
Definition: ade9430.c:176
no_os_units.h
Header file of Units.
ade9430_dev::spi_desc
struct no_os_spi_desc * spi_desc
Definition: ade9430.h:895
ade9430_init
int ade9430_init(struct ade9430_dev **device, struct ade9430_init_param init_param)
Initialize the device.
Definition: ade9430.c:290
ade9430_init_param::temp_en
bool temp_en
Definition: ade9430.h:886
no_os_delay.h
Header file of Delay functions.
ade9430_write
int ade9430_write(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t reg_data)
Write device register.
Definition: ade9430.c:93
ADE9430_SWRST
#define ADE9430_SWRST
Definition: ade9430.h:718
device
Definition: ad9361_util.h:75
ADE9430_EGY_NR_SAMPLES
@ ADE9430_EGY_NR_SAMPLES
Definition: ade9430.h:875
no_os_calloc
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:60
ADE9430_REG_CONFIG1
#define ADE9430_REG_CONFIG1
Definition: ade9430.h:308
ade9430_init
int ade9430_init(struct ade9430_dev **device, struct ade9430_init_param init_param)
Initialize the device.
Definition: ade9430.c:290
ADE9430_TEMP_OFFSET
#define ADE9430_TEMP_OFFSET
Definition: ade9430.h:707
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
no_os_field_prep
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)
ADE9430_PHASE_A
@ ADE9430_PHASE_A
Definition: ade9430.h:863
ADE9430_REG_RUN
#define ADE9430_REG_RUN
Definition: ade9430.h:307
ADE9430_SPI_READ
#define ADE9430_SPI_READ
Definition: ade9430.h:56
no_os_put_unaligned_be32
void no_os_put_unaligned_be32(uint32_t val, uint8_t *buf)
ADE9430_REG_CIRMS
#define ADE9430_REG_CIRMS
Definition: ade9430.h:193
ade9430_remove
int ade9430_remove(struct ade9430_dev *dev)
Remove the device and release resources.
Definition: ade9430.c:349
ADE9430_REG_AIRMS
#define ADE9430_REG_AIRMS
Definition: ade9430.h:157
ade9430_update_bits
int ade9430_update_bits(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t mask, uint32_t reg_data)
Update specific register bits.
Definition: ade9430.c:117
ade9430_remove
int ade9430_remove(struct ade9430_dev *dev)
Remove the device and release resources.
Definition: ade9430.c:349
ade9430_read_temp
int ade9430_read_temp(struct ade9430_dev *dev)
Read the temperature.
Definition: ade9430.c:138
ADE9430_REG_BWATT
#define ADE9430_REG_BWATT
Definition: ade9430.h:179
NANOVOLT_PER_VOLT
#define NANOVOLT_PER_VOLT
Definition: no_os_units.h:66
ade9430_egy_model
ade9430_egy_model
ADE9430 available user energy use models.
Definition: ade9430.h:872
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:177
ADE9430_REG_AWATT
#define ADE9430_REG_AWATT
Definition: ade9430.h:161
ADE9430_REG_VERSION
#define ADE9430_REG_VERSION
Definition: ade9430.h:354
ade9430_read
int ade9430_read(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t *reg_data)
Read device register.
Definition: ade9430.c:61
ade9430_init_param
ADE9430 Device initialization parameters.
Definition: ade9430.h:882
ADE9430_RD_RST_EN
#define ADE9430_RD_RST_EN
Definition: ade9430.h:797
ADE9430_CHIP_ID
#define ADE9430_CHIP_ID
Definition: ade9430.h:849
ADE9430_TEMP_GAIN
#define ADE9430_TEMP_GAIN
Definition: ade9430.h:708
ade9430_read
int ade9430_read(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t *reg_data)
Read device register.
Definition: ade9430.c:61
ADE9430_I_RES_NA
#define ADE9430_I_RES_NA
Definition: ade9430.h:850
ADE9430_TEMP_START
#define ADE9430_TEMP_START
Definition: ade9430.h:820
ADE9430_EGY_WITH_RESET
@ ADE9430_EGY_WITH_RESET
Definition: ade9430.h:873
ADE9430_TEMP_RESULT
#define ADE9430_TEMP_RESULT
Definition: ade9430.h:825
ade9430_update_bits
int ade9430_update_bits(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t mask, uint32_t reg_data)
Update specific register bits.
Definition: ade9430.c:117
ADE9430_W_RES_UW
#define ADE9430_W_RES_UW
Definition: ade9430.h:852
ADE9430_TEMP_EN
#define ADE9430_TEMP_EN
Definition: ade9430.h:821
no_os_field_get
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
ade9430_init_param::spi_init
struct no_os_spi_init_param * spi_init
Definition: ade9430.h:884
no_os_free
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:75
ADE9430_REG_TEMP_CFG
#define ADE9430_REG_TEMP_CFG
Definition: ade9430.h:347
ADE9430_EGY_PWR_EN
#define ADE9430_EGY_PWR_EN
Definition: ade9430.h:800
ade9430_read_temp
int ade9430_read_temp(struct ade9430_dev *dev)
Read the temperature.
Definition: ade9430.c:138
no_os_get_unaligned_be32
uint32_t no_os_get_unaligned_be32(uint8_t *buf)
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:119
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:122
ADE9430_REG_CWATT
#define ADE9430_REG_CWATT
Definition: ade9430.h:197
ade9430_set_egy_model
int ade9430_set_egy_model(struct ade9430_dev *dev, enum ade9430_egy_model model, uint16_t value)
Set User Energy use model.
Definition: ade9430.c:232
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:58
no_os_get_unaligned_be16
uint16_t no_os_get_unaligned_be16(uint8_t *buf)
ade9430_dev::temp_deg
int32_t temp_deg
Definition: ade9430.h:903
ade9430_dev::watt_val
uint32_t watt_val
Definition: ade9430.h:897
NANOAMPER_PER_AMPER
#define NANOAMPER_PER_AMPER
Definition: no_os_units.h:71
ADE9430_V_RES_NV
#define ADE9430_V_RES_NV
Definition: ade9430.h:851
ade9430_phase
ade9430_phase
ADE9430 available phases.
Definition: ade9430.h:862
no_os_util.h
Header file of utility functions.
ADE9430_REG_BIRMS
#define ADE9430_REG_BIRMS
Definition: ade9430.h:175
ade9430_set_egy_model
int ade9430_set_egy_model(struct ade9430_dev *dev, enum ade9430_egy_model model, uint16_t value)
Set User Energy use model.
Definition: ade9430.c:232
ADE9430_REG_CVRMS
#define ADE9430_REG_CVRMS
Definition: ade9430.h:194
ADE9430_REG_AVRMS
#define ADE9430_REG_AVRMS
Definition: ade9430.h:158
ADE9430_EGY_TMR_MODE
#define ADE9430_EGY_TMR_MODE
Definition: ade9430.h:799
ADE9430_REG_BVRMS
#define ADE9430_REG_BVRMS
Definition: ade9430.h:176
ADE9430_REG_TEMP_TRIM
#define ADE9430_REG_TEMP_TRIM
Definition: ade9430.h:306
errno.h
Error macro definition for ARM Compiler.
ADE9430_REG_CONFIG5
#define ADE9430_REG_CONFIG5
Definition: ade9430.h:336
ade9430_dev::vrms_val
uint32_t vrms_val
Definition: ade9430.h:901
ade9430_write
int ade9430_write(struct ade9430_dev *dev, uint16_t reg_addr, uint32_t reg_data)
Write device register.
Definition: ade9430.c:93
chip_id
chip_id
Definition: ad9172.h:57
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:131