no-OS
adp1050.h
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1 /***************************************************************************/
39 #ifndef __ADP_1050_H__
40 #define __ADP_1050_H__
41 
42 #include <stdint.h>
43 #include <stdbool.h>
44 #include <stdio.h>
45 #include "no_os_gpio.h"
46 #include "no_os_i2c.h"
47 #include "no_os_pwm.h"
48 #include "no_os_util.h"
49 #include "no_os_units.h"
50 
51 #define ADP1050_EXTENDED_COMMAND 0xFF
52 #define ADP1050_WRITE_BYTE_MAX_VAL 0xFF
53 
54 #define ADP1050_LSB_MASK NO_OS_GENMASK(7, 0)
55 #define ADP1050_MSB_MASK NO_OS_GENMASK(15, 8)
56 
57 #define ADP1050_ON_OFF_DEFAULT_CFG 0x00
58 #define ADP1050_ON_OFF_CTRL_HIGH_CFG 0x1E
59 #define ADP1050_ON_OFF_CTRL_LOW_CFG 0x1C
60 
61 #define ADP1050_CTRL_PIN_ENABLE NO_OS_BIT(4)
62 
63 #define ADP1050_SOFTWARE_RESET_ON 0x01
64 #define ADP1050_SOFTWARE_RESET_OFF 0x00
65 
66 #define ADP1050_SW_RES_DELAY_0MS 0x00
67 #define ADP1050_SW_RES_DELAY_500MS 0x01
68 #define ADP1050_SW_RES_DELAY_1S 0x02
69 #define ADP1050_SW_RES_DELAY_2S 0x03
70 
71 #define ADP1050_SW_RES_NO_DELAY 0x00
72 #define ADP1050_SW_RES_TOFF_DELAY 0x04
73 
74 #define ADP1050_TOFF_DELAY_0MS 0x0000
75 #define ADP1050_TOFF_DELAY_50MS 0x0032
76 #define ADP1050_TOFF_DELAY_250MS 0x00FA
77 #define ADP1050_TOFF_DELAY_1000MS 0x03E8
78 
79 #define ADP1050_OPERATION_ON 0x80
80 #define ADP1050_OPERATION_OFF 0x00
81 #define ADP1050_OPERATION_SOFT_OFF 0x40
82 
83 #define ADP1050_MARGIN_OFF 0x00
84 #define ADP1050_MARGIN_LOW 0x10
85 #define ADP1050_MARGIN_HIGH 0x20
86 
87 #define ADP1050_MANT_MAX 0x7FF
88 #define ADP1050_EXP_MAX 0x1F
89 #define ADP1050_EXP_MASK NO_OS_GENMASK(15, 11)
90 #define ADP1050_MANT_MASK NO_OS_GENMASK(10, 0)
91 
92 #define ADP1050_VOUT_EXP_MASK NO_OS_GENMASK(4, 0)
93 #define ADP1050_VOUT_GO_COMMAND 0x06
94 #define ADP1050_VOUT_OFF 0x00
95 
96 #define ADP1050_OUTA_FALLING_EDGE_NEGATIVE_MOD 0x03
97 #define ADP1050_OUTB_FALLING_EDGE_NEGATIVE_MOD 0x30
98 #define ADP1050_OUTA_ON 0x32
99 #define ADP1050_OUTB_ON 0x31
100 #define ADP1050_SR1_ON 0x23
101 #define ADP1050_SR2_ON 0x13
102 #define ADP1050_ALL_PWM_OFF 0x33
103 #define ADP1050_EDGE_MAX_VAL 0x0FFF
104 #define ADP1050_PULSE_MAX_VAL 0xFFFF
105 #define ADP1050_EDGE_MSB_MASK NO_OS_GENMASK(7, 0)
106 #define ADP1050_RISING_EDGE_LSB_MASK NO_OS_GENMASK(7, 4)
107 #define ADP1050_FALLING_EDGE_LSB_MASK NO_OS_GENMASK(3, 0)
108 
109 #define ADP1050_CS1_CLIMIT_COMP_IGNORE 0x80
110 #define ADP1050_CS1_LEADING_EDGE_MASK NO_OS_GENMASK(6, 4)
111 #define ADP1050_CS1_DEBOUNCE_MASK NO_OS_GENMASK(1, 0)
112 
113 #define ADP1050_OUTA_OL_ENABLE NO_OS_BIT(0)
114 #define ADP1050_OUTB_OL_ENABLE NO_OS_BIT(1)
115 #define ADP1050_SR1_OL_ENABLE NO_OS_BIT(4)
116 #define ADP1050_SR2_OL_ENABLE NO_OS_BIT(5)
117 
118 #define ADP1050_OUTB_SR2_RISING_MOD_MASK NO_OS_GENMASK(7, 6)
119 #define ADP1050_OUTB_SR2_FALLING_MOD_MASK NO_OS_GENMASK(5, 4)
120 #define ADP1050_OUTA_SR1_RISING_MOD_MASK NO_OS_GENMASK(3, 2)
121 #define ADP1050_OUTA_SR1_FALLING_MOD_MASK NO_OS_GENMASK(1, 0)
122 
123 #define ADP1050_POSITIVE_MOD_SIGN 0x02
124 #define ADP1050_NEGATIVE_MOD_SIGN 0x03
125 
126 #define ADP1050_OPEN_LOOP_ENABLE NO_OS_GENMASK(5, 0)
127 #define ADP1050_OPEN_LOOP_DISABLE 0x00
128 
129 #define ADP1050_OL_SS_1_CYCLE 0x84
130 #define ADP1050_OL_SS_4_CYCLES 0x8C
131 #define APD1050_OL_SS_16_CYCLES 0x94
132 #define ADP1050_OL_SS_64_CYCLES 0x9C
133 
134 #define ADP1050_FREQ_SYNC_ON 0x48
135 #define ADP1050_FREQ_SYNC_OFF 0x49
136 #define ADP1050_MAX_PERIOD_INTEGER(x) ((1000 / (x)) * 1000)
137 #define ADP1050_MAX_PERIOD_FLOAT(x) ((1000 / (((x) - 0xF800) / 2)) * 1000)
138 #define ADP1050_FLOAT_FREQ_MASK NO_OS_BIT(15)
139 
140 #define ADP1050_CHECK_CHIP_PASS_MASK NO_OS_BIT(7)
141 #define ADP1050_CHIP_DEFAULT_PASS 0xFFFF
142 #define ADP1050_CHECK_EEPROM_PASS_MASK NO_OS_BIT(3)
143 #define ADP1050_EEPROM_DEFAULT_PASS 0xFF
144 #define ADP1050_TRIM_DEFAULT_PASS 0xFF
145 
146 #define ADP1050_VOUT_GO 0x06
147 
148 #define ADP1050_FAULT_RESPONSE_MASK NO_OS_GENMASK(3, 2)
149 #define ADP1050_AFTER_FAULT_MASK NO_OS_GENMASK(1, 0)
150 
151 #define ADP1050_FEEDFORWARD_OFF 0x00
152 #define ADP1050_CL_FEEDFORWARD_DISABLE NO_OS_BIT(3)
153 #define ADP1050_FEEDFORWARD_CL_ENABLE NO_OS_GENMASK(3, 2)
154 #define ADP1050_FEEDFORWARD_OL_ENABLE (NO_OS_BIT(6) | NO_OS_BIT(3))
155 
156 #define ADP1050_PULSE_SKIPPING_ENABLE NO_OS_GENMASK(6, 0)
157 #define ADP1050_PULSE_SKIPPING_DISABLE NO_OS_GENMASK(5, 0)
158 
159 #define ADP1050_CS1_TRIM_VAL 0xA00
160 #define ADP1050_CS1_MAX_INIT_VAL 0xFF
161 #define ADP1050_VF_TRIM_VAL 0x500
162 #define ADP1050_VF_MAX_INIT_VAL 0xFF
163 #define ADP1050_VS_OFFSET_MAX_INIT_VAL 0x7FFF
164 #define ADP1050_VS_MAX_INIT_VAL 0xFF
165 #define ADP1050_VS_INIT_MASK NO_OS_GENMASK(14, 0)
166 
167 /* PMBus Addresses */
168 #define ADP1050_PMBUS_10KOHM_ADDRESS 0x70
169 #define ADP1050_PMBUS_31KOHM_ADDRESS 0x71
170 #define ADP1050_PMBUS_51KOHM_ADDRESS 0x72
171 #define ADP1050_PMBUS_71KOHM_ADDRESS 0x73
172 #define ADP1050_PMBUS_90KOHM_ADDRESS 0x74
173 #define ADP1050_PMBUS_110KOHM_ADDRESS 0x75
174 #define ADP1050_PMBUS_130KOHM_ADDRESS 0x76
175 #define ADP1050_PMBUS_150KOHM_ADDRESS 0x77
176 
177 /* TON Delay Values */
178 #define ADP1050_TON_DELAY_0MS 0x0000
179 #define ADP1050_TON_DELAY_10MS 0x000A
180 #define ADP1050_TON_DELAY_25MS 0x0019
181 #define ADP1050_TON_DELAY_50MS 0x0032
182 #define ADP1050_TON_DELAY_75MS 0x004B
183 #define ADP1050_TON_DELAY_100MS 0x0064
184 #define ADP1050_TON_DELAY_250MS 0x00FA
185 #define ADP1050_TON_DELAY_1000MS 0x03E8
186 
187 /* TON Rise Values */
188 #define ADP1050_TON_RISE_50US 0xC00D
189 #define ADP1050_TON_RISE_200US 0xD00D
190 #define ADP1050_TON_RISE_1750US 0xF007
191 #define ADP1050_TON_RISE_10MS 0xF815
192 #define ADP1050_TON_RISE_21MS 0x0015
193 #define ADP1050_TON_RISE_40MS 0xF0A1
194 #define ADP1050_TON_RISE_60MS 0x003C
195 #define ADP1050_TON_RISE_100MS 0x0064
196 
197 /* PMBus COMMAND SET */
198 #define ADP1050_OPERATION 0x01
199 #define ADP1050_ON_OFF_CONFIG 0x02
200 #define ADP1050_CLEAR_FAULTS 0x03
201 #define ADP1050_WRITE_PROTECT 0x10
202 #define ADP1050_RESTORE_DEFAULT_ALL 0x12
203 #define ADP1050_STORE_USER_ALL 0x15
204 #define ADP1050_RESTORE_USER_ALL 0x16
205 #define ADP1050_CAPABILITY 0x19
206 #define ADP1050_VOUT_MODE 0x20
207 #define ADP1050_VOUT_COMMAND 0x21
208 #define ADP1050_VOUT_TRIM 0x22
209 #define ADP1050_VOUT_CAL_OFFSET 0x23
210 #define ADP1050_VOUT_MAX 0x24
211 #define ADP1050_VOUT_MARGIN_HIGH 0x25
212 #define ADP1050_VOUT_MARGIN_LOW 0x26
213 #define ADP1050_VOUT_TRANSITION_RATE 0x27
214 #define ADP1050_VOUT_SCALE_LOOP 0x29
215 #define ADP1050_VOUT_SCALE_MONITOR 0x2A
216 #define ADP1050_FREQUENCY_SWITCH 0x33
217 #define ADP1050_VIN_ON 0x35
218 #define ADP1050_VIN_OFF 0x36
219 #define ADP1050_VOUT_OV_FAULT_LIMIT 0x40
220 #define ADP1050_VOUT_OV_FAULT_RESPONSE 0x41
221 #define ADP1050_VOUT_UV_FAULT_LIMIT 0x44
222 #define ADP1050_VOUT_UV_FAULT_RESPONSE 0x45
223 #define ADP1050_OT_FAULT_LIMIT 0x4F
224 #define ADP1050_OT_FAULT_RESPONSE 0x50
225 #define ADP1050_POWER_GOOD_ON 0x5E
226 #define ADP1050_POWER_GOOD_OFF 0x5F
227 #define ADP1050_TON_DELAY 0x60
228 #define ADP1050_TON_RISE 0x61
229 #define ADP1050_TOFF_DELAY 0x64
230 #define ADP1050_STATUS_BYTE 0x78
231 #define ADP1050_STATUS_WORD 0x79
232 #define ADP1050_STATUS_VOUT 0x7A
233 #define ADP1050_STATUS_INPUT 0x7C
234 #define ADP1050_STATUS_TEMPERATURE 0x7D
235 #define ADP1050_STATUS_CML 0x7E
236 #define ADP1050_READ_VIN 0x88
237 #define ADP1050_READ_IIN 0x89
238 #define ADP1050_READ_VOUT 0x8B
239 #define ADP1050_READ_TEMPERATURE 0x8D
240 #define ADP1050_READ_DUTY_CYCLE 0x94
241 #define ADP1050_READ_FREQUENCY 0x95
242 #define ADP1050_READ_PMBUS_REVISION 0x98
243 #define ADP1050_MFR_ID 0x99
244 #define ADP1050_MFR_MODEL 0x9A
245 #define ADP1050_MFR_REVISION 0x9B
246 #define ADP1050_IC_DEVICE_ID 0xAD
247 #define ADP1050_IC_DEVICE_REV 0xAE
248 #define ADP1050_EEPROM_DATA_00 0xB0
249 #define ADP1050_EEPROM_DATA_01 0xB1
250 #define ADP1050_EEPROM_DATA_02 0xB2
251 #define ADP1050_EEPROM_DATA_03 0xB3
252 #define ADP1050_EEPROM_DATA_04 0xB4
253 #define ADP1050_EEPROM_DATA_05 0xB5
254 #define ADP1050_EEPROM_DATA_06 0xB6
255 #define ADP1050_EEPROM_DATA_07 0xB7
256 #define ADP1050_EEPROM_DATA_08 0xB8
257 #define ADP1050_EEPROM_DATA_09 0xB9
258 #define ADP1050_EEPROM_DATA_10 0xBA
259 #define ADP1050_EEPROM_DATA_11 0xBB
260 #define ADP1050_EEPROM_DATA_12 0xBC
261 #define ADP1050_EEPROM_DATA_13 0xBD
262 #define ADP1050_EEPROM_DATA_14 0xBE
263 #define ADP1050_EEPROM_DATA_15 0xBF
264 #define ADP1050_EEPROM_CRC_CHKSUM 0xD1
265 #define ADP1050_EEPROM_NUM_RD_BYTES 0xD2
266 #define ADP1050_EEPROM_ADDR_OFFSET 0xD3
267 #define ADP1050_EEPROM_PAGE_ERASE 0xD4
268 #define ADP1050_EEPROM_PASSWORD 0xD5
269 #define ADP1050_TRIM_PASSWORD 0xD6
270 #define ADP1050_CHIP_PASSWORD 0xD7
271 #define ADP1050_VIN_SCALE_MONITOR 0xD8
272 #define ADP1050_IIN_SCALE_MONITOR 0xD9
273 #define ADP1050_EEPROM_INFO 0xF1
274 #define ADP1050_MFR_SPECIFIC_1 0xFA
275 #define ADP1050_MFR_SPECIFIC_2 0xFB
276 
277 /* MANUFACTURER SPECIFIC EXTENDED COMMAND LIST */
278 
279 /* Flag Configuration Registers */
280 #define ADP1050_IIN_OC_FAST_FAULT_RESPONSE 0xFE00
281 #define ADP1050_CS3_OC_FAULT_RESPONSE 0xFE01
282 #define ADP1050_VIN_UV_FAULT_RESPONSE 0xFE02
283 #define ADP1050_FLAGIN_RESPONSE 0xFE03
284 #define ADP1050_VDD_OV_RESPONSE 0xFE05
285 
286 /* Soft Start Software Reset Setting Registers */
287 #define ADP1050_SOFTWARE_RESET_GO 0xFE06
288 #define ADP1050_SOFTWARE_RESET_SETTINGS 0xFE07
289 #define ADP1050_SR_SOFT_START_SETTINGS 0xFE08
290 #define ADP1050_SOFT_START_SETTING_OL 0xFE09
291 
292 /* Blanking and PGOOD Setting Registers */
293 #define ADP1050_FLAG_BLANKING_DURING_SS 0xFE0B
294 #define ADP1050_VS_BAL_BLANK_AND_SS_DISABLE 0xFE0C
295 #define ADP1050_PGOOD_MASK_SETTINGS 0xFE0D
296 #define ADP1050_PGOOD_FLAG_DEBOUNCE 0xFE0E
297 #define ADP1050_DEBOUNCE_TIME_PGOOD 0xFE0F
298 
299 /* Switching Frequency and Synchronization Setting Registers */
300 #define ADP1050_SYNCH_DELAY_TIME 0xFE11
301 #define ADP1050_SYNCH_GENERAL_SETTINGS 0xFE12
302 #define ADP1050_DUAL_END_TOPOLOGY_MODE 0xFE13
303 
304 /* Current Sense and Limit Setting Registers */
305 #define ADP1050_CS1_GAIN_TRIM 0xFE14
306 #define ADP1050_CS3_OC_DEBOUNCE 0xFE19
307 #define ADP1050_IIN_OC_FAST_FAULT_LIMIT 0xFE1A
308 #define ADP1050_CS1_CBC_CURR_LIM_REF 0xFE1B
309 #define ADP1050_MATCHED_CBC_CURR_LIM_SETTINGS 0xFE1D
310 #define ADP1050_SR1_SR2_RESPONSE_CBC_CURR_LIM 0xFE1E
311 #define ADP1050_CS1_CBC_CURR_LIM_SETTINGS 0xFE1F
312 
313 /* Voltage Sense and Limit Setting Registers */
314 #define ADP1050_VS_GAIN_TRIM 0xFE20
315 #define ADP1050_PREBIAS_START_UP_ENABLE 0xFE25
316 #define ADP1050_VOUT_OV_FAULT_FLAGE_DEBOUNCE 0xFE26
317 #define ADP1050_VF_GAIN_TRIM 0xFE28
318 #define ADP1050_VIN_ON_AND_VIN_OFF_DELAY 0xFE29
319 
320 /* Temperature Sense and Protection Setting Registers */
321 #define ADP1050_RTD_GAIN_TRIM 0xFE2A
322 #define ADP1050_RTD_OFFSET_TRIM_MSB 0xFE2B
323 #define ADP1050_RTD_CURRENT_SOURCE_SETTINGS 0xFE2D
324 #define ADP1050_OT_HYSTERESIS_SETTINGS 0xFE2F
325 
326 /* Digital Compensator and Modulation Setting Registers */
327 #define ADP1050_NORMAL_MODE_COMP_LOW_FREQ 0xFE30
328 #define ADP1050_NORMAL_MODE_COMP_ZERO 0xFE31
329 #define ADP1050_NORMAL_MODE_COMP_POLE 0xFE32
330 #define ADP1050_NORMAL_MODE_COMP_HIGH_FREQ 0xFE33
331 #define ADP1050_CS1_THRESHOLD_VS_BALANCE 0xFE38
332 #define ADP1050_NOMINAL_MOD_VAL_PREBIAS 0xFE39
333 #define ADP1050_SR_DRIVER_DELAY 0xFE3A
334 #define ADP1050_PWM_180_PHASE_SHIFT_SETTINGS 0xFE3B
335 #define ADP1050_MODULATION_LIMIT 0xFE3C
336 #define ADP1050_FEEDFORWARD_SS_FILTER_GAIN 0xFE3D
337 
338 /* PWM Outputs Timing Registers */
339 #define ADP1050_OUTA_RISING_EDGE_TIMING 0xFE3E
340 #define ADP1050_OUTA_FALLING_EDGE_TIMING 0xFE3F
341 #define ADP1050_OUTA_RISING_FALLING_TIMING_LSB 0xFE40
342 #define ADP1050_OUTB_RISING_EDGE_TIMING 0xFE41
343 #define ADP1050_OUTB_FALLING_EDGE_TIMING 0xFE42
344 #define ADP1050_OUTB_RISING_FALLING_TIMING_LSB 0xFE43
345 #define ADP1050_SR1_RISING_EDGE_TIMING 0xFE4A
346 #define ADP1050_SR1_FALLING_EDGE_TIMING 0xFE4B
347 #define ADP1050_SR1_RISING_FALLING_TIMING_LSB 0xFE4C
348 #define ADP1050_SR2_RISING_EDGE_TIMING 0xFE4D
349 #define ADP1050_SR2_FALLING_EDGE_TIMING 0xFE4E
350 #define ADP1050_SR2_RISING_FALLING_TIMING_LSB 0xFE4F
351 #define ADP1050_OUTA_OUTB_MODULATION_SETTINGS 0xFE50
352 #define ADP1050_SR1_SR2_MODULATION_SETTINGS 0xFE52
353 #define ADP1050_PWM_OUTPUT_DISABLE 0xFE53
354 
355 /* Volt-Second Balance Control Registers */
356 #define ADP1050_VS_BAL_CTRL_GENERAL_SETTINGS 0xFE54
357 #define ADP1050_VS_BAL_CTRL_OUTA_OUTB 0xFE55
358 #define ADP1050_VS_BAL_CTRL_SR1_SR2 0xFE57
359 
360 /* Duty Cycle Reading Setting Registers */
361 #define ADP1050_DUTY_CYCLE_READING_SETTINGS 0xFE58
362 #define ADP1050_INPUT_VOLTAGE_COMP_MULT 0xFE59
363 
364 /* Other Setting Registers */
365 #define ADP1050_GO_COMMANDS 0xFE61
366 #define ADP1050_CUSTOMIZED_REGISTERS 0xFE62
367 #define ADP1050_MOD_REF_MSB_OL_INV_FF 0xFE63
368 #define ADP1050_MOD_REF_LSB_OL_INV_FF 0xFE64
369 #define ADP1050_CURRENT_VALUE_UPDATE_RATE 0xFE65
370 #define ADP1050_OL_OPERATION_SETTINGS 0xFE67
371 #define ADP1050_PULSE_SKIPPING_MODE_THR 0xFE69
372 #define ADP1050_CS3_OC_FAULT_LIMIT 0xFE6A
373 #define ADP1050_MOD_THR_OVP_SELECTION 0xFE6B
374 #define ADP1050_MOD_FLAG_OVP_SELECTION 0xFE6C
375 #define ADP1050_OUTA_OUTB_ADJ_REF_SYNCH 0xFE6D
376 #define ADP1050_SR1_SR2_ADJ_REF_SYNCH 0xFE6F
377 
378 /* Manufacturer Specific Fault Flag Registers */
379 #define ADP1050_FLAG_REGISTER1 0xFEA0
380 #define ADP1050_FLAG_REGISTER2 0xFEA1
381 #define ADP1050_FLAG_REGISTER3 0xFEA2
382 #define ADP1050_LATCHED_FLAG_REGISTER1 0xFEA3
383 #define ADP1050_LATCHED_FLAG_REGISTER2 0xFEA4
384 #define ADP1050_LATCHED_FLAG_REGISTER3 0xFEA5
385 #define ADP1050_FIRST_FLAG_ID 0xFEA6
386 
387 /* Manufacturer Specific Value Reading Regisers */
388 #define ADP1050_CS1_VALUE 0xFEA7
389 #define ADP1050_CS3_VALUE 0xFEA9
390 #define ADP1050_VS_VALUE 0xFEAA
391 #define ADP1050_RTD_VALUE 0xFEAB
392 #define ADP1050_VF_VALUE 0xFEAC
393 #define ADP1050_DUTY_CYCLE_VALUE 0xFEAD
394 #define ADP1050_INPUT_POWER_VALUE 0xFEAE
395 
399 };
400 
407 };
408 
414 };
415 
420 };
421 
423  ADP1050_49KHZ = 0x0031,
424  ADP1050_59KHZ = 0x0038,
425  ADP1050_60KHZ = 0x003C,
426  ADP1050_65KHZ = 0x0041,
427  ADP1050_71KHZ = 0x0047,
428  ADP1050_78KHZ = 0x004E,
429  ADP1050_87KHZ = 0x0057,
430  ADP1050_104KHZ = 0x0068,
431  ADP1050_120KHZ = 0x0078,
432  ADP1050_130KHZ = 0x0082,
433  ADP1050_136KHZ = 0x0088,
434  ADP1050_142KHZ = 0x008E,
435  ADP1050_149KHZ = 0x0095,
436  ADP1050_184KHZ = 0x00B8,
437  ADP1050_223KHZ = 0x00DF,
438  ADP1050_250KHZ = 0x00FA,
439  ADP1050_284KHZ = 0x011C,
440  ADP1050_329KHZ = 0x0149,
441  ADP1050_338KHZ = 0x0152,
442  ADP1050_347KHZ = 0x015B,
443  ADP1050_357KHZ = 0x0165,
444  ADP1050_379KHZ = 0x017B,
445  ADP1050_397KHZ = 0x018D,
446  ADP1050_403KHZ = 0x0193,
447  ADP1050_410KHZ = 0x019A,
448  ADP1050_97_5KHZ = 0xF8C3,
466 };
467 
478 };
479 
489 };
490 
494 };
495 
505 };
506 
512 };
513 
518 };
519 
524 };
525 
532 };
533 
540 };
541 
546 };
547 
557  uint8_t on_off_config;
558  bool ext_syni;
559 };
560 
564 struct adp1050_desc {
572 };
573 
575 int adp1050_send_command(struct adp1050_desc *desc, uint16_t command);
576 
578 int adp1050_read(struct adp1050_desc *desc, uint16_t command, uint8_t *data,
579  uint8_t bytes_number);
580 
582 int adp1050_write(struct adp1050_desc *desc, uint16_t command, uint16_t data,
583  uint8_t bytes_number);
584 
586 int adp1050_read_status(struct adp1050_desc *desc,
587  enum adp1050_status_type status,
588  uint16_t *status_val);
589 
591 int adp1050_read_vsense(struct adp1050_desc *desc, uint16_t *vsense);
592 
594 int adp1050_read_value(struct adp1050_desc *desc, uint16_t *mant, uint8_t *exp,
595  enum adp1050_value_type val_type);
596 
598 int adp1050_vout_value(struct adp1050_desc *desc, uint16_t vout_command,
599  uint16_t vout_max);
600 
602 int adp1050_vout_offset(struct adp1050_desc *desc, int16_t vout_offset);
603 
605 int adp1050_vout_tr(struct adp1050_desc *desc, enum adp1050_vout_tr vout_tr);
606 
608 int adp1050_vout_scale(struct adp1050_desc *desc, int8_t exp, uint16_t mant);
609 
611 int adp1050_vout_margin(struct adp1050_desc *desc, uint16_t margin_high,
612  uint16_t margin_low);
613 
615 int adp1050_pwm_duty_cycle(struct adp1050_desc *desc, uint16_t pulse_width,
616  uint16_t pulse_start, enum adp1050_channel chan);
617 
619 int adp1050_pwm_modulation(struct adp1050_desc *desc, enum adp1050_mod mod,
620  enum adp1050_channel chan, bool sign);
621 
623 int adp1050_set_pwm(struct adp1050_desc *desc, enum adp1050_channel chan,
624  enum adp1050_freq freq);
625 
627 int adp1050_set_vin(struct adp1050_desc *desc, int16_t mantissa, int8_t exp,
628  bool state_on);
629 
631 int adp1050_set_climit(struct adp1050_desc *desc,
632  enum adp1050_iin_oc_fast_fault fast_fault,
633  enum adp1050_climit_ref climit_ref);
634 
636 int adp1050_set_cs1_settings(struct adp1050_desc *desc,
637  enum adp1050_cs1_leading_edge leading_edge,
638  enum adp1050_cs1_debounce debounce,
639  bool ignore);
640 
642 int adp1050_set_open_loop(struct adp1050_desc *desc, uint8_t rising_edge,
643  uint8_t falling_edge, enum adp1050_channel chan);
644 
646 int adp1050_set_close_loop(struct adp1050_desc *desc);
647 
649 int adp1050_pulse_skipping(struct adp1050_desc *desc, uint8_t pulse_threshold,
650  bool state_on);
651 
653 int adp1050_set_feedforward(struct adp1050_desc *desc, bool state_on);
654 
656 int adp1050_freq_sync(struct adp1050_desc *desc, bool state_on);
657 
659 int adp1050_set_flgi_response(struct adp1050_desc *desc,
660  enum adp1050_flgi_fault_response fault_response,
661  enum adp1050_flgi_after_fault after_fault);
662 
664 int adp1050_filter(struct adp1050_desc *desc, uint8_t zero, uint8_t pole,
665  uint8_t lf, uint8_t hf);
666 
668 int adp1050_trim(struct adp1050_desc *desc, enum adp1050_trim_type trim_type,
669  uint16_t vout_command, uint16_t vout_scale, uint16_t trim_val);
670 
672 int adp1050_unlock_pass(struct adp1050_desc *desc, uint16_t password,
673  enum adp1050_pass_type pass_type);
674 
676 int adp1050_lock_pass(struct adp1050_desc *desc, uint16_t password,
677  enum adp1050_pass_type pass_type);
678 
680 int adp1050_change_pass(struct adp1050_desc *desc, uint16_t old_pass,
681  uint16_t new_pass, enum adp1050_pass_type pass_type);
682 
684 int adp1050_software_reset(struct adp1050_desc *desc);
685 
687 int adp1050_init(struct adp1050_desc **desc,
689 
691 int adp1050_remove(struct adp1050_desc *desc);
692 
693 #endif
ADP1050_SR1_SR2_MODULATION_SETTINGS
#define ADP1050_SR1_SR2_MODULATION_SETTINGS
Definition: adp1050.h:352
ADP1050_TRIM_PASSWORD
#define ADP1050_TRIM_PASSWORD
Definition: adp1050.h:269
ADP1050_OUTB_RISING_EDGE_TIMING
#define ADP1050_OUTB_RISING_EDGE_TIMING
Definition: adp1050.h:342
adp1050_remove
int adp1050_remove(struct adp1050_desc *desc)
Free the resources allocated by the adp1050_init()
Definition: adp1050.c:1172
ADP1050_71KHZ
@ ADP1050_71KHZ
Definition: adp1050.h:427
ADP1050_SR1_RISING_FALLING_TIMING_LSB
#define ADP1050_SR1_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:347
ADP1050_PULSE_SKIPPING_DISABLE
#define ADP1050_PULSE_SKIPPING_DISABLE
Definition: adp1050.h:157
adp1050_set_close_loop
int adp1050_set_close_loop(struct adp1050_desc *desc)
Set close loop operation.
Definition: adp1050.c:660
ADP1050_STATUS_CML
#define ADP1050_STATUS_CML
Definition: adp1050.h:235
adp1050_read_value
int adp1050_read_value(struct adp1050_desc *desc, uint16_t *mant, uint8_t *exp, enum adp1050_value_type val_type)
Read VIN/IIN/TEMP/DUTY_CYCLE/FREQ raw value from the ADP1050.
Definition: adp1050.c:212
ADP1050_195_5KHZ
@ ADP1050_195_5KHZ
Definition: adp1050.h:453
ADP1050_OPERATION_OFF
#define ADP1050_OPERATION_OFF
Definition: adp1050.h:80
no_os_alloc.h
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
ADP1050_OUTA_ON
#define ADP1050_OUTA_ON
Definition: adp1050.h:98
ADP1050_SOFTWARE_RESET_ON
#define ADP1050_SOFTWARE_RESET_ON
Definition: adp1050.h:63
ADP1050_ALL_PWM_OFF
#define ADP1050_ALL_PWM_OFF
Definition: adp1050.h:102
no_os_pwm_init_param
Structure containing the init parameters needed by the PWM generator.
Definition: no_os_pwm.h:72
adp1050_vout_margin
int adp1050_vout_margin(struct adp1050_desc *desc, uint16_t margin_high, uint16_t margin_low)
Set VOUT margins value.
Definition: adp1050.c:300
ADP1050_IIN_OC_FAST_FAULT_8
@ ADP1050_IIN_OC_FAST_FAULT_8
Definition: adp1050.h:482
ADP1050_VS_VOUT_TRIM
@ ADP1050_VS_VOUT_TRIM
Definition: adp1050.h:544
ADP1050_IIN_OC_FAST_FAULT_LIMIT
#define ADP1050_IIN_OC_FAST_FAULT_LIMIT
Definition: adp1050.h:307
ADP1050_SR2_ON
#define ADP1050_SR2_ON
Definition: adp1050.h:101
adp1050_read_vsense
int adp1050_read_vsense(struct adp1050_desc *desc, uint16_t *vsense)
Read Voltage Sense output raw value from the ADP1050.
Definition: adp1050.c:190
ADP1050_VS_MAX_INIT_VAL
#define ADP1050_VS_MAX_INIT_VAL
Definition: adp1050.h:164
ADP1050_GO_COMMANDS
#define ADP1050_GO_COMMANDS
Definition: adp1050.h:365
adp1050_init
int adp1050_init(struct adp1050_desc **desc, struct adp1050_init_param *init_param)
Initialize the ADP1050 device.
Definition: adp1050.c:1085
ADP1050_CL_FEEDFORWARD_DISABLE
#define ADP1050_CL_FEEDFORWARD_DISABLE
Definition: adp1050.h:152
ADP1050_142KHZ
@ ADP1050_142KHZ
Definition: adp1050.h:434
no_os_i2c_write
int32_t no_os_i2c_write(struct no_os_i2c_desc *desc, uint8_t *data, uint8_t bytes_number, uint8_t stop_bit)
I2C Write data to slave device.
Definition: no_os_i2c.c:165
no_os_i2c_init
int32_t no_os_i2c_init(struct no_os_i2c_desc **desc, const struct no_os_i2c_init_param *param)
Initialize the I2C communication peripheral.
Definition: no_os_i2c.c:58
ADP1050_OL_SS_64_CYCLES
#define ADP1050_OL_SS_64_CYCLES
Definition: adp1050.h:132
adp1050_trim_type
adp1050_trim_type
Definition: adp1050.h:542
ADP1050_DISABLE_SR1_SR2
@ ADP1050_DISABLE_SR1_SR2
Definition: adp1050.h:516
ADP1050_CS1_LEADING_EDGE_MASK
#define ADP1050_CS1_LEADING_EDGE_MASK
Definition: adp1050.h:110
ADP1050_164_5KHZ
@ ADP1050_164_5KHZ
Definition: adp1050.h:451
ADP1050_READ_FREQUENCY
#define ADP1050_READ_FREQUENCY
Definition: adp1050.h:241
ADP1050_FEEDFORWARD_OL_ENABLE
#define ADP1050_FEEDFORWARD_OL_ENABLE
Definition: adp1050.h:154
ADP1050_MAX_PERIOD_INTEGER
#define ADP1050_MAX_PERIOD_INTEGER(x)
Definition: adp1050.h:136
ADP1050_CTRL_PIN_ENABLE
#define ADP1050_CTRL_PIN_ENABLE
Definition: adp1050.h:61
ADP1050_215_5KHZ
@ ADP1050_215_5KHZ
Definition: adp1050.h:456
adp1050_mod
adp1050_mod
Definition: adp1050.h:409
adp1050_desc::syni_desc
struct no_os_pwm_desc * syni_desc
Definition: adp1050.h:567
ADP1050_OPERATION_ON
#define ADP1050_OPERATION_ON
Definition: adp1050.h:79
ADP1050_READ_TEMPERATURE
#define ADP1050_READ_TEMPERATURE
Definition: adp1050.h:239
ADP1050_CS1_DEBOUNCE_MASK
#define ADP1050_CS1_DEBOUNCE_MASK
Definition: adp1050.h:111
ADP1050_LEADING_EDGE_80NS
@ ADP1050_LEADING_EDGE_80NS
Definition: adp1050.h:499
ADP1050_DUTY_CYCLE
@ ADP1050_DUTY_CYCLE
Definition: adp1050.h:530
ADP1050_347KHZ
@ ADP1050_347KHZ
Definition: adp1050.h:442
ADP1050_IIN_OC_FAST_FAULT_512
@ ADP1050_IIN_OC_FAST_FAULT_512
Definition: adp1050.h:487
ADP1050_DEBOUNCE_0NS
@ ADP1050_DEBOUNCE_0NS
Definition: adp1050.h:508
ADP1050_SW_RES_DELAY_500MS
#define ADP1050_SW_RES_DELAY_500MS
Definition: adp1050.h:67
ADP1050_SR1_ON
#define ADP1050_SR1_ON
Definition: adp1050.h:100
ADP1050_CLOSE_LOOP
@ ADP1050_CLOSE_LOOP
Definition: adp1050.h:397
ADP1050_208_5KHZ
@ ADP1050_208_5KHZ
Definition: adp1050.h:455
adp1050_desc::ctrl_desc
struct no_os_gpio_desc * ctrl_desc
Definition: adp1050.h:569
ADP1050_IIN
@ ADP1050_IIN
Definition: adp1050.h:528
ADP1050_260_5KHZ
@ ADP1050_260_5KHZ
Definition: adp1050.h:459
ADP1050_OUTB_SR2_FALLING_MOD_MASK
#define ADP1050_OUTB_SR2_FALLING_MOD_MASK
Definition: adp1050.h:119
ADP1050_OUTB
@ ADP1050_OUTB
Definition: adp1050.h:403
no_os_pwm_remove
int32_t no_os_pwm_remove(struct no_os_pwm_desc *desc)
Free the resources allocated by no_os_pwm_init().
Definition: no_os_pwm.c:85
no_os_i2c_remove
int32_t no_os_i2c_remove(struct no_os_i2c_desc *desc)
Free the resources allocated by no_os_i2c_init().
Definition: no_os_i2c.c:119
ADP1050_97_5KHZ
@ ADP1050_97_5KHZ
Definition: adp1050.h:448
ADP1050_397KHZ
@ ADP1050_397KHZ
Definition: adp1050.h:445
no_os_units.h
Header file of Units.
ADP1050_VOUT_TR_12UV_US
@ ADP1050_VOUT_TR_12UV_US
Definition: adp1050.h:473
adp1050_desc::loop
enum adp1050_loop loop
Definition: adp1050.h:570
ADP1050_VS_OFFSET_MAX_INIT_VAL
#define ADP1050_VS_OFFSET_MAX_INIT_VAL
Definition: adp1050.h:163
ADP1050_184KHZ
@ ADP1050_184KHZ
Definition: adp1050.h:436
ADP1050_78KHZ
@ ADP1050_78KHZ
Definition: adp1050.h:428
ADP1050_OPERATION
#define ADP1050_OPERATION
Definition: adp1050.h:198
adp1050_read
int adp1050_read(struct adp1050_desc *desc, uint16_t command, uint8_t *data, uint8_t bytes_number)
Read data from ADP1050.
Definition: adp1050.c:80
ADP1050_LEADING_EDGE_800NS
@ ADP1050_LEADING_EDGE_800NS
Definition: adp1050.h:504
adp1050_read_vsense
int adp1050_read_vsense(struct adp1050_desc *desc, uint16_t *vsense)
Read Voltage Sense output raw value from the ADP1050.
Definition: adp1050.c:190
adp1050_write
int adp1050_write(struct adp1050_desc *desc, uint16_t command, uint16_t data, uint8_t bytes_number)
Write data to ADP1050.
Definition: adp1050.c:114
no_os_delay.h
Header file of Delay functions.
ADP1050_60KHZ
@ ADP1050_60KHZ
Definition: adp1050.h:425
ADP1050_CS1_TRIM_VAL
#define ADP1050_CS1_TRIM_VAL
Definition: adp1050.h:159
ADP1050_FREQUENCY_SWITCH
#define ADP1050_FREQUENCY_SWITCH
Definition: adp1050.h:216
ADP1050_STATUS_TEMPERATURE_TYPE
@ ADP1050_STATUS_TEMPERATURE_TYPE
Definition: adp1050.h:538
ADP1050_VF_GAIN_TRIM
#define ADP1050_VF_GAIN_TRIM
Definition: adp1050.h:317
adp1050_freq_sync
int adp1050_freq_sync(struct adp1050_desc *desc, bool state_on)
Frequency synchronization of the PWM clock with an external clock Requires syni_desc to be initialize...
Definition: adp1050.c:742
ADP1050_SYNCH_GENERAL_SETTINGS
#define ADP1050_SYNCH_GENERAL_SETTINGS
Definition: adp1050.h:301
ADP1050_VOUT_TR_200UV_US
@ ADP1050_VOUT_TR_200UV_US
Definition: adp1050.h:477
adp1050_init_param::i2c_param
struct no_os_i2c_init_param * i2c_param
Definition: adp1050.h:552
ADP1050_EDGE_MSB_MASK
#define ADP1050_EDGE_MSB_MASK
Definition: adp1050.h:105
adp1050_init_param::ctrl_param
struct no_os_gpio_init_param * ctrl_param
Definition: adp1050.h:556
ADP1050_NEGATIVE_MOD_SIGN
#define ADP1050_NEGATIVE_MOD_SIGN
Definition: adp1050.h:124
ADP1050_410KHZ
@ ADP1050_410KHZ
Definition: adp1050.h:447
adp1050_write
int adp1050_write(struct adp1050_desc *desc, uint16_t command, uint16_t data, uint8_t bytes_number)
Write data to ADP1050.
Definition: adp1050.c:114
ADP1050_REENABLE_PWM_SS
@ ADP1050_REENABLE_PWM_SS
Definition: adp1050.h:521
adp1050.h
Header file for the ADP1050 Driver.
adp1050_unlock_pass
int adp1050_unlock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Unlock CHIP/EEPROM/TRIM password.
Definition: adp1050.c:941
ADP1050_CONTINUE_NO_INTERRUPT
@ ADP1050_CONTINUE_NO_INTERRUPT
Definition: adp1050.h:515
adp1050_desc::i2c_desc
struct no_os_i2c_desc * i2c_desc
Definition: adp1050.h:565
ADP1050_LEADING_EDGE_120NS
@ ADP1050_LEADING_EDGE_120NS
Definition: adp1050.h:500
ADP1050_PULSE_SKIPPING_ENABLE
#define ADP1050_PULSE_SKIPPING_ENABLE
Definition: adp1050.h:156
ADP1050_NORMAL_MODE_COMP_POLE
#define ADP1050_NORMAL_MODE_COMP_POLE
Definition: adp1050.h:329
adp1050_vout_offset
int adp1050_vout_offset(struct adp1050_desc *desc, int16_t vout_offset)
Set output voltage offset.
Definition: adp1050.c:255
ADP1050_VOUT_TRANSITION_RATE
#define ADP1050_VOUT_TRANSITION_RATE
Definition: adp1050.h:213
adp1050_pwm_modulation
int adp1050_pwm_modulation(struct adp1050_desc *desc, enum adp1050_mod mod, enum adp1050_channel chan, bool sign)
Set PWM modulation for requested channel.
Definition: adp1050.c:422
adp1050_vout_margin
int adp1050_vout_margin(struct adp1050_desc *desc, uint16_t margin_high, uint16_t margin_low)
Set VOUT margins value.
Definition: adp1050.c:300
adp1050_iin_oc_fast_fault
adp1050_iin_oc_fast_fault
Definition: adp1050.h:480
ADP1050_357KHZ
@ ADP1050_357KHZ
Definition: adp1050.h:443
ADP1050_231_5KHZ
@ ADP1050_231_5KHZ
Definition: adp1050.h:457
ADP1050_MANT_MASK
#define ADP1050_MANT_MASK
Definition: adp1050.h:90
adp1050_change_pass
int adp1050_change_pass(struct adp1050_desc *desc, uint16_t old_pass, uint16_t new_pass, enum adp1050_pass_type pass_type)
Change the CHIP/EEPROM password. TRIM password is the same with EEPROM password.
Definition: adp1050.c:1028
no_os_calloc
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:60
ADP1050_AFTER_FAULT_MASK
#define ADP1050_AFTER_FAULT_MASK
Definition: adp1050.h:149
adp1050_pwm_duty_cycle
int adp1050_pwm_duty_cycle(struct adp1050_desc *desc, uint16_t pulse_width, uint16_t pulse_start, enum adp1050_channel chan)
Set VOUT duty cycle for requested channel.
Definition: adp1050.c:330
no_os_gpio_direction_input
int32_t no_os_gpio_direction_input(struct no_os_gpio_desc *desc)
Enable the input direction of the specified GPIO.
Definition: no_os_gpio.c:130
adp1050_trim
int adp1050_trim(struct adp1050_desc *desc, enum adp1050_trim_type trim_type, uint16_t vout_command, uint16_t vout_scale, uint16_t trim_val)
Trim IIN(CS1 pin)/VIN(VF pin)/VOUT(VS pin).
Definition: adp1050.c:818
adp1050_init_param::pg_alt_param
struct no_os_gpio_init_param * pg_alt_param
Definition: adp1050.h:553
ADP1050_FREQUENCY
@ ADP1050_FREQUENCY
Definition: adp1050.h:531
adp1050_set_climit
int adp1050_set_climit(struct adp1050_desc *desc, enum adp1050_iin_oc_fast_fault fast_fault, enum adp1050_climit_ref climit_ref)
Set current limit fast fault for overcurrent protection and current limit cycle-by-cycle reference.
Definition: adp1050.c:547
adp1050_vout_offset
int adp1050_vout_offset(struct adp1050_desc *desc, int16_t vout_offset)
Set output voltage offset.
Definition: adp1050.c:255
ADP1050_READ_VIN
#define ADP1050_READ_VIN
Definition: adp1050.h:236
adp1050_init_param::on_off_config
uint8_t on_off_config
Definition: adp1050.h:557
adp1050_vout_value
int adp1050_vout_value(struct adp1050_desc *desc, uint16_t vout_command, uint16_t vout_max)
Set VOUT_COMMAND and VOUT_MAX values.
Definition: adp1050.c:237
ADP1050_MAX_PERIOD_FLOAT
#define ADP1050_MAX_PERIOD_FLOAT(x)
Definition: adp1050.h:137
ADP1050_DEBOUNCE_40NS
@ ADP1050_DEBOUNCE_40NS
Definition: adp1050.h:509
ADP1050_149KHZ
@ ADP1050_149KHZ
Definition: adp1050.h:435
ADP1050_LEADING_EDGE_400NS
@ ADP1050_LEADING_EDGE_400NS
Definition: adp1050.h:502
adp1050_set_pwm
int adp1050_set_pwm(struct adp1050_desc *desc, enum adp1050_channel chan, enum adp1050_freq freq)
Set PWM channel and frequency.
Definition: adp1050.c:477
NO_OS_GPIO_LOW
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
ADP1050_FLAG_REGISTER3
#define ADP1050_FLAG_REGISTER3
Definition: adp1050.h:381
adp1050_desc::flgi_desc
struct no_os_gpio_desc * flgi_desc
Definition: adp1050.h:568
ADP1050_FLOAT_FREQ_MASK
#define ADP1050_FLOAT_FREQ_MASK
Definition: adp1050.h:138
ADP1050_FLAG_REGISTER1
#define ADP1050_FLAG_REGISTER1
Definition: adp1050.h:379
adp1050_freq_sync
int adp1050_freq_sync(struct adp1050_desc *desc, bool state_on)
Frequency synchronization of the PWM clock with an external clock Requires syni_desc to be initialize...
Definition: adp1050.c:742
ADP1050_SOFTWARE_RESET_SETTINGS
#define ADP1050_SOFTWARE_RESET_SETTINGS
Definition: adp1050.h:288
ADP1050_VOUT_MAX
#define ADP1050_VOUT_MAX
Definition: adp1050.h:210
adp1050_vout_tr
int adp1050_vout_tr(struct adp1050_desc *desc, enum adp1050_vout_tr vout_tr)
Set ADP1050 VOUT transition rate.
Definition: adp1050.c:266
no_os_mdelay
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
ADP1050_IIN_OC_FAST_FAULT_1024
@ ADP1050_IIN_OC_FAST_FAULT_1024
Definition: adp1050.h:488
no_os_field_prep
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)
ADP1050_320_5KHZ
@ ADP1050_320_5KHZ
Definition: adp1050.h:463
ADP1050_IIN_OC_FAST_FAULT_256
@ ADP1050_IIN_OC_FAST_FAULT_256
Definition: adp1050.h:486
ADP1050_VOUT_MARGIN_LOW
#define ADP1050_VOUT_MARGIN_LOW
Definition: adp1050.h:212
ADP1050_FEEDFORWARD_OFF
#define ADP1050_FEEDFORWARD_OFF
Definition: adp1050.h:151
adp1050_lock_pass
int adp1050_lock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Lock CHIP/EEPROM password. TRIM passwor dis locked of the EEPROM password is locked.
Definition: adp1050.c:1005
adp1050_value_type
adp1050_value_type
Definition: adp1050.h:526
ADP1050_271_5KHZ
@ ADP1050_271_5KHZ
Definition: adp1050.h:460
no_os_error.h
Error codes definition.
adp1050_loop
adp1050_loop
Definition: adp1050.h:396
ADP1050_SR2_FALLING_EDGE_TIMING
#define ADP1050_SR2_FALLING_EDGE_TIMING
Definition: adp1050.h:349
adp1050_set_cs1_settings
int adp1050_set_cs1_settings(struct adp1050_desc *desc, enum adp1050_cs1_leading_edge leading_edge, enum adp1050_cs1_debounce debounce, bool ignore)
Set current sense settings.
Definition: adp1050.c:570
ADP1050_VF_TRIM_VAL
#define ADP1050_VF_TRIM_VAL
Definition: adp1050.h:161
ADP1050_OUTB_SR2_RISING_MOD
@ ADP1050_OUTB_SR2_RISING_MOD
Definition: adp1050.h:413
ADP1050_VOUT_TR_100UV_US
@ ADP1050_VOUT_TR_100UV_US
Definition: adp1050.h:476
ADP1050_VIN
@ ADP1050_VIN
Definition: adp1050.h:527
adp1050_pulse_skipping
int adp1050_pulse_skipping(struct adp1050_desc *desc, uint8_t pulse_threshold, bool state_on)
Enable or disbale the pulse skipping mode.
Definition: adp1050.c:687
ADP1050_DISABLE_ALL_PWM
@ ADP1050_DISABLE_ALL_PWM
Definition: adp1050.h:517
ADP1050_OUTA_RISING_EDGE_TIMING
#define ADP1050_OUTA_RISING_EDGE_TIMING
Definition: adp1050.h:339
adp1050_remove
int adp1050_remove(struct adp1050_desc *desc)
Free the resources allocated by the adp1050_init()
Definition: adp1050.c:1172
ADP1050_65KHZ
@ ADP1050_65KHZ
Definition: adp1050.h:426
adp1050_trim
int adp1050_trim(struct adp1050_desc *desc, enum adp1050_trim_type trim_type, uint16_t vout_command, uint16_t vout_scale, uint16_t trim_val)
Trim IIN(CS1 pin)/VIN(VF pin)/VOUT(VS pin).
Definition: adp1050.c:818
ADP1050_LEADING_EDGE_0NS
@ ADP1050_LEADING_EDGE_0NS
Definition: adp1050.h:497
adp1050_software_reset
int adp1050_software_reset(struct adp1050_desc *desc)
Software reset the ADP1050.
Definition: adp1050.c:1064
ADP1050_OUTB_ON
#define ADP1050_OUTB_ON
Definition: adp1050.h:99
ADP1050_OUTB_RISING_FALLING_TIMING_LSB
#define ADP1050_OUTB_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:344
adp1050_filter
int adp1050_filter(struct adp1050_desc *desc, uint8_t zero, uint8_t pole, uint8_t lf, uint8_t hf)
Adjust filter settings of the normal mode compensator.
Definition: adp1050.c:782
ADP1050_130KHZ
@ ADP1050_130KHZ
Definition: adp1050.h:432
ADP1050_403KHZ
@ ADP1050_403KHZ
Definition: adp1050.h:446
ADP1050_READ_IIN
#define ADP1050_READ_IIN
Definition: adp1050.h:237
ADP1050_SR2_RISING_FALLING_TIMING_LSB
#define ADP1050_SR2_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:350
adp1050_set_climit
int adp1050_set_climit(struct adp1050_desc *desc, enum adp1050_iin_oc_fast_fault fast_fault, enum adp1050_climit_ref climit_ref)
Set current limit fast fault for overcurrent protection and current limit cycle-by-cycle reference.
Definition: adp1050.c:547
ADP1050_379KHZ
@ ADP1050_379KHZ
Definition: adp1050.h:444
ADP1050_TEMP
@ ADP1050_TEMP
Definition: adp1050.h:529
ADP1050_VIN_ON
#define ADP1050_VIN_ON
Definition: adp1050.h:217
ADP1050_201_5KHZ
@ ADP1050_201_5KHZ
Definition: adp1050.h:454
adp1050_init_param::ext_syni
bool ext_syni
Definition: adp1050.h:558
ADP1050_CS1_MAX_INIT_VAL
#define ADP1050_CS1_MAX_INIT_VAL
Definition: adp1050.h:160
ADP1050_297_5KHZ
@ ADP1050_297_5KHZ
Definition: adp1050.h:461
ADP1050_NORMAL_MODE_COMP_LOW_FREQ
#define ADP1050_NORMAL_MODE_COMP_LOW_FREQ
Definition: adp1050.h:327
ADP1050_VOUT_TR_50UV_US
@ ADP1050_VOUT_TR_50UV_US
Definition: adp1050.h:475
adp1050_init_param::syni_param
struct no_os_pwm_init_param * syni_param
Definition: adp1050.h:554
ADP1050_FALLING_EDGE_LSB_MASK
#define ADP1050_FALLING_EDGE_LSB_MASK
Definition: adp1050.h:107
ADP1050_LEADING_EDGE_600NS
@ ADP1050_LEADING_EDGE_600NS
Definition: adp1050.h:503
adp1050_set_feedforward
int adp1050_set_feedforward(struct adp1050_desc *desc, bool state_on)
Enable or disable voltage input feedforward for edge modulation.
Definition: adp1050.c:718
ADP1050_CHECK_EEPROM_PASS_MASK
#define ADP1050_CHECK_EEPROM_PASS_MASK
Definition: adp1050.h:142
adp1050_flgi_after_fault
adp1050_flgi_after_fault
Definition: adp1050.h:520
ADP1050_CLIMIT_REF_250MV
@ ADP1050_CLIMIT_REF_250MV
Definition: adp1050.h:493
ADP1050_OUTB_SR2_FALLING_MOD
@ ADP1050_OUTB_SR2_FALLING_MOD
Definition: adp1050.h:412
ADP1050_VOUT_SCALE_MONITOR
#define ADP1050_VOUT_SCALE_MONITOR
Definition: adp1050.h:215
ADP1050_338KHZ
@ ADP1050_338KHZ
Definition: adp1050.h:441
adp1050_change_pass
int adp1050_change_pass(struct adp1050_desc *desc, uint16_t old_pass, uint16_t new_pass, enum adp1050_pass_type pass_type)
Change the CHIP/EEPROM password. TRIM password is the same with EEPROM password.
Definition: adp1050.c:1028
ADP1050_SW_RES_NO_DELAY
#define ADP1050_SW_RES_NO_DELAY
Definition: adp1050.h:71
ADP1050_FLAGIN_RESPONSE
#define ADP1050_FLAGIN_RESPONSE
Definition: adp1050.h:283
ADP1050_VF_VIN_TRIM
@ ADP1050_VF_VIN_TRIM
Definition: adp1050.h:545
adp1050_set_cs1_settings
int adp1050_set_cs1_settings(struct adp1050_desc *desc, enum adp1050_cs1_leading_edge leading_edge, enum adp1050_cs1_debounce debounce, bool ignore)
Set current sense settings.
Definition: adp1050.c:570
adp1050_status_type
adp1050_status_type
Definition: adp1050.h:534
adp1050_cs1_leading_edge
adp1050_cs1_leading_edge
Definition: adp1050.h:496
ADP1050_REENABLE_PWM_WITH_PSON
@ ADP1050_REENABLE_PWM_WITH_PSON
Definition: adp1050.h:523
ADP1050_223KHZ
@ ADP1050_223KHZ
Definition: adp1050.h:437
adp1050_init_param::flgi_param
struct no_os_gpio_init_param * flgi_param
Definition: adp1050.h:555
adp1050_vout_value
int adp1050_vout_value(struct adp1050_desc *desc, uint16_t vout_command, uint16_t vout_max)
Set VOUT_COMMAND and VOUT_MAX values.
Definition: adp1050.c:237
ADP1050_CS1_IIN_TRIM
@ ADP1050_CS1_IIN_TRIM
Definition: adp1050.h:543
ADP1050_RISING_EDGE_LSB_MASK
#define ADP1050_RISING_EDGE_LSB_MASK
Definition: adp1050.h:106
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:110
ADP1050_STATUS_INPUT
#define ADP1050_STATUS_INPUT
Definition: adp1050.h:233
ADP1050_MANT_MAX
#define ADP1050_MANT_MAX
Definition: adp1050.h:87
ADP1050_VIN_OFF
#define ADP1050_VIN_OFF
Definition: adp1050.h:218
ADP1050_READ_DUTY_CYCLE
#define ADP1050_READ_DUTY_CYCLE
Definition: adp1050.h:240
ADP1050_STATUS_WORD_TYPE
@ ADP1050_STATUS_WORD_TYPE
Definition: adp1050.h:537
ADP1050_MSB_MASK
#define ADP1050_MSB_MASK
Definition: adp1050.h:55
adp1050_read_status
int adp1050_read_status(struct adp1050_desc *desc, enum adp1050_status_type status, uint16_t *status_val)
Read statuses.
Definition: adp1050.c:151
ADP1050_LEADING_EDGE_40NS
@ ADP1050_LEADING_EDGE_40NS
Definition: adp1050.h:498
ADP1050_CHIP_PASSWORD
#define ADP1050_CHIP_PASSWORD
Definition: adp1050.h:270
ADP1050_SR1_FALLING_EDGE_TIMING
#define ADP1050_SR1_FALLING_EDGE_TIMING
Definition: adp1050.h:346
ADP1050_STATUS_VOUT
#define ADP1050_STATUS_VOUT
Definition: adp1050.h:232
adp1050_channel
adp1050_channel
Definition: adp1050.h:401
ADP1050_STORE_USER_ALL
#define ADP1050_STORE_USER_ALL
Definition: adp1050.h:203
adp1050_freq
adp1050_freq
Definition: adp1050.h:422
ADP1050_DEBOUNCE_80NS
@ ADP1050_DEBOUNCE_80NS
Definition: adp1050.h:510
ADP1050_DEBOUNCE_120NS
@ ADP1050_DEBOUNCE_120NS
Definition: adp1050.h:511
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
ADP1050_IIN_OC_FAST_FAULT_64
@ ADP1050_IIN_OC_FAST_FAULT_64
Definition: adp1050.h:484
ADP1050_OUTA
@ ADP1050_OUTA
Definition: adp1050.h:402
ADP1050_329KHZ
@ ADP1050_329KHZ
Definition: adp1050.h:440
ADP1050_VOUT_MARGIN_HIGH
#define ADP1050_VOUT_MARGIN_HIGH
Definition: adp1050.h:211
ADP1050_EEPROM_DEFAULT_PASS
#define ADP1050_EEPROM_DEFAULT_PASS
Definition: adp1050.h:143
adp1050_set_close_loop
int adp1050_set_close_loop(struct adp1050_desc *desc)
Set close loop operation.
Definition: adp1050.c:660
ADP1050_FEEDFORWARD_CL_ENABLE
#define ADP1050_FEEDFORWARD_CL_ENABLE
Definition: adp1050.h:153
adp1050_lock_pass
int adp1050_lock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Lock CHIP/EEPROM password. TRIM passwor dis locked of the EEPROM password is locked.
Definition: adp1050.c:1005
no_os_pwm_desc
Structure representing an PWM generator device.
Definition: no_os_pwm.h:99
ADP1050_CLIMIT_REF_1200MV
@ ADP1050_CLIMIT_REF_1200MV
Definition: adp1050.h:492
adp1050_desc
Device descriptor for ADP1050.
Definition: adp1050.h:564
ADP1050_MODULATION_LIMIT
#define ADP1050_MODULATION_LIMIT
Definition: adp1050.h:335
adp1050_set_feedforward
int adp1050_set_feedforward(struct adp1050_desc *desc, bool state_on)
Enable or disable voltage input feedforward for edge modulation.
Definition: adp1050.c:718
adp1050_pulse_skipping
int adp1050_pulse_skipping(struct adp1050_desc *desc, uint8_t pulse_threshold, bool state_on)
Enable or disbale the pulse skipping mode.
Definition: adp1050.c:687
ADP1050_EXP_MAX
#define ADP1050_EXP_MAX
Definition: adp1050.h:88
no_os_i2c_desc
Structure holding I2C address descriptor.
Definition: no_os_i2c.h:107
ADP1050_87KHZ
@ ADP1050_87KHZ
Definition: adp1050.h:429
no_os_pwm_init
int32_t no_os_pwm_init(struct no_os_pwm_desc **desc, const struct no_os_pwm_init_param *param)
Initialize the PWM peripheral.
Definition: no_os_pwm.c:57
ADP1050_VIN_SCALE_MONITOR
#define ADP1050_VIN_SCALE_MONITOR
Definition: adp1050.h:271
ADP1050_VOUT_TR_INFINITE
@ ADP1050_VOUT_TR_INFINITE
Definition: adp1050.h:469
ADP1050_49KHZ
@ ADP1050_49KHZ
Definition: adp1050.h:423
ADP1050_READ_VOUT
#define ADP1050_READ_VOUT
Definition: adp1050.h:238
no_os_i2c_read
int32_t no_os_i2c_read(struct no_os_i2c_desc *desc, uint8_t *data, uint8_t bytes_number, uint8_t stop_bit)
I2C Read data from slave device.
Definition: no_os_i2c.c:196
ADP1050_STATUS_CML_TYPE
@ ADP1050_STATUS_CML_TYPE
Definition: adp1050.h:539
ADP1050_STATUS_VOUT_TYPE
@ ADP1050_STATUS_VOUT_TYPE
Definition: adp1050.h:535
adp1050_unlock_pass
int adp1050_unlock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Unlock CHIP/EEPROM/TRIM password.
Definition: adp1050.c:941
no_os_i2c.h
Header file of I2C Interface.
ADP1050_SOFTWARE_RESET_GO
#define ADP1050_SOFTWARE_RESET_GO
Definition: adp1050.h:287
no_os_pwm.h
Header file of PWM Interface.
ADP1050_390_5KHZ
@ ADP1050_390_5KHZ
Definition: adp1050.h:465
ADP1050_OUTB_FALLING_EDGE_TIMING
#define ADP1050_OUTB_FALLING_EDGE_TIMING
Definition: adp1050.h:343
ADP1050_156_5KHZ
@ ADP1050_156_5KHZ
Definition: adp1050.h:450
no_os_field_get
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
ADP1050_LEADING_EDGE_200NS
@ ADP1050_LEADING_EDGE_200NS
Definition: adp1050.h:501
ADP1050_CHECK_CHIP_PASS_MASK
#define ADP1050_CHECK_CHIP_PASS_MASK
Definition: adp1050.h:140
adp1050_flgi_fault_response
adp1050_flgi_fault_response
Definition: adp1050.h:514
ADP1050_VS_INIT_MASK
#define ADP1050_VS_INIT_MASK
Definition: adp1050.h:165
ADP1050_CS1_CLIMIT_COMP_IGNORE
#define ADP1050_CS1_CLIMIT_COMP_IGNORE
Definition: adp1050.h:109
adp1050_pwm_duty_cycle
int adp1050_pwm_duty_cycle(struct adp1050_desc *desc, uint16_t pulse_width, uint16_t pulse_start, enum adp1050_channel chan)
Set VOUT duty cycle for requested channel.
Definition: adp1050.c:330
NO_OS_BIT
#define NO_OS_BIT(x)
Definition: no_os_util.h:51
no_os_free
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:75
adp1050_vout_tr
adp1050_vout_tr
Definition: adp1050.h:468
ADP1050_VOUT_CAL_OFFSET
#define ADP1050_VOUT_CAL_OFFSET
Definition: adp1050.h:209
ADP1050_NORMAL_MODE_COMP_HIGH_FREQ
#define ADP1050_NORMAL_MODE_COMP_HIGH_FREQ
Definition: adp1050.h:330
no_os_get_unaligned_le16
uint16_t no_os_get_unaligned_le16(uint8_t *buf)
ADP1050_DISABLE_ALL
@ ADP1050_DISABLE_ALL
Definition: adp1050.h:406
ADP1050_OUTA_SR1_RISING_MOD
@ ADP1050_OUTA_SR1_RISING_MOD
Definition: adp1050.h:411
ADP1050_VOUT_COMMAND
#define ADP1050_VOUT_COMMAND
Definition: adp1050.h:207
ADP1050_SR1
@ ADP1050_SR1
Definition: adp1050.h:404
ADP1050_SOFT_START_SETTING_OL
#define ADP1050_SOFT_START_SETTING_OL
Definition: adp1050.h:290
ADP1050_250KHZ
@ ADP1050_250KHZ
Definition: adp1050.h:438
ADP1050_EEPROM_PASSWORD
#define ADP1050_EEPROM_PASSWORD
Definition: adp1050.h:268
ADP1050_OUTA_SR1_FALLING_MOD_MASK
#define ADP1050_OUTA_SR1_FALLING_MOD_MASK
Definition: adp1050.h:121
ADP1050_IIN_OC_FAST_FAULT_16
@ ADP1050_IIN_OC_FAST_FAULT_16
Definition: adp1050.h:483
adp1050_desc::pg_alt_desc
struct no_os_gpio_desc * pg_alt_desc
Definition: adp1050.h:566
ADP1050_EEPROM_PASS
@ ADP1050_EEPROM_PASS
Definition: adp1050.h:418
ADP1050_VOUT_TR_3125NV_US
@ ADP1050_VOUT_TR_3125NV_US
Definition: adp1050.h:471
no_os_i2c_init_param
Structure holding the parameters for I2C initialization.
Definition: no_os_i2c.h:70
NULL
#define NULL
Definition: wrapper.h:64
ADP1050_FEEDFORWARD_SS_FILTER_GAIN
#define ADP1050_FEEDFORWARD_SS_FILTER_GAIN
Definition: adp1050.h:336
ADP1050_OUTA_FALLING_EDGE_TIMING
#define ADP1050_OUTA_FALLING_EDGE_TIMING
Definition: adp1050.h:340
ADP1050_367_5KHZ
@ ADP1050_367_5KHZ
Definition: adp1050.h:464
ADP1050_OUTA_OUTB_MODULATION_SETTINGS
#define ADP1050_OUTA_OUTB_MODULATION_SETTINGS
Definition: adp1050.h:351
ADP1050_VS_GAIN_TRIM
#define ADP1050_VS_GAIN_TRIM
Definition: adp1050.h:314
ADP1050_OUTB_SR2_RISING_MOD_MASK
#define ADP1050_OUTB_SR2_RISING_MOD_MASK
Definition: adp1050.h:118
init_param
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:119
adp1050_climit_ref
adp1050_climit_ref
Definition: adp1050.h:491
ADP1050_VF_MAX_INIT_VAL
#define ADP1050_VF_MAX_INIT_VAL
Definition: adp1050.h:162
adp1050_read_status
int adp1050_read_status(struct adp1050_desc *desc, enum adp1050_status_type status, uint16_t *status_val)
Read statuses.
Definition: adp1050.c:151
ADP1050_EXP_MASK
#define ADP1050_EXP_MASK
Definition: adp1050.h:89
adp1050_set_vin
int adp1050_set_vin(struct adp1050_desc *desc, int16_t mantissa, int8_t exp, bool state_on)
Set ADP1050 VIN on/off raw value for input voltage limiting.
Definition: adp1050.c:525
ADP1050_PULSE_SKIPPING_MODE_THR
#define ADP1050_PULSE_SKIPPING_MODE_THR
Definition: adp1050.h:371
adp1050_cs1_debounce
adp1050_cs1_debounce
Definition: adp1050.h:507
ADP1050_OPEN_LOOP_ENABLE
#define ADP1050_OPEN_LOOP_ENABLE
Definition: adp1050.h:126
adp1050_vout_scale
int adp1050_vout_scale(struct adp1050_desc *desc, int8_t exp, uint16_t mant)
Set ADP1050 VOUT scale, regarding the resistor divider assigned to the VS pins.
Definition: adp1050.c:279
ADP1050_59KHZ
@ ADP1050_59KHZ
Definition: adp1050.h:424
ADP1050_240_5KHZ
@ ADP1050_240_5KHZ
Definition: adp1050.h:458
adp1050_set_open_loop
int adp1050_set_open_loop(struct adp1050_desc *desc, uint8_t rising_edge, uint8_t falling_edge, enum adp1050_channel chan)
Set requested ADP1050 channel in Open Loop operation mode.
Definition: adp1050.c:595
adp1050_send_command
int adp1050_send_command(struct adp1050_desc *desc, uint16_t command)
Send command byte/word to ADP1050.
Definition: adp1050.c:52
ADP1050_OPEN_LOOP_DISABLE
#define ADP1050_OPEN_LOOP_DISABLE
Definition: adp1050.h:127
ADP1050_IIN_OC_FAST_FAULT_128
@ ADP1050_IIN_OC_FAST_FAULT_128
Definition: adp1050.h:485
adp1050_software_reset
int adp1050_software_reset(struct adp1050_desc *desc)
Software reset the ADP1050.
Definition: adp1050.c:1064
ADP1050_111_5KHZ
@ ADP1050_111_5KHZ
Definition: adp1050.h:449
no_os_gpio.h
Header file of GPIO Interface.
ADP1050_312_5KHZ
@ ADP1050_312_5KHZ
Definition: adp1050.h:462
adp1050_filter
int adp1050_filter(struct adp1050_desc *desc, uint8_t zero, uint8_t pole, uint8_t lf, uint8_t hf)
Adjust filter settings of the normal mode compensator.
Definition: adp1050.c:782
adp1050_pass_type
adp1050_pass_type
Definition: adp1050.h:416
ADP1050_FAULT_RESPONSE_MASK
#define ADP1050_FAULT_RESPONSE_MASK
Definition: adp1050.h:148
ADP1050_SR2_RISING_EDGE_TIMING
#define ADP1050_SR2_RISING_EDGE_TIMING
Definition: adp1050.h:348
adp1050_pwm_modulation
int adp1050_pwm_modulation(struct adp1050_desc *desc, enum adp1050_mod mod, enum adp1050_channel chan, bool sign)
Set PWM modulation for requested channel.
Definition: adp1050.c:422
adp1050_set_flgi_response
int adp1050_set_flgi_response(struct adp1050_desc *desc, enum adp1050_flgi_fault_response fault_response, enum adp1050_flgi_after_fault after_fault)
Set FLAGIN response to FLGI pin signal.
Definition: adp1050.c:758
adp1050_send_command
int adp1050_send_command(struct adp1050_desc *desc, uint16_t command)
Send command byte/word to ADP1050.
Definition: adp1050.c:52
ADP1050_SR2
@ ADP1050_SR2
Definition: adp1050.h:405
ADP1050_ON_OFF_CONFIG
#define ADP1050_ON_OFF_CONFIG
Definition: adp1050.h:199
adp1050_init_param
Initialization parameter for the ADP1050 device.
Definition: adp1050.h:551
ADP1050_120KHZ
@ ADP1050_120KHZ
Definition: adp1050.h:431
ADP1050_PWM_OUTPUT_DISABLE
#define ADP1050_PWM_OUTPUT_DISABLE
Definition: adp1050.h:353
no_os_util.h
Header file of utility functions.
ADP1050_FREQ_SYNC_ON
#define ADP1050_FREQ_SYNC_ON
Definition: adp1050.h:134
adp1050_read_value
int adp1050_read_value(struct adp1050_desc *desc, uint16_t *mant, uint8_t *exp, enum adp1050_value_type val_type)
Read VIN/IIN/TEMP/DUTY_CYCLE/FREQ raw value from the ADP1050.
Definition: adp1050.c:212
ADP1050_OUTA_SR1_FALLING_MOD
@ ADP1050_OUTA_SR1_FALLING_MOD
Definition: adp1050.h:410
ADP1050_104KHZ
@ ADP1050_104KHZ
Definition: adp1050.h:430
ADP1050_VOUT_TR_6250NV_US
@ ADP1050_VOUT_TR_6250NV_US
Definition: adp1050.h:472
ADP1050_OUTA_SR1_RISING_MOD_MASK
#define ADP1050_OUTA_SR1_RISING_MOD_MASK
Definition: adp1050.h:120
adp1050_set_flgi_response
int adp1050_set_flgi_response(struct adp1050_desc *desc, enum adp1050_flgi_fault_response fault_response, enum adp1050_flgi_after_fault after_fault)
Set FLAGIN response to FLGI pin signal.
Definition: adp1050.c:758
ADP1050_CS1_GAIN_TRIM
#define ADP1050_CS1_GAIN_TRIM
Definition: adp1050.h:305
ADP1050_VOUT_TR_1562NV_US
@ ADP1050_VOUT_TR_1562NV_US
Definition: adp1050.h:470
ADP1050_CS1_CBC_CURR_LIM_REF
#define ADP1050_CS1_CBC_CURR_LIM_REF
Definition: adp1050.h:308
ADP1050_FREQ_SYNC_OFF
#define ADP1050_FREQ_SYNC_OFF
Definition: adp1050.h:135
adp1050_set_pwm
int adp1050_set_pwm(struct adp1050_desc *desc, enum adp1050_channel chan, enum adp1050_freq freq)
Set PWM channel and frequency.
Definition: adp1050.c:477
ADP1050_SR1_RISING_EDGE_TIMING
#define ADP1050_SR1_RISING_EDGE_TIMING
Definition: adp1050.h:345
adp1050_init
int adp1050_init(struct adp1050_desc **desc, struct adp1050_init_param *init_param)
Initialize the ADP1050 device.
Definition: adp1050.c:1085
adp1050_set_vin
int adp1050_set_vin(struct adp1050_desc *desc, int16_t mantissa, int8_t exp, bool state_on)
Set ADP1050 VIN on/off raw value for input voltage limiting.
Definition: adp1050.c:525
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:153
adp1050_desc::freq
enum adp1050_freq freq
Definition: adp1050.h:571
ADP1050_STATUS_WORD
#define ADP1050_STATUS_WORD
Definition: adp1050.h:231
ADP1050_VOUT_GO
#define ADP1050_VOUT_GO
Definition: adp1050.h:146
adp1050_vout_scale
int adp1050_vout_scale(struct adp1050_desc *desc, int8_t exp, uint16_t mant)
Set ADP1050 VOUT scale, regarding the resistor divider assigned to the VS pins.
Definition: adp1050.c:279
ADP1050_OPEN_LOOP
@ ADP1050_OPEN_LOOP
Definition: adp1050.h:398
ADP1050_CS1_CBC_CURR_LIM_SETTINGS
#define ADP1050_CS1_CBC_CURR_LIM_SETTINGS
Definition: adp1050.h:311
ADP1050_OL_OPERATION_SETTINGS
#define ADP1050_OL_OPERATION_SETTINGS
Definition: adp1050.h:370
adp1050_read
int adp1050_read(struct adp1050_desc *desc, uint16_t command, uint8_t *data, uint8_t bytes_number)
Read data from ADP1050.
Definition: adp1050.c:80
ADP1050_OUTA_RISING_FALLING_TIMING_LSB
#define ADP1050_OUTA_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:341
ADP1050_VOUT_TR_25UV_US
@ ADP1050_VOUT_TR_25UV_US
Definition: adp1050.h:474
ADP1050_TRIM_PASS
@ ADP1050_TRIM_PASS
Definition: adp1050.h:419
ADP1050_REENABLE_PWM
@ ADP1050_REENABLE_PWM
Definition: adp1050.h:522
adp1050_set_open_loop
int adp1050_set_open_loop(struct adp1050_desc *desc, uint8_t rising_edge, uint8_t falling_edge, enum adp1050_channel chan)
Set requested ADP1050 channel in Open Loop operation mode.
Definition: adp1050.c:595
ADP1050_284KHZ
@ ADP1050_284KHZ
Definition: adp1050.h:439
ADP1050_IIN_OC_FAST_FAULT_2
@ ADP1050_IIN_OC_FAST_FAULT_2
Definition: adp1050.h:481
ADP1050_CHIP_PASS
@ ADP1050_CHIP_PASS
Definition: adp1050.h:417
ADP1050_LSB_MASK
#define ADP1050_LSB_MASK
Definition: adp1050.h:54
ADP1050_173_5KHZ
@ ADP1050_173_5KHZ
Definition: adp1050.h:452
ADP1050_136KHZ
@ ADP1050_136KHZ
Definition: adp1050.h:433
ADP1050_POSITIVE_MOD_SIGN
#define ADP1050_POSITIVE_MOD_SIGN
Definition: adp1050.h:123
ADP1050_NORMAL_MODE_COMP_ZERO
#define ADP1050_NORMAL_MODE_COMP_ZERO
Definition: adp1050.h:328
ADP1050_STATUS_TEMPERATURE
#define ADP1050_STATUS_TEMPERATURE
Definition: adp1050.h:234
ADP1050_EXTENDED_COMMAND
#define ADP1050_EXTENDED_COMMAND
Definition: adp1050.h:51
ADP1050_STATUS_INPUT_TYPE
@ ADP1050_STATUS_INPUT_TYPE
Definition: adp1050.h:536
ADP1050_CLEAR_FAULTS
#define ADP1050_CLEAR_FAULTS
Definition: adp1050.h:200
no_os_gpio_get_optional
int32_t no_os_gpio_get_optional(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Get the value of an optional GPIO.
Definition: no_os_gpio.c:81