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33 #ifndef __ADP_1050_H__
34 #define __ADP_1050_H__
45 #define ADP1050_EXTENDED_COMMAND 0xFF
46 #define ADP1050_WRITE_BYTE_MAX_VAL 0xFF
48 #define ADP1050_LSB_MASK NO_OS_GENMASK(7, 0)
49 #define ADP1050_MSB_MASK NO_OS_GENMASK(15, 8)
51 #define ADP1050_ON_OFF_DEFAULT_CFG 0x00
52 #define ADP1050_ON_OFF_CTRL_HIGH_CFG 0x1E
53 #define ADP1050_ON_OFF_CTRL_LOW_CFG 0x1C
55 #define ADP1050_CTRL_PIN_ENABLE NO_OS_BIT(4)
57 #define ADP1050_SOFTWARE_RESET_ON 0x01
58 #define ADP1050_SOFTWARE_RESET_OFF 0x00
60 #define ADP1050_SW_RES_DELAY_0MS 0x00
61 #define ADP1050_SW_RES_DELAY_500MS 0x01
62 #define ADP1050_SW_RES_DELAY_1S 0x02
63 #define ADP1050_SW_RES_DELAY_2S 0x03
65 #define ADP1050_SW_RES_NO_DELAY 0x00
66 #define ADP1050_SW_RES_TOFF_DELAY 0x04
68 #define ADP1050_TOFF_DELAY_0MS 0x0000
69 #define ADP1050_TOFF_DELAY_50MS 0x0032
70 #define ADP1050_TOFF_DELAY_250MS 0x00FA
71 #define ADP1050_TOFF_DELAY_1000MS 0x03E8
73 #define ADP1050_OPERATION_ON 0x80
74 #define ADP1050_OPERATION_OFF 0x00
75 #define ADP1050_OPERATION_SOFT_OFF 0x40
77 #define ADP1050_MARGIN_OFF 0x00
78 #define ADP1050_MARGIN_LOW 0x10
79 #define ADP1050_MARGIN_HIGH 0x20
81 #define ADP1050_MANT_MAX 0x7FF
82 #define ADP1050_EXP_MAX 0x1F
83 #define ADP1050_EXP_MASK NO_OS_GENMASK(15, 11)
84 #define ADP1050_MANT_MASK NO_OS_GENMASK(10, 0)
86 #define ADP1050_VOUT_EXP_MASK NO_OS_GENMASK(4, 0)
87 #define ADP1050_VOUT_GO_COMMAND 0x06
88 #define ADP1050_VOUT_OFF 0x00
90 #define ADP1050_OUTA_FALLING_EDGE_NEGATIVE_MOD 0x03
91 #define ADP1050_OUTB_FALLING_EDGE_NEGATIVE_MOD 0x30
92 #define ADP1050_OUTA_ON 0x32
93 #define ADP1050_OUTB_ON 0x31
94 #define ADP1050_SR1_ON 0x23
95 #define ADP1050_SR2_ON 0x13
96 #define ADP1050_ALL_PWM_OFF 0x33
97 #define ADP1050_EDGE_MAX_VAL 0x0FFF
98 #define ADP1050_PULSE_MAX_VAL 0xFFFF
99 #define ADP1050_EDGE_MSB_MASK NO_OS_GENMASK(7, 0)
100 #define ADP1050_RISING_EDGE_LSB_MASK NO_OS_GENMASK(7, 4)
101 #define ADP1050_FALLING_EDGE_LSB_MASK NO_OS_GENMASK(3, 0)
103 #define ADP1050_CS1_CLIMIT_COMP_IGNORE 0x80
104 #define ADP1050_CS1_LEADING_EDGE_MASK NO_OS_GENMASK(6, 4)
105 #define ADP1050_CS1_DEBOUNCE_MASK NO_OS_GENMASK(1, 0)
107 #define ADP1050_OUTA_OL_ENABLE NO_OS_BIT(0)
108 #define ADP1050_OUTB_OL_ENABLE NO_OS_BIT(1)
109 #define ADP1050_SR1_OL_ENABLE NO_OS_BIT(4)
110 #define ADP1050_SR2_OL_ENABLE NO_OS_BIT(5)
112 #define ADP1050_OUTB_SR2_RISING_MOD_MASK NO_OS_GENMASK(7, 6)
113 #define ADP1050_OUTB_SR2_FALLING_MOD_MASK NO_OS_GENMASK(5, 4)
114 #define ADP1050_OUTA_SR1_RISING_MOD_MASK NO_OS_GENMASK(3, 2)
115 #define ADP1050_OUTA_SR1_FALLING_MOD_MASK NO_OS_GENMASK(1, 0)
117 #define ADP1050_POSITIVE_MOD_SIGN 0x02
118 #define ADP1050_NEGATIVE_MOD_SIGN 0x03
120 #define ADP1050_OPEN_LOOP_ENABLE NO_OS_GENMASK(5, 0)
121 #define ADP1050_OPEN_LOOP_DISABLE 0x00
123 #define ADP1050_OL_SS_1_CYCLE 0x84
124 #define ADP1050_OL_SS_4_CYCLES 0x8C
125 #define APD1050_OL_SS_16_CYCLES 0x94
126 #define ADP1050_OL_SS_64_CYCLES 0x9C
128 #define ADP1050_FREQ_SYNC_ON 0x48
129 #define ADP1050_FREQ_SYNC_OFF 0x49
130 #define ADP1050_MAX_PERIOD_INTEGER(x) ((1000 / (x)) * 1000)
131 #define ADP1050_MAX_PERIOD_FLOAT(x) ((1000 / (((x) - 0xF800) / 2)) * 1000)
132 #define ADP1050_FLOAT_FREQ_MASK NO_OS_BIT(15)
134 #define ADP1050_CHECK_CHIP_PASS_MASK NO_OS_BIT(7)
135 #define ADP1050_CHIP_DEFAULT_PASS 0xFFFF
136 #define ADP1050_CHECK_EEPROM_PASS_MASK NO_OS_BIT(3)
137 #define ADP1050_EEPROM_DEFAULT_PASS 0xFF
138 #define ADP1050_TRIM_DEFAULT_PASS 0xFF
140 #define ADP1050_VOUT_GO 0x06
142 #define ADP1050_FAULT_RESPONSE_MASK NO_OS_GENMASK(3, 2)
143 #define ADP1050_AFTER_FAULT_MASK NO_OS_GENMASK(1, 0)
145 #define ADP1050_FEEDFORWARD_OFF 0x00
146 #define ADP1050_CL_FEEDFORWARD_DISABLE NO_OS_BIT(3)
147 #define ADP1050_FEEDFORWARD_CL_ENABLE NO_OS_GENMASK(3, 2)
148 #define ADP1050_FEEDFORWARD_OL_ENABLE (NO_OS_BIT(6) | NO_OS_BIT(3))
150 #define ADP1050_PULSE_SKIPPING_ENABLE NO_OS_GENMASK(6, 0)
151 #define ADP1050_PULSE_SKIPPING_DISABLE NO_OS_GENMASK(5, 0)
153 #define ADP1050_CS1_TRIM_VAL 0xA00
154 #define ADP1050_CS1_MAX_INIT_VAL 0xFF
155 #define ADP1050_VF_TRIM_VAL 0x500
156 #define ADP1050_VF_MAX_INIT_VAL 0xFF
157 #define ADP1050_VS_OFFSET_MAX_INIT_VAL 0x7FFF
158 #define ADP1050_VS_MAX_INIT_VAL 0xFF
159 #define ADP1050_VS_INIT_MASK NO_OS_GENMASK(14, 0)
162 #define ADP1050_PMBUS_10KOHM_ADDRESS 0x70
163 #define ADP1050_PMBUS_31KOHM_ADDRESS 0x71
164 #define ADP1050_PMBUS_51KOHM_ADDRESS 0x72
165 #define ADP1050_PMBUS_71KOHM_ADDRESS 0x73
166 #define ADP1050_PMBUS_90KOHM_ADDRESS 0x74
167 #define ADP1050_PMBUS_110KOHM_ADDRESS 0x75
168 #define ADP1050_PMBUS_130KOHM_ADDRESS 0x76
169 #define ADP1050_PMBUS_150KOHM_ADDRESS 0x77
172 #define ADP1050_TON_DELAY_0MS 0x0000
173 #define ADP1050_TON_DELAY_10MS 0x000A
174 #define ADP1050_TON_DELAY_25MS 0x0019
175 #define ADP1050_TON_DELAY_50MS 0x0032
176 #define ADP1050_TON_DELAY_75MS 0x004B
177 #define ADP1050_TON_DELAY_100MS 0x0064
178 #define ADP1050_TON_DELAY_250MS 0x00FA
179 #define ADP1050_TON_DELAY_1000MS 0x03E8
182 #define ADP1050_TON_RISE_50US 0xC00D
183 #define ADP1050_TON_RISE_200US 0xD00D
184 #define ADP1050_TON_RISE_1750US 0xF007
185 #define ADP1050_TON_RISE_10MS 0xF815
186 #define ADP1050_TON_RISE_21MS 0x0015
187 #define ADP1050_TON_RISE_40MS 0xF0A1
188 #define ADP1050_TON_RISE_60MS 0x003C
189 #define ADP1050_TON_RISE_100MS 0x0064
192 #define ADP1050_OPERATION 0x01
193 #define ADP1050_ON_OFF_CONFIG 0x02
194 #define ADP1050_CLEAR_FAULTS 0x03
195 #define ADP1050_WRITE_PROTECT 0x10
196 #define ADP1050_RESTORE_DEFAULT_ALL 0x12
197 #define ADP1050_STORE_USER_ALL 0x15
198 #define ADP1050_RESTORE_USER_ALL 0x16
199 #define ADP1050_CAPABILITY 0x19
200 #define ADP1050_VOUT_MODE 0x20
201 #define ADP1050_VOUT_COMMAND 0x21
202 #define ADP1050_VOUT_TRIM 0x22
203 #define ADP1050_VOUT_CAL_OFFSET 0x23
204 #define ADP1050_VOUT_MAX 0x24
205 #define ADP1050_VOUT_MARGIN_HIGH 0x25
206 #define ADP1050_VOUT_MARGIN_LOW 0x26
207 #define ADP1050_VOUT_TRANSITION_RATE 0x27
208 #define ADP1050_VOUT_SCALE_LOOP 0x29
209 #define ADP1050_VOUT_SCALE_MONITOR 0x2A
210 #define ADP1050_FREQUENCY_SWITCH 0x33
211 #define ADP1050_VIN_ON 0x35
212 #define ADP1050_VIN_OFF 0x36
213 #define ADP1050_VOUT_OV_FAULT_LIMIT 0x40
214 #define ADP1050_VOUT_OV_FAULT_RESPONSE 0x41
215 #define ADP1050_VOUT_UV_FAULT_LIMIT 0x44
216 #define ADP1050_VOUT_UV_FAULT_RESPONSE 0x45
217 #define ADP1050_OT_FAULT_LIMIT 0x4F
218 #define ADP1050_OT_FAULT_RESPONSE 0x50
219 #define ADP1050_POWER_GOOD_ON 0x5E
220 #define ADP1050_POWER_GOOD_OFF 0x5F
221 #define ADP1050_TON_DELAY 0x60
222 #define ADP1050_TON_RISE 0x61
223 #define ADP1050_TOFF_DELAY 0x64
224 #define ADP1050_STATUS_BYTE 0x78
225 #define ADP1050_STATUS_WORD 0x79
226 #define ADP1050_STATUS_VOUT 0x7A
227 #define ADP1050_STATUS_INPUT 0x7C
228 #define ADP1050_STATUS_TEMPERATURE 0x7D
229 #define ADP1050_STATUS_CML 0x7E
230 #define ADP1050_READ_VIN 0x88
231 #define ADP1050_READ_IIN 0x89
232 #define ADP1050_READ_VOUT 0x8B
233 #define ADP1050_READ_TEMPERATURE 0x8D
234 #define ADP1050_READ_DUTY_CYCLE 0x94
235 #define ADP1050_READ_FREQUENCY 0x95
236 #define ADP1050_READ_PMBUS_REVISION 0x98
237 #define ADP1050_MFR_ID 0x99
238 #define ADP1050_MFR_MODEL 0x9A
239 #define ADP1050_MFR_REVISION 0x9B
240 #define ADP1050_IC_DEVICE_ID 0xAD
241 #define ADP1050_IC_DEVICE_REV 0xAE
242 #define ADP1050_EEPROM_DATA_00 0xB0
243 #define ADP1050_EEPROM_DATA_01 0xB1
244 #define ADP1050_EEPROM_DATA_02 0xB2
245 #define ADP1050_EEPROM_DATA_03 0xB3
246 #define ADP1050_EEPROM_DATA_04 0xB4
247 #define ADP1050_EEPROM_DATA_05 0xB5
248 #define ADP1050_EEPROM_DATA_06 0xB6
249 #define ADP1050_EEPROM_DATA_07 0xB7
250 #define ADP1050_EEPROM_DATA_08 0xB8
251 #define ADP1050_EEPROM_DATA_09 0xB9
252 #define ADP1050_EEPROM_DATA_10 0xBA
253 #define ADP1050_EEPROM_DATA_11 0xBB
254 #define ADP1050_EEPROM_DATA_12 0xBC
255 #define ADP1050_EEPROM_DATA_13 0xBD
256 #define ADP1050_EEPROM_DATA_14 0xBE
257 #define ADP1050_EEPROM_DATA_15 0xBF
258 #define ADP1050_EEPROM_CRC_CHKSUM 0xD1
259 #define ADP1050_EEPROM_NUM_RD_BYTES 0xD2
260 #define ADP1050_EEPROM_ADDR_OFFSET 0xD3
261 #define ADP1050_EEPROM_PAGE_ERASE 0xD4
262 #define ADP1050_EEPROM_PASSWORD 0xD5
263 #define ADP1050_TRIM_PASSWORD 0xD6
264 #define ADP1050_CHIP_PASSWORD 0xD7
265 #define ADP1050_VIN_SCALE_MONITOR 0xD8
266 #define ADP1050_IIN_SCALE_MONITOR 0xD9
267 #define ADP1050_EEPROM_INFO 0xF1
268 #define ADP1050_MFR_SPECIFIC_1 0xFA
269 #define ADP1050_MFR_SPECIFIC_2 0xFB
274 #define ADP1050_IIN_OC_FAST_FAULT_RESPONSE 0xFE00
275 #define ADP1050_CS3_OC_FAULT_RESPONSE 0xFE01
276 #define ADP1050_VIN_UV_FAULT_RESPONSE 0xFE02
277 #define ADP1050_FLAGIN_RESPONSE 0xFE03
278 #define ADP1050_VDD_OV_RESPONSE 0xFE05
281 #define ADP1050_SOFTWARE_RESET_GO 0xFE06
282 #define ADP1050_SOFTWARE_RESET_SETTINGS 0xFE07
283 #define ADP1050_SR_SOFT_START_SETTINGS 0xFE08
284 #define ADP1050_SOFT_START_SETTING_OL 0xFE09
287 #define ADP1050_FLAG_BLANKING_DURING_SS 0xFE0B
288 #define ADP1050_VS_BAL_BLANK_AND_SS_DISABLE 0xFE0C
289 #define ADP1050_PGOOD_MASK_SETTINGS 0xFE0D
290 #define ADP1050_PGOOD_FLAG_DEBOUNCE 0xFE0E
291 #define ADP1050_DEBOUNCE_TIME_PGOOD 0xFE0F
294 #define ADP1050_SYNCH_DELAY_TIME 0xFE11
295 #define ADP1050_SYNCH_GENERAL_SETTINGS 0xFE12
296 #define ADP1050_DUAL_END_TOPOLOGY_MODE 0xFE13
299 #define ADP1050_CS1_GAIN_TRIM 0xFE14
300 #define ADP1050_CS3_OC_DEBOUNCE 0xFE19
301 #define ADP1050_IIN_OC_FAST_FAULT_LIMIT 0xFE1A
302 #define ADP1050_CS1_CBC_CURR_LIM_REF 0xFE1B
303 #define ADP1050_MATCHED_CBC_CURR_LIM_SETTINGS 0xFE1D
304 #define ADP1050_SR1_SR2_RESPONSE_CBC_CURR_LIM 0xFE1E
305 #define ADP1050_CS1_CBC_CURR_LIM_SETTINGS 0xFE1F
308 #define ADP1050_VS_GAIN_TRIM 0xFE20
309 #define ADP1050_PREBIAS_START_UP_ENABLE 0xFE25
310 #define ADP1050_VOUT_OV_FAULT_FLAGE_DEBOUNCE 0xFE26
311 #define ADP1050_VF_GAIN_TRIM 0xFE28
312 #define ADP1050_VIN_ON_AND_VIN_OFF_DELAY 0xFE29
315 #define ADP1050_RTD_GAIN_TRIM 0xFE2A
316 #define ADP1050_RTD_OFFSET_TRIM_MSB 0xFE2B
317 #define ADP1050_RTD_CURRENT_SOURCE_SETTINGS 0xFE2D
318 #define ADP1050_OT_HYSTERESIS_SETTINGS 0xFE2F
321 #define ADP1050_NORMAL_MODE_COMP_LOW_FREQ 0xFE30
322 #define ADP1050_NORMAL_MODE_COMP_ZERO 0xFE31
323 #define ADP1050_NORMAL_MODE_COMP_POLE 0xFE32
324 #define ADP1050_NORMAL_MODE_COMP_HIGH_FREQ 0xFE33
325 #define ADP1050_CS1_THRESHOLD_VS_BALANCE 0xFE38
326 #define ADP1050_NOMINAL_MOD_VAL_PREBIAS 0xFE39
327 #define ADP1050_SR_DRIVER_DELAY 0xFE3A
328 #define ADP1050_PWM_180_PHASE_SHIFT_SETTINGS 0xFE3B
329 #define ADP1050_MODULATION_LIMIT 0xFE3C
330 #define ADP1050_FEEDFORWARD_SS_FILTER_GAIN 0xFE3D
333 #define ADP1050_OUTA_RISING_EDGE_TIMING 0xFE3E
334 #define ADP1050_OUTA_FALLING_EDGE_TIMING 0xFE3F
335 #define ADP1050_OUTA_RISING_FALLING_TIMING_LSB 0xFE40
336 #define ADP1050_OUTB_RISING_EDGE_TIMING 0xFE41
337 #define ADP1050_OUTB_FALLING_EDGE_TIMING 0xFE42
338 #define ADP1050_OUTB_RISING_FALLING_TIMING_LSB 0xFE43
339 #define ADP1050_SR1_RISING_EDGE_TIMING 0xFE4A
340 #define ADP1050_SR1_FALLING_EDGE_TIMING 0xFE4B
341 #define ADP1050_SR1_RISING_FALLING_TIMING_LSB 0xFE4C
342 #define ADP1050_SR2_RISING_EDGE_TIMING 0xFE4D
343 #define ADP1050_SR2_FALLING_EDGE_TIMING 0xFE4E
344 #define ADP1050_SR2_RISING_FALLING_TIMING_LSB 0xFE4F
345 #define ADP1050_OUTA_OUTB_MODULATION_SETTINGS 0xFE50
346 #define ADP1050_SR1_SR2_MODULATION_SETTINGS 0xFE52
347 #define ADP1050_PWM_OUTPUT_DISABLE 0xFE53
350 #define ADP1050_VS_BAL_CTRL_GENERAL_SETTINGS 0xFE54
351 #define ADP1050_VS_BAL_CTRL_OUTA_OUTB 0xFE55
352 #define ADP1050_VS_BAL_CTRL_SR1_SR2 0xFE57
355 #define ADP1050_DUTY_CYCLE_READING_SETTINGS 0xFE58
356 #define ADP1050_INPUT_VOLTAGE_COMP_MULT 0xFE59
359 #define ADP1050_GO_COMMANDS 0xFE61
360 #define ADP1050_CUSTOMIZED_REGISTERS 0xFE62
361 #define ADP1050_MOD_REF_MSB_OL_INV_FF 0xFE63
362 #define ADP1050_MOD_REF_LSB_OL_INV_FF 0xFE64
363 #define ADP1050_CURRENT_VALUE_UPDATE_RATE 0xFE65
364 #define ADP1050_OL_OPERATION_SETTINGS 0xFE67
365 #define ADP1050_PULSE_SKIPPING_MODE_THR 0xFE69
366 #define ADP1050_CS3_OC_FAULT_LIMIT 0xFE6A
367 #define ADP1050_MOD_THR_OVP_SELECTION 0xFE6B
368 #define ADP1050_MOD_FLAG_OVP_SELECTION 0xFE6C
369 #define ADP1050_OUTA_OUTB_ADJ_REF_SYNCH 0xFE6D
370 #define ADP1050_SR1_SR2_ADJ_REF_SYNCH 0xFE6F
373 #define ADP1050_FLAG_REGISTER1 0xFEA0
374 #define ADP1050_FLAG_REGISTER2 0xFEA1
375 #define ADP1050_FLAG_REGISTER3 0xFEA2
376 #define ADP1050_LATCHED_FLAG_REGISTER1 0xFEA3
377 #define ADP1050_LATCHED_FLAG_REGISTER2 0xFEA4
378 #define ADP1050_LATCHED_FLAG_REGISTER3 0xFEA5
379 #define ADP1050_FIRST_FLAG_ID 0xFEA6
382 #define ADP1050_CS1_VALUE 0xFEA7
383 #define ADP1050_CS3_VALUE 0xFEA9
384 #define ADP1050_VS_VALUE 0xFEAA
385 #define ADP1050_RTD_VALUE 0xFEAB
386 #define ADP1050_VF_VALUE 0xFEAC
387 #define ADP1050_DUTY_CYCLE_VALUE 0xFEAD
388 #define ADP1050_INPUT_POWER_VALUE 0xFEAE
573 uint8_t bytes_number);
577 uint8_t bytes_number);
582 uint16_t *status_val);
606 uint16_t margin_low);
659 uint8_t lf, uint8_t hf);
663 uint16_t vout_command, uint16_t vout_scale, uint16_t trim_val);
#define ADP1050_SR1_SR2_MODULATION_SETTINGS
Definition: adp1050.h:346
#define ADP1050_TRIM_PASSWORD
Definition: adp1050.h:263
#define ADP1050_OUTB_RISING_EDGE_TIMING
Definition: adp1050.h:336
int adp1050_remove(struct adp1050_desc *desc)
Free the resources allocated by the adp1050_init()
Definition: adp1050.c:1166
@ ADP1050_71KHZ
Definition: adp1050.h:421
#define ADP1050_SR1_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:341
#define ADP1050_PULSE_SKIPPING_DISABLE
Definition: adp1050.h:151
int adp1050_set_close_loop(struct adp1050_desc *desc)
Set close loop operation.
Definition: adp1050.c:654
#define ADP1050_STATUS_CML
Definition: adp1050.h:229
int adp1050_read_value(struct adp1050_desc *desc, uint16_t *mant, uint8_t *exp, enum adp1050_value_type val_type)
Read VIN/IIN/TEMP/DUTY_CYCLE/FREQ raw value from the ADP1050.
Definition: adp1050.c:206
@ ADP1050_195_5KHZ
Definition: adp1050.h:447
#define ADP1050_OPERATION_OFF
Definition: adp1050.h:74
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:79
#define ADP1050_OUTA_ON
Definition: adp1050.h:92
#define ADP1050_SOFTWARE_RESET_ON
Definition: adp1050.h:57
#define ADP1050_ALL_PWM_OFF
Definition: adp1050.h:96
Structure containing the init parameters needed by the PWM generator.
Definition: no_os_pwm.h:66
int adp1050_vout_margin(struct adp1050_desc *desc, uint16_t margin_high, uint16_t margin_low)
Set VOUT margins value.
Definition: adp1050.c:294
@ ADP1050_IIN_OC_FAST_FAULT_8
Definition: adp1050.h:476
@ ADP1050_VS_VOUT_TRIM
Definition: adp1050.h:538
#define ADP1050_IIN_OC_FAST_FAULT_LIMIT
Definition: adp1050.h:301
#define ADP1050_SR2_ON
Definition: adp1050.h:95
int adp1050_read_vsense(struct adp1050_desc *desc, uint16_t *vsense)
Read Voltage Sense output raw value from the ADP1050.
Definition: adp1050.c:184
#define ADP1050_VS_MAX_INIT_VAL
Definition: adp1050.h:158
#define ADP1050_GO_COMMANDS
Definition: adp1050.h:359
int adp1050_init(struct adp1050_desc **desc, struct adp1050_init_param *init_param)
Initialize the ADP1050 device.
Definition: adp1050.c:1079
#define ADP1050_CL_FEEDFORWARD_DISABLE
Definition: adp1050.h:146
@ ADP1050_142KHZ
Definition: adp1050.h:428
int32_t no_os_i2c_write(struct no_os_i2c_desc *desc, uint8_t *data, uint8_t bytes_number, uint8_t stop_bit)
I2C Write data to slave device.
Definition: no_os_i2c.c:159
int32_t no_os_i2c_init(struct no_os_i2c_desc **desc, const struct no_os_i2c_init_param *param)
Initialize the I2C communication peripheral.
Definition: no_os_i2c.c:52
#define ADP1050_OL_SS_64_CYCLES
Definition: adp1050.h:126
adp1050_trim_type
Definition: adp1050.h:536
@ ADP1050_DISABLE_SR1_SR2
Definition: adp1050.h:510
#define ADP1050_CS1_LEADING_EDGE_MASK
Definition: adp1050.h:104
@ ADP1050_164_5KHZ
Definition: adp1050.h:445
#define ADP1050_READ_FREQUENCY
Definition: adp1050.h:235
#define ADP1050_FEEDFORWARD_OL_ENABLE
Definition: adp1050.h:148
#define ADP1050_MAX_PERIOD_INTEGER(x)
Definition: adp1050.h:130
#define ADP1050_CTRL_PIN_ENABLE
Definition: adp1050.h:55
@ ADP1050_215_5KHZ
Definition: adp1050.h:450
adp1050_mod
Definition: adp1050.h:403
struct no_os_pwm_desc * syni_desc
Definition: adp1050.h:561
#define ADP1050_OPERATION_ON
Definition: adp1050.h:73
#define ADP1050_READ_TEMPERATURE
Definition: adp1050.h:233
#define ADP1050_CS1_DEBOUNCE_MASK
Definition: adp1050.h:105
@ ADP1050_LEADING_EDGE_80NS
Definition: adp1050.h:493
@ ADP1050_DUTY_CYCLE
Definition: adp1050.h:524
@ ADP1050_347KHZ
Definition: adp1050.h:436
@ ADP1050_IIN_OC_FAST_FAULT_512
Definition: adp1050.h:481
@ ADP1050_DEBOUNCE_0NS
Definition: adp1050.h:502
#define ADP1050_SW_RES_DELAY_500MS
Definition: adp1050.h:61
#define ADP1050_SR1_ON
Definition: adp1050.h:94
@ ADP1050_CLOSE_LOOP
Definition: adp1050.h:391
@ ADP1050_208_5KHZ
Definition: adp1050.h:449
struct no_os_gpio_desc * ctrl_desc
Definition: adp1050.h:563
@ ADP1050_IIN
Definition: adp1050.h:522
@ ADP1050_260_5KHZ
Definition: adp1050.h:453
#define ADP1050_OUTB_SR2_FALLING_MOD_MASK
Definition: adp1050.h:113
@ ADP1050_OUTB
Definition: adp1050.h:397
int32_t no_os_pwm_remove(struct no_os_pwm_desc *desc)
Free the resources allocated by no_os_pwm_init().
Definition: no_os_pwm.c:79
int32_t no_os_i2c_remove(struct no_os_i2c_desc *desc)
Free the resources allocated by no_os_i2c_init().
Definition: no_os_i2c.c:113
@ ADP1050_97_5KHZ
Definition: adp1050.h:442
@ ADP1050_397KHZ
Definition: adp1050.h:439
@ ADP1050_VOUT_TR_12UV_US
Definition: adp1050.h:467
enum adp1050_loop loop
Definition: adp1050.h:564
#define ADP1050_VS_OFFSET_MAX_INIT_VAL
Definition: adp1050.h:157
@ ADP1050_184KHZ
Definition: adp1050.h:430
@ ADP1050_78KHZ
Definition: adp1050.h:422
#define ADP1050_OPERATION
Definition: adp1050.h:192
int adp1050_read(struct adp1050_desc *desc, uint16_t command, uint8_t *data, uint8_t bytes_number)
Read data from ADP1050.
Definition: adp1050.c:74
@ ADP1050_LEADING_EDGE_800NS
Definition: adp1050.h:498
int adp1050_read_vsense(struct adp1050_desc *desc, uint16_t *vsense)
Read Voltage Sense output raw value from the ADP1050.
Definition: adp1050.c:184
int adp1050_write(struct adp1050_desc *desc, uint16_t command, uint16_t data, uint8_t bytes_number)
Write data to ADP1050.
Definition: adp1050.c:108
Header file of Delay functions.
@ ADP1050_60KHZ
Definition: adp1050.h:419
#define ADP1050_CS1_TRIM_VAL
Definition: adp1050.h:153
#define ADP1050_FREQUENCY_SWITCH
Definition: adp1050.h:210
@ ADP1050_STATUS_TEMPERATURE_TYPE
Definition: adp1050.h:532
#define ADP1050_VF_GAIN_TRIM
Definition: adp1050.h:311
int adp1050_freq_sync(struct adp1050_desc *desc, bool state_on)
Frequency synchronization of the PWM clock with an external clock Requires syni_desc to be initialize...
Definition: adp1050.c:736
#define ADP1050_SYNCH_GENERAL_SETTINGS
Definition: adp1050.h:295
@ ADP1050_VOUT_TR_200UV_US
Definition: adp1050.h:471
struct no_os_i2c_init_param * i2c_param
Definition: adp1050.h:546
#define ADP1050_EDGE_MSB_MASK
Definition: adp1050.h:99
struct no_os_gpio_init_param * ctrl_param
Definition: adp1050.h:550
#define ADP1050_NEGATIVE_MOD_SIGN
Definition: adp1050.h:118
@ ADP1050_410KHZ
Definition: adp1050.h:441
int adp1050_write(struct adp1050_desc *desc, uint16_t command, uint16_t data, uint8_t bytes_number)
Write data to ADP1050.
Definition: adp1050.c:108
@ ADP1050_REENABLE_PWM_SS
Definition: adp1050.h:515
Header file for the ADP1050 Driver.
int adp1050_unlock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Unlock CHIP/EEPROM/TRIM password.
Definition: adp1050.c:935
@ ADP1050_CONTINUE_NO_INTERRUPT
Definition: adp1050.h:509
struct no_os_i2c_desc * i2c_desc
Definition: adp1050.h:559
@ ADP1050_LEADING_EDGE_120NS
Definition: adp1050.h:494
#define ADP1050_PULSE_SKIPPING_ENABLE
Definition: adp1050.h:150
#define ADP1050_NORMAL_MODE_COMP_POLE
Definition: adp1050.h:323
int adp1050_vout_offset(struct adp1050_desc *desc, int16_t vout_offset)
Set output voltage offset.
Definition: adp1050.c:249
#define ADP1050_VOUT_TRANSITION_RATE
Definition: adp1050.h:207
int adp1050_pwm_modulation(struct adp1050_desc *desc, enum adp1050_mod mod, enum adp1050_channel chan, bool sign)
Set PWM modulation for requested channel.
Definition: adp1050.c:416
int adp1050_vout_margin(struct adp1050_desc *desc, uint16_t margin_high, uint16_t margin_low)
Set VOUT margins value.
Definition: adp1050.c:294
adp1050_iin_oc_fast_fault
Definition: adp1050.h:474
@ ADP1050_357KHZ
Definition: adp1050.h:437
@ ADP1050_231_5KHZ
Definition: adp1050.h:451
#define ADP1050_MANT_MASK
Definition: adp1050.h:84
int adp1050_change_pass(struct adp1050_desc *desc, uint16_t old_pass, uint16_t new_pass, enum adp1050_pass_type pass_type)
Change the CHIP/EEPROM password. TRIM password is the same with EEPROM password.
Definition: adp1050.c:1022
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:54
#define ADP1050_AFTER_FAULT_MASK
Definition: adp1050.h:143
int adp1050_pwm_duty_cycle(struct adp1050_desc *desc, uint16_t pulse_width, uint16_t pulse_start, enum adp1050_channel chan)
Set VOUT duty cycle for requested channel.
Definition: adp1050.c:324
int32_t no_os_gpio_direction_input(struct no_os_gpio_desc *desc)
Enable the input direction of the specified GPIO.
Definition: no_os_gpio.c:124
int adp1050_trim(struct adp1050_desc *desc, enum adp1050_trim_type trim_type, uint16_t vout_command, uint16_t vout_scale, uint16_t trim_val)
Trim IIN(CS1 pin)/VIN(VF pin)/VOUT(VS pin).
Definition: adp1050.c:812
struct no_os_gpio_init_param * pg_alt_param
Definition: adp1050.h:547
@ ADP1050_FREQUENCY
Definition: adp1050.h:525
int adp1050_set_climit(struct adp1050_desc *desc, enum adp1050_iin_oc_fast_fault fast_fault, enum adp1050_climit_ref climit_ref)
Set current limit fast fault for overcurrent protection and current limit cycle-by-cycle reference.
Definition: adp1050.c:541
int adp1050_vout_offset(struct adp1050_desc *desc, int16_t vout_offset)
Set output voltage offset.
Definition: adp1050.c:249
#define ADP1050_READ_VIN
Definition: adp1050.h:230
uint8_t on_off_config
Definition: adp1050.h:551
int adp1050_vout_value(struct adp1050_desc *desc, uint16_t vout_command, uint16_t vout_max)
Set VOUT_COMMAND and VOUT_MAX values.
Definition: adp1050.c:231
#define ADP1050_MAX_PERIOD_FLOAT(x)
Definition: adp1050.h:131
@ ADP1050_DEBOUNCE_40NS
Definition: adp1050.h:503
@ ADP1050_149KHZ
Definition: adp1050.h:429
@ ADP1050_LEADING_EDGE_400NS
Definition: adp1050.h:496
int adp1050_set_pwm(struct adp1050_desc *desc, enum adp1050_channel chan, enum adp1050_freq freq)
Set PWM channel and frequency.
Definition: adp1050.c:471
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:115
#define ADP1050_FLAG_REGISTER3
Definition: adp1050.h:375
struct no_os_gpio_desc * flgi_desc
Definition: adp1050.h:562
#define ADP1050_FLOAT_FREQ_MASK
Definition: adp1050.h:132
#define ADP1050_FLAG_REGISTER1
Definition: adp1050.h:373
int adp1050_freq_sync(struct adp1050_desc *desc, bool state_on)
Frequency synchronization of the PWM clock with an external clock Requires syni_desc to be initialize...
Definition: adp1050.c:736
#define ADP1050_SOFTWARE_RESET_SETTINGS
Definition: adp1050.h:282
#define ADP1050_VOUT_MAX
Definition: adp1050.h:204
int adp1050_vout_tr(struct adp1050_desc *desc, enum adp1050_vout_tr vout_tr)
Set ADP1050 VOUT transition rate.
Definition: adp1050.c:260
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:126
@ ADP1050_IIN_OC_FAST_FAULT_1024
Definition: adp1050.h:482
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)
@ ADP1050_320_5KHZ
Definition: adp1050.h:457
@ ADP1050_IIN_OC_FAST_FAULT_256
Definition: adp1050.h:480
#define ADP1050_VOUT_MARGIN_LOW
Definition: adp1050.h:206
#define ADP1050_FEEDFORWARD_OFF
Definition: adp1050.h:145
int adp1050_lock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Lock CHIP/EEPROM password. TRIM passwor dis locked of the EEPROM password is locked.
Definition: adp1050.c:999
adp1050_value_type
Definition: adp1050.h:520
@ ADP1050_271_5KHZ
Definition: adp1050.h:454
adp1050_loop
Definition: adp1050.h:390
#define ADP1050_SR2_FALLING_EDGE_TIMING
Definition: adp1050.h:343
int adp1050_set_cs1_settings(struct adp1050_desc *desc, enum adp1050_cs1_leading_edge leading_edge, enum adp1050_cs1_debounce debounce, bool ignore)
Set current sense settings.
Definition: adp1050.c:564
#define ADP1050_VF_TRIM_VAL
Definition: adp1050.h:155
@ ADP1050_OUTB_SR2_RISING_MOD
Definition: adp1050.h:407
@ ADP1050_VOUT_TR_100UV_US
Definition: adp1050.h:470
@ ADP1050_VIN
Definition: adp1050.h:521
int adp1050_pulse_skipping(struct adp1050_desc *desc, uint8_t pulse_threshold, bool state_on)
Enable or disbale the pulse skipping mode.
Definition: adp1050.c:681
@ ADP1050_DISABLE_ALL_PWM
Definition: adp1050.h:511
#define ADP1050_OUTA_RISING_EDGE_TIMING
Definition: adp1050.h:333
int adp1050_remove(struct adp1050_desc *desc)
Free the resources allocated by the adp1050_init()
Definition: adp1050.c:1166
@ ADP1050_65KHZ
Definition: adp1050.h:420
int adp1050_trim(struct adp1050_desc *desc, enum adp1050_trim_type trim_type, uint16_t vout_command, uint16_t vout_scale, uint16_t trim_val)
Trim IIN(CS1 pin)/VIN(VF pin)/VOUT(VS pin).
Definition: adp1050.c:812
@ ADP1050_LEADING_EDGE_0NS
Definition: adp1050.h:491
int adp1050_software_reset(struct adp1050_desc *desc)
Software reset the ADP1050.
Definition: adp1050.c:1058
#define ADP1050_OUTB_ON
Definition: adp1050.h:93
#define ADP1050_OUTB_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:338
int adp1050_filter(struct adp1050_desc *desc, uint8_t zero, uint8_t pole, uint8_t lf, uint8_t hf)
Adjust filter settings of the normal mode compensator.
Definition: adp1050.c:776
@ ADP1050_130KHZ
Definition: adp1050.h:426
@ ADP1050_403KHZ
Definition: adp1050.h:440
#define ADP1050_READ_IIN
Definition: adp1050.h:231
#define ADP1050_SR2_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:344
int adp1050_set_climit(struct adp1050_desc *desc, enum adp1050_iin_oc_fast_fault fast_fault, enum adp1050_climit_ref climit_ref)
Set current limit fast fault for overcurrent protection and current limit cycle-by-cycle reference.
Definition: adp1050.c:541
@ ADP1050_379KHZ
Definition: adp1050.h:438
@ ADP1050_TEMP
Definition: adp1050.h:523
#define ADP1050_VIN_ON
Definition: adp1050.h:211
@ ADP1050_201_5KHZ
Definition: adp1050.h:448
bool ext_syni
Definition: adp1050.h:552
#define ADP1050_CS1_MAX_INIT_VAL
Definition: adp1050.h:154
@ ADP1050_297_5KHZ
Definition: adp1050.h:455
#define ADP1050_NORMAL_MODE_COMP_LOW_FREQ
Definition: adp1050.h:321
@ ADP1050_VOUT_TR_50UV_US
Definition: adp1050.h:469
struct no_os_pwm_init_param * syni_param
Definition: adp1050.h:548
#define ADP1050_FALLING_EDGE_LSB_MASK
Definition: adp1050.h:101
@ ADP1050_LEADING_EDGE_600NS
Definition: adp1050.h:497
int adp1050_set_feedforward(struct adp1050_desc *desc, bool state_on)
Enable or disable voltage input feedforward for edge modulation.
Definition: adp1050.c:712
#define ADP1050_CHECK_EEPROM_PASS_MASK
Definition: adp1050.h:136
adp1050_flgi_after_fault
Definition: adp1050.h:514
@ ADP1050_CLIMIT_REF_250MV
Definition: adp1050.h:487
@ ADP1050_OUTB_SR2_FALLING_MOD
Definition: adp1050.h:406
#define ADP1050_VOUT_SCALE_MONITOR
Definition: adp1050.h:209
@ ADP1050_338KHZ
Definition: adp1050.h:435
int adp1050_change_pass(struct adp1050_desc *desc, uint16_t old_pass, uint16_t new_pass, enum adp1050_pass_type pass_type)
Change the CHIP/EEPROM password. TRIM password is the same with EEPROM password.
Definition: adp1050.c:1022
#define ADP1050_SW_RES_NO_DELAY
Definition: adp1050.h:65
#define ADP1050_FLAGIN_RESPONSE
Definition: adp1050.h:277
@ ADP1050_VF_VIN_TRIM
Definition: adp1050.h:539
int adp1050_set_cs1_settings(struct adp1050_desc *desc, enum adp1050_cs1_leading_edge leading_edge, enum adp1050_cs1_debounce debounce, bool ignore)
Set current sense settings.
Definition: adp1050.c:564
adp1050_status_type
Definition: adp1050.h:528
adp1050_cs1_leading_edge
Definition: adp1050.h:490
@ ADP1050_REENABLE_PWM_WITH_PSON
Definition: adp1050.h:517
@ ADP1050_223KHZ
Definition: adp1050.h:431
struct no_os_gpio_init_param * flgi_param
Definition: adp1050.h:549
int adp1050_vout_value(struct adp1050_desc *desc, uint16_t vout_command, uint16_t vout_max)
Set VOUT_COMMAND and VOUT_MAX values.
Definition: adp1050.c:231
@ ADP1050_CS1_IIN_TRIM
Definition: adp1050.h:537
#define ADP1050_RISING_EDGE_LSB_MASK
Definition: adp1050.h:100
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:104
#define ADP1050_STATUS_INPUT
Definition: adp1050.h:227
#define ADP1050_MANT_MAX
Definition: adp1050.h:81
#define ADP1050_VIN_OFF
Definition: adp1050.h:212
#define ADP1050_READ_DUTY_CYCLE
Definition: adp1050.h:234
@ ADP1050_STATUS_WORD_TYPE
Definition: adp1050.h:531
#define ADP1050_MSB_MASK
Definition: adp1050.h:49
int adp1050_read_status(struct adp1050_desc *desc, enum adp1050_status_type status, uint16_t *status_val)
Read statuses.
Definition: adp1050.c:145
@ ADP1050_LEADING_EDGE_40NS
Definition: adp1050.h:492
#define ADP1050_CHIP_PASSWORD
Definition: adp1050.h:264
#define ADP1050_SR1_FALLING_EDGE_TIMING
Definition: adp1050.h:340
#define ADP1050_STATUS_VOUT
Definition: adp1050.h:226
adp1050_channel
Definition: adp1050.h:395
#define ADP1050_STORE_USER_ALL
Definition: adp1050.h:197
adp1050_freq
Definition: adp1050.h:416
@ ADP1050_DEBOUNCE_80NS
Definition: adp1050.h:504
@ ADP1050_DEBOUNCE_120NS
Definition: adp1050.h:505
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:96
@ ADP1050_IIN_OC_FAST_FAULT_64
Definition: adp1050.h:478
@ ADP1050_OUTA
Definition: adp1050.h:396
@ ADP1050_329KHZ
Definition: adp1050.h:434
#define ADP1050_VOUT_MARGIN_HIGH
Definition: adp1050.h:205
#define ADP1050_EEPROM_DEFAULT_PASS
Definition: adp1050.h:137
int adp1050_set_close_loop(struct adp1050_desc *desc)
Set close loop operation.
Definition: adp1050.c:654
#define ADP1050_FEEDFORWARD_CL_ENABLE
Definition: adp1050.h:147
int adp1050_lock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Lock CHIP/EEPROM password. TRIM passwor dis locked of the EEPROM password is locked.
Definition: adp1050.c:999
Structure representing an PWM generator device.
Definition: no_os_pwm.h:93
@ ADP1050_CLIMIT_REF_1200MV
Definition: adp1050.h:486
Device descriptor for ADP1050.
Definition: adp1050.h:558
#define ADP1050_MODULATION_LIMIT
Definition: adp1050.h:329
int adp1050_set_feedforward(struct adp1050_desc *desc, bool state_on)
Enable or disable voltage input feedforward for edge modulation.
Definition: adp1050.c:712
int adp1050_pulse_skipping(struct adp1050_desc *desc, uint8_t pulse_threshold, bool state_on)
Enable or disbale the pulse skipping mode.
Definition: adp1050.c:681
#define ADP1050_EXP_MAX
Definition: adp1050.h:82
Structure holding I2C address descriptor.
Definition: no_os_i2c.h:101
@ ADP1050_87KHZ
Definition: adp1050.h:423
int32_t no_os_pwm_init(struct no_os_pwm_desc **desc, const struct no_os_pwm_init_param *param)
Initialize the PWM peripheral.
Definition: no_os_pwm.c:51
#define ADP1050_VIN_SCALE_MONITOR
Definition: adp1050.h:265
@ ADP1050_VOUT_TR_INFINITE
Definition: adp1050.h:463
@ ADP1050_49KHZ
Definition: adp1050.h:417
#define ADP1050_READ_VOUT
Definition: adp1050.h:232
int32_t no_os_i2c_read(struct no_os_i2c_desc *desc, uint8_t *data, uint8_t bytes_number, uint8_t stop_bit)
I2C Read data from slave device.
Definition: no_os_i2c.c:190
@ ADP1050_STATUS_CML_TYPE
Definition: adp1050.h:533
@ ADP1050_STATUS_VOUT_TYPE
Definition: adp1050.h:529
int adp1050_unlock_pass(struct adp1050_desc *desc, uint16_t password, enum adp1050_pass_type pass_type)
Unlock CHIP/EEPROM/TRIM password.
Definition: adp1050.c:935
Header file of I2C Interface.
#define ADP1050_SOFTWARE_RESET_GO
Definition: adp1050.h:281
Header file of PWM Interface.
@ ADP1050_390_5KHZ
Definition: adp1050.h:459
#define ADP1050_OUTB_FALLING_EDGE_TIMING
Definition: adp1050.h:337
@ ADP1050_156_5KHZ
Definition: adp1050.h:444
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
@ ADP1050_LEADING_EDGE_200NS
Definition: adp1050.h:495
#define ADP1050_CHECK_CHIP_PASS_MASK
Definition: adp1050.h:134
adp1050_flgi_fault_response
Definition: adp1050.h:508
#define ADP1050_VS_INIT_MASK
Definition: adp1050.h:159
#define ADP1050_CS1_CLIMIT_COMP_IGNORE
Definition: adp1050.h:103
int adp1050_pwm_duty_cycle(struct adp1050_desc *desc, uint16_t pulse_width, uint16_t pulse_start, enum adp1050_channel chan)
Set VOUT duty cycle for requested channel.
Definition: adp1050.c:324
#define NO_OS_BIT(x)
Definition: no_os_util.h:45
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:69
adp1050_vout_tr
Definition: adp1050.h:462
#define ADP1050_VOUT_CAL_OFFSET
Definition: adp1050.h:203
#define ADP1050_NORMAL_MODE_COMP_HIGH_FREQ
Definition: adp1050.h:324
uint16_t no_os_get_unaligned_le16(uint8_t *buf)
@ ADP1050_DISABLE_ALL
Definition: adp1050.h:400
@ ADP1050_OUTA_SR1_RISING_MOD
Definition: adp1050.h:405
#define ADP1050_VOUT_COMMAND
Definition: adp1050.h:201
@ ADP1050_SR1
Definition: adp1050.h:398
#define ADP1050_SOFT_START_SETTING_OL
Definition: adp1050.h:284
@ ADP1050_250KHZ
Definition: adp1050.h:432
#define ADP1050_EEPROM_PASSWORD
Definition: adp1050.h:262
#define ADP1050_OUTA_SR1_FALLING_MOD_MASK
Definition: adp1050.h:115
@ ADP1050_IIN_OC_FAST_FAULT_16
Definition: adp1050.h:477
struct no_os_gpio_desc * pg_alt_desc
Definition: adp1050.h:560
@ ADP1050_EEPROM_PASS
Definition: adp1050.h:412
@ ADP1050_VOUT_TR_3125NV_US
Definition: adp1050.h:465
Structure holding the parameters for I2C initialization.
Definition: no_os_i2c.h:64
#define NULL
Definition: wrapper.h:64
#define ADP1050_FEEDFORWARD_SS_FILTER_GAIN
Definition: adp1050.h:330
#define ADP1050_OUTA_FALLING_EDGE_TIMING
Definition: adp1050.h:334
@ ADP1050_367_5KHZ
Definition: adp1050.h:458
#define ADP1050_OUTA_OUTB_MODULATION_SETTINGS
Definition: adp1050.h:345
#define ADP1050_VS_GAIN_TRIM
Definition: adp1050.h:308
#define ADP1050_OUTB_SR2_RISING_MOD_MASK
Definition: adp1050.h:112
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:113
adp1050_climit_ref
Definition: adp1050.h:485
#define ADP1050_VF_MAX_INIT_VAL
Definition: adp1050.h:156
int adp1050_read_status(struct adp1050_desc *desc, enum adp1050_status_type status, uint16_t *status_val)
Read statuses.
Definition: adp1050.c:145
#define ADP1050_EXP_MASK
Definition: adp1050.h:83
int adp1050_set_vin(struct adp1050_desc *desc, int16_t mantissa, int8_t exp, bool state_on)
Set ADP1050 VIN on/off raw value for input voltage limiting.
Definition: adp1050.c:519
#define ADP1050_PULSE_SKIPPING_MODE_THR
Definition: adp1050.h:365
adp1050_cs1_debounce
Definition: adp1050.h:501
#define ADP1050_OPEN_LOOP_ENABLE
Definition: adp1050.h:120
int adp1050_vout_scale(struct adp1050_desc *desc, int8_t exp, uint16_t mant)
Set ADP1050 VOUT scale, regarding the resistor divider assigned to the VS pins.
Definition: adp1050.c:273
@ ADP1050_59KHZ
Definition: adp1050.h:418
@ ADP1050_240_5KHZ
Definition: adp1050.h:452
int adp1050_set_open_loop(struct adp1050_desc *desc, uint8_t rising_edge, uint8_t falling_edge, enum adp1050_channel chan)
Set requested ADP1050 channel in Open Loop operation mode.
Definition: adp1050.c:589
int adp1050_send_command(struct adp1050_desc *desc, uint16_t command)
Send command byte/word to ADP1050.
Definition: adp1050.c:46
#define ADP1050_OPEN_LOOP_DISABLE
Definition: adp1050.h:121
@ ADP1050_IIN_OC_FAST_FAULT_128
Definition: adp1050.h:479
int adp1050_software_reset(struct adp1050_desc *desc)
Software reset the ADP1050.
Definition: adp1050.c:1058
@ ADP1050_111_5KHZ
Definition: adp1050.h:443
Header file of GPIO Interface.
@ ADP1050_312_5KHZ
Definition: adp1050.h:456
int adp1050_filter(struct adp1050_desc *desc, uint8_t zero, uint8_t pole, uint8_t lf, uint8_t hf)
Adjust filter settings of the normal mode compensator.
Definition: adp1050.c:776
adp1050_pass_type
Definition: adp1050.h:410
#define ADP1050_FAULT_RESPONSE_MASK
Definition: adp1050.h:142
#define ADP1050_SR2_RISING_EDGE_TIMING
Definition: adp1050.h:342
int adp1050_pwm_modulation(struct adp1050_desc *desc, enum adp1050_mod mod, enum adp1050_channel chan, bool sign)
Set PWM modulation for requested channel.
Definition: adp1050.c:416
int adp1050_set_flgi_response(struct adp1050_desc *desc, enum adp1050_flgi_fault_response fault_response, enum adp1050_flgi_after_fault after_fault)
Set FLAGIN response to FLGI pin signal.
Definition: adp1050.c:752
int adp1050_send_command(struct adp1050_desc *desc, uint16_t command)
Send command byte/word to ADP1050.
Definition: adp1050.c:46
@ ADP1050_SR2
Definition: adp1050.h:399
#define ADP1050_ON_OFF_CONFIG
Definition: adp1050.h:193
Initialization parameter for the ADP1050 device.
Definition: adp1050.h:545
@ ADP1050_120KHZ
Definition: adp1050.h:425
#define ADP1050_PWM_OUTPUT_DISABLE
Definition: adp1050.h:347
Header file of utility functions.
#define ADP1050_FREQ_SYNC_ON
Definition: adp1050.h:128
int adp1050_read_value(struct adp1050_desc *desc, uint16_t *mant, uint8_t *exp, enum adp1050_value_type val_type)
Read VIN/IIN/TEMP/DUTY_CYCLE/FREQ raw value from the ADP1050.
Definition: adp1050.c:206
@ ADP1050_OUTA_SR1_FALLING_MOD
Definition: adp1050.h:404
@ ADP1050_104KHZ
Definition: adp1050.h:424
@ ADP1050_VOUT_TR_6250NV_US
Definition: adp1050.h:466
#define ADP1050_OUTA_SR1_RISING_MOD_MASK
Definition: adp1050.h:114
int adp1050_set_flgi_response(struct adp1050_desc *desc, enum adp1050_flgi_fault_response fault_response, enum adp1050_flgi_after_fault after_fault)
Set FLAGIN response to FLGI pin signal.
Definition: adp1050.c:752
#define ADP1050_CS1_GAIN_TRIM
Definition: adp1050.h:299
@ ADP1050_VOUT_TR_1562NV_US
Definition: adp1050.h:464
#define ADP1050_CS1_CBC_CURR_LIM_REF
Definition: adp1050.h:302
#define ADP1050_FREQ_SYNC_OFF
Definition: adp1050.h:129
int adp1050_set_pwm(struct adp1050_desc *desc, enum adp1050_channel chan, enum adp1050_freq freq)
Set PWM channel and frequency.
Definition: adp1050.c:471
#define ADP1050_SR1_RISING_EDGE_TIMING
Definition: adp1050.h:339
int adp1050_init(struct adp1050_desc **desc, struct adp1050_init_param *init_param)
Initialize the ADP1050 device.
Definition: adp1050.c:1079
int adp1050_set_vin(struct adp1050_desc *desc, int16_t mantissa, int8_t exp, bool state_on)
Set ADP1050 VIN on/off raw value for input voltage limiting.
Definition: adp1050.c:519
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:147
enum adp1050_freq freq
Definition: adp1050.h:565
#define ADP1050_STATUS_WORD
Definition: adp1050.h:225
#define ADP1050_VOUT_GO
Definition: adp1050.h:140
int adp1050_vout_scale(struct adp1050_desc *desc, int8_t exp, uint16_t mant)
Set ADP1050 VOUT scale, regarding the resistor divider assigned to the VS pins.
Definition: adp1050.c:273
@ ADP1050_OPEN_LOOP
Definition: adp1050.h:392
#define ADP1050_CS1_CBC_CURR_LIM_SETTINGS
Definition: adp1050.h:305
#define ADP1050_OL_OPERATION_SETTINGS
Definition: adp1050.h:364
int adp1050_read(struct adp1050_desc *desc, uint16_t command, uint8_t *data, uint8_t bytes_number)
Read data from ADP1050.
Definition: adp1050.c:74
#define ADP1050_OUTA_RISING_FALLING_TIMING_LSB
Definition: adp1050.h:335
@ ADP1050_VOUT_TR_25UV_US
Definition: adp1050.h:468
@ ADP1050_TRIM_PASS
Definition: adp1050.h:413
@ ADP1050_REENABLE_PWM
Definition: adp1050.h:516
int adp1050_set_open_loop(struct adp1050_desc *desc, uint8_t rising_edge, uint8_t falling_edge, enum adp1050_channel chan)
Set requested ADP1050 channel in Open Loop operation mode.
Definition: adp1050.c:589
@ ADP1050_284KHZ
Definition: adp1050.h:433
@ ADP1050_IIN_OC_FAST_FAULT_2
Definition: adp1050.h:475
@ ADP1050_CHIP_PASS
Definition: adp1050.h:411
#define ADP1050_LSB_MASK
Definition: adp1050.h:48
@ ADP1050_173_5KHZ
Definition: adp1050.h:446
@ ADP1050_136KHZ
Definition: adp1050.h:427
#define ADP1050_POSITIVE_MOD_SIGN
Definition: adp1050.h:117
#define ADP1050_NORMAL_MODE_COMP_ZERO
Definition: adp1050.h:322
#define ADP1050_STATUS_TEMPERATURE
Definition: adp1050.h:228
#define ADP1050_EXTENDED_COMMAND
Definition: adp1050.h:45
@ ADP1050_STATUS_INPUT_TYPE
Definition: adp1050.h:530
#define ADP1050_CLEAR_FAULTS
Definition: adp1050.h:194
int32_t no_os_gpio_get_optional(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Get the value of an optional GPIO.
Definition: no_os_gpio.c:75