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parameters.h
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1/***************************************************************************/
33#ifndef _PARAMETERS_H_
34#define _PARAMETERS_H_
35
36#include "xparameters.h"
37
38#ifndef ADRV9002_RX2TX2
39#define IIO_DEV_COUNT 2
40#define IIO_DEV_CHANNELS 1
41#else
42#define IIO_DEV_COUNT 1
43#define IIO_DEV_CHANNELS 2
44#endif
45
46#define ADRV9001_I_Q_CHANNELS (IIO_DEV_CHANNELS * 2)
47
48#define DAC_BUFFER_SAMPLES 1024
49#define ADC_BUFFER_SAMPLES 16384
50
51#ifdef XPS_BOARD_ZCU102
52#define GPIO_OFFSET 78
53#else
54#define GPIO_OFFSET 54
55#endif
56
57/* GPIO */
58#define GPIO_RESET (46 + GPIO_OFFSET)
59#define GPIO_SSI_SYNC (54 + GPIO_OFFSET)
60
61/* SPI */
62#define SPI_CS 0
63
64#ifdef XPS_BOARD_ZCU102
65#define SPI_DEVICE_ID XPAR_PSU_SPI_0_DEVICE_ID
66#define GPIO_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID
67#else
68#define SPI_DEVICE_ID XPAR_PS7_SPI_0_DEVICE_ID
69#define GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID
70#endif
71
72/* UART */
73#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
74#define UART_BAUDRATE 921600
75#ifdef XPS_BOARD_ZCU102
76#define UART_IRQ_ID XPAR_XUARTPS_0_INTR
77#else
78#define UART_IRQ_ID XPAR_XUARTPS_1_INTR
79#endif
80
81/* Interrupt */
82#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
83
84/* DMA Controller */
85#define RX1_DMA_BASEADDR XPAR_AXI_ADRV9001_RX1_DMA_BASEADDR
86#define RX2_DMA_BASEADDR XPAR_AXI_ADRV9001_RX2_DMA_BASEADDR
87#define TX1_DMA_BASEADDR XPAR_AXI_ADRV9001_TX1_DMA_BASEADDR
88#define TX2_DMA_BASEADDR XPAR_AXI_ADRV9001_TX2_DMA_BASEADDR
89
90/* AXI ADC/DAC */
91#define RX1_ADC_BASEADDR XPAR_AXI_ADRV9001_BASEADDR
92#define RX2_ADC_BASEADDR (XPAR_AXI_ADRV9001_BASEADDR + 0x1000)
93#define TX1_DAC_BASEADDR (XPAR_AXI_ADRV9001_BASEADDR + 0x2000)
94#define TX2_DAC_BASEADDR (XPAR_AXI_ADRV9001_BASEADDR + 0x4000)
95
96#endif