no-OS
parameters.h
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1 /***************************************************************************/
33 #ifndef _PARAMETERS_H_
34 #define _PARAMETERS_H_
35 
36 /******************************************************************************/
37 /***************************** Include Files **********************************/
38 /******************************************************************************/
39 #include "xparameters.h"
40 
41 /******************************************************************************/
42 /********************** Macros and Constants Definitions **********************/
43 /******************************************************************************/
44 #ifndef ADRV9002_RX2TX2
45 #define IIO_DEV_COUNT 2
46 #define IIO_DEV_CHANNELS 1
47 #else
48 #define IIO_DEV_COUNT 1
49 #define IIO_DEV_CHANNELS 2
50 #endif
51 
52 #define ADRV9001_I_Q_CHANNELS (IIO_DEV_CHANNELS * 2)
53 
54 #define DAC_BUFFER_SAMPLES 1024
55 #define ADC_BUFFER_SAMPLES 16384
56 
57 #ifdef XPS_BOARD_ZCU102
58 #define GPIO_OFFSET 78
59 #else
60 #define GPIO_OFFSET 54
61 #endif
62 
63 /* GPIO */
64 #define GPIO_RESET (46 + GPIO_OFFSET)
65 #define GPIO_SSI_SYNC (54 + GPIO_OFFSET)
66 
67 /* SPI */
68 #define SPI_CS 0
69 
70 #ifdef XPS_BOARD_ZCU102
71 #define SPI_DEVICE_ID XPAR_PSU_SPI_0_DEVICE_ID
72 #define GPIO_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID
73 #else
74 #define SPI_DEVICE_ID XPAR_PS7_SPI_0_DEVICE_ID
75 #define GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID
76 #endif
77 
78 /* UART */
79 #define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
80 #define UART_BAUDRATE 921600
81 #ifdef XPS_BOARD_ZCU102
82 #define UART_IRQ_ID XPAR_XUARTPS_0_INTR
83 #else
84 #define UART_IRQ_ID XPAR_XUARTPS_1_INTR
85 #endif
86 
87 /* Interrupt */
88 #define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
89 
90 /* DMA Controller */
91 #define RX1_DMA_BASEADDR XPAR_AXI_ADRV9001_RX1_DMA_BASEADDR
92 #define RX2_DMA_BASEADDR XPAR_AXI_ADRV9001_RX2_DMA_BASEADDR
93 #define TX1_DMA_BASEADDR XPAR_AXI_ADRV9001_TX1_DMA_BASEADDR
94 #define TX2_DMA_BASEADDR XPAR_AXI_ADRV9001_TX2_DMA_BASEADDR
95 
96 /* AXI ADC/DAC */
97 #define RX1_ADC_BASEADDR XPAR_AXI_ADRV9001_BASEADDR
98 #define RX2_ADC_BASEADDR (XPAR_AXI_ADRV9001_BASEADDR + 0x1000)
99 #define TX1_DAC_BASEADDR (XPAR_AXI_ADRV9001_BASEADDR + 0x2000)
100 #define TX2_DAC_BASEADDR (XPAR_AXI_ADRV9001_BASEADDR + 0x4000)
101 
102 #endif