int32_t ParseConfig(char *pStr, struct eit_config *pEitCfg, struct measurement_config *pMeasCfg)
Definition: app.c:139
const char * name
Definition: clk_axi_clkgen.h:51
uint8_t offload_config
Definition: spi_engine.h:151
Definition: iio_ad7746.h:48
@ RX_GAIN_DELAY
Definition: t_mykonos.h:827
ADI_ERR
Definition: common.h:34
@ AD77681_FIR
Definition: ad77681.h:395
Driver for the Analog Devices AXI-ADC-CORE module.
int adxcvr_clk_enable(struct adxcvr *xcvr)
AXI ADXCVR Clock Enable.
Definition: axi_adxcvr.c:479
#define AXI_ADC_REG_CNTRL_3
Definition: axi_adc_core.h:54
#define AD9081_TX_JESD_S
Definition: app_config.h:62
#define RX_OS_JESD_BASEADDR
Definition: parameters.h:126
mykonosRxProfile_t * rxProfile
Definition: t_mykonos.h:1449
Contains macro definitions and function prototypes for mykonos_gpio.c.
const char * name
Definition: axi_dac_core.h:50
Definition: ad77681.h:490
uint8_t uc
Definition: app_clocking.h:45
const char * name
Definition: clk_axi_clkgen.h:45
Definition: ad77681.h:522
IIO application descriptor initialization parameters.
Definition: iio_app.h:101
#define AD9081_RX_JESD_HD
Definition: app_config.h:93
ad9528outputSettings_t * outputSettings
Definition: t_ad9528.h:184
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:79
Talise initialization and control routines.
uint32_t no_commands
Definition: spi_engine.h:165
#define AD9081_TX_JESD_M
Definition: app_config.h:55
Structure containing the init parameters needed by the PWM generator.
Definition: no_os_pwm.h:66
Config file for ADRV9009 project.
float SinFreqVal
Definition: app.c:54
@ OBS_SNIFFER_C
Definition: t_mykonos.h:649
#define TX_CORE_BASEADDR
Definition: parameters.h:107
#define ADXCVR_REFCLK
Definition: axi_adxcvr.h:55
@ ADIERR_OK
Definition: common.h:35
#define SPI_AD7616_CS
Definition: parameters.h:44
int32_t axi_dac_init_begin(struct axi_dac **dac_core, const struct axi_dac_init *init)
Begin AXI DAC Initialization.
Definition: axi_dac_core.c:881
int32_t adf4371_clk_round_rate(struct adf4371_dev *dev, uint64_t rate, uint64_t *rounded_rate)
Definition: adf4371.c:710
int main(void)
Definition: headless.c:56
int32_t platform_remove(void)
Definition: common.c:115
Header file of UART driver for ADuCM302x.
Structure holding jesd app descriptor.
Definition: app_jesd.h:59
const char * name
Definition: altera_adxcvr.h:90
int32_t ad7746_set_cap_dac_a(struct ad7746_dev *dev, bool enable, uint8_t code)
Set the DAC code and enable state for EXCA.
Definition: ad7746.c:333
struct no_os_uart_init_param uart_init_params
Definition: iio_app.h:115
#define IIO_APP_DEVICE(_name, _dev, _dev_descriptor, _read_buff, _write_buff, _default_trigger_id)
Definition: iio_app.h:47
int32_t app_ad9083_remove(struct app_ad9083 *app)
Free the resources allocated by app_ad9083_init().
Definition: app_ad9083.c:206
struct adi_adrv9001_SpiSettings * adrv9002_spi_settings_get(void)
Definition: headless.c:93
#define AD9081_ADC_NYQUIST_ZONE
Definition: app_config.h:47
@ TX_LO_LEAKAGE_INTERNAL
Definition: t_mykonos.h:830
int32_t app_ad9083_subclass1_status(struct app_ad9083 *app)
Check AD9083 subclass 1 link status.
Definition: app_ad9083.c:79
#define TX_CLKGEN_BASEADDR
Definition: parameters.h:121
char sign
Definition: iio_types.h:153
int32_t ad77681_setup(struct ad77681_dev **device, struct ad77681_init_param init_param, struct ad77681_status_registers **status)
Definition: ad77681.c:1746
#define AD9081_RX_JESD_S
Definition: app_config.h:92
adiHalErr_t clocking_init(uint32_t rx_div40_rate_hz, uint32_t tx_div40_rate_hz, uint32_t rx_os_div40_rate_hz, uint32_t device_clock_khz, uint32_t lmfc_rate_hz)
Definition: app_clocking.c:95
struct axi_clkgen_init clkgen_init
Definition: ad77681evb.c:94
mykonosTxProfile_t * txProfile
Definition: t_mykonos.h:1431
int32_t ad7746_init(struct ad7746_dev **device, struct ad7746_init_param *init_param)
Initialize the ad7606 device structure.
Definition: ad7746.c:53
struct no_os_gpio_init_param * gpio_reset
Definition: ad9081.h:156
void jesd_deinit(void)
Definition: app_jesd.c:140
@ FLASH_CAL
Definition: t_mykonos.h:828
#define RX1_DMA_BASEADDR
Definition: parameters.h:91
int32_t altera_a10_fpll_enable(struct altera_a10_fpll *fpll)
altera_a10_fpll_enable
Definition: clk_altera_a10_fpll.c:448
int main()
Definition: ad77681evb.c:100
mykonosErr_t MYKONOS_setObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh)
Powers up or down the Observation Rx signal chain in the radioOn state.
Definition: mykonos.c:5273
#define PHY_RESET
Definition: parameters.h:64
int32_t axi_jesd204_rx_init_legacy(struct axi_jesd204_rx **jesd204, const struct jesd204_rx_init *init)
Device initialization.
Definition: axi_jesd204_rx.c:835
uint32_t num_lanes
Definition: axi_jesd204_rx.h:65
@ GPIO_PS
Definition: xilinx_gpio.h:56
#define I2C_SPEED
Definition: parameters.h:42
@ SPI_PS
Definition: xilinx_spi.h:62
Application configuration.
#define AD7768_ADC_BASEADDR
Definition: parameters.h:46
#define AD9081_RX_CHAN_NCO_SHIFT
Definition: app_config.h:106
uint16_t channel_a
Definition: ad7616.h:234
uint32_t size
Definition: iio_app.h:63
struct link_init_param * jrx_link_tx[2]
Definition: ad9081.h:188
Configuration parameters for AD7746-EBZ demo project.
Definition: axi_dmac.h:127
void jesd_rx_watchdog(void)
Definition: app_jesd.c:162
uint64_t sampling_freq
Definition: headless.c:73
int32_t app_clock_init(struct no_os_clk dev_refclk[MULTIDEVICE_INSTANCE_COUNT])
Application clock setup.
Definition: app_clock.c:69
const char * name
Definition: axi_dmac.h:128
@ OBS_RX1_TXLO
Definition: t_mykonos.h:641
@ TRACK_ORX1_QEC
Definition: t_mykonos.h:849
const struct no_os_clk_platform_ops * platform_ops
Definition: no_os_clk.h:50
Definition: no_os_clk.h:55
struct ad9081_jesd_link jtx_link_rx[2]
Definition: ad9081.h:84
#define CS_LOW
Definition: spi_engine.h:73
@ UART_PL
Definition: xilinx_uart.h:57
Definition: ad77681.h:497
struct jesd204_dev * jdev
Definition: hmc7044.h:91
struct no_os_uart_init_param uip
Definition: common_data.c:42
mykonosErr_t MYKONOS_resetDeframer(mykonosDevice_t *device)
Resets the JESD204B Deframer.
Definition: mykonos.c:8099
struct axi_clkgen * rx_clkgen
Definition: app_clocking.c:90
struct iio_device dev_descriptor
Definition: iio_axi_adc.h:66
void no_os_uart_stdio(struct no_os_uart_desc *desc)
Definition: no_os_uart.c:216
#define AD9081_TX_JESD_MODE
Definition: app_config.h:52
#define DEFRAMER_LINK0_TX
Definition: ad9081.h:234
#define DDR_MEM_BASEADDR
Definition: parameters.h:64
Header file of SPI Interface.
struct adxcvr * tx_adxcvr
Definition: app_jesd.c:53
int32_t ParseQuery(char *pStr, struct electrode_combo *pElCmb, struct measurement_config *pMeasCfg)
Definition: app.c:180
@ NO_OS_UART_STOP_1_BIT
Definition: no_os_uart.h:94
mykonosJesd204bDeframerConfig_t * deframer
Definition: t_mykonos.h:1432
Structure holding clocking app descriptor.
Definition: app_clocking.h:54
enum xil_uart_type type
Definition: xilinx_uart.h:69
@ MYKONOS_ERR_GPIO_OK
Definition: t_mykonos_gpio.h:32
#define SPI_AD7768_CS
Definition: parameters.h:41
@ AD7768_FAST_MODE
Definition: ad7768.h:136
int32_t axi_dac_init_finish(struct axi_dac *dac)
Begin AXI DAC Initialization.
Definition: axi_dac_core.c:905
int32_t ad7616_setup(struct ad7616_dev **device, struct ad7616_init_param *init_param)
Definition: ad7616.c:941
struct iio_device dev_descriptor
Definition: iio_axi_dac.h:62
#define AD77681_SPI1_ENGINE_BASEADDR
Definition: parameters.h:46
int32_t spi_engine_offload_init(struct no_os_spi_desc *desc, const struct spi_engine_offload_init_param *param)
Initialize the SPI engine's offload module.
Definition: spi_engine.c:763
int jesd204_topology_init(struct jesd204_topology **topology, struct jesd204_topology_dev *devs, unsigned int devs_number)
Header file of iio_ad7746.
ADI JESD204B/C AXI_ADXCVR Highspeed Transceiver Device structure.
Definition: altera_adxcvr.h:89
#define BITS_IN_BYTE
Definition: parameters.h:52
#define AD7616_SDZ_SAMPLE_NO
Definition: ad7616_sdz.c:61
AXI ADC Initialization Parameters structure.
Definition: axi_adc_core.h:143
#define DAC_FIFO_BYPASS_GPIO
Definition: parameters.h:169
mykonosErr_t MYKONOS_radioOn(mykonosDevice_t *device)
Instructs the ARM processor to move the radio state to the Radio ON state.
Definition: mykonos.c:11575
struct axi_dmac * rx_dmac
Definition: iio_axi_adc.h:81
Header file of HMC7044, HMC7043 Driver.
uint32_t refA_Frequency_Hz
Definition: t_ad9528.h:100
mykonosErr_t MYKONOS_enableTrackingCals(mykonosDevice_t *device, uint32_t enableMask)
Sets which ARM tracking cals are enabled during the radioOn state.
Definition: mykonos.c:11742
int32_t axi_adc_write(struct axi_adc *adc, uint32_t reg_addr, uint32_t reg_data)
AXI ADC Data Write.
Definition: axi_adc_core.c:71
Driver for the Analog Devices AXI CLKGEN.
JESD setup and initialization routines.
uint16_t generateSwitchCombination(struct eit_config eitCfg, struct electrode_combo *swSeq)
Definition: app.c:319
int32_t axi_dmac_transfer_wait_completion(struct axi_dmac *dmac, uint32_t timeout_ms)
Definition: axi_dmac.c:525
@ AD77681_FAST
Definition: ad77681.h:348
IIO application descriptor.
Definition: iio_app.h:80
struct jesd204_dev * jdev
Definition: axi_jesd204_rx.h:81
mykonosErr_t MYKONOS_runInitCals(mykonosDevice_t *device, uint32_t calMask)
Runs the Mykonos initialization calibrations.
Definition: mykonos.c:11272
#define pr_err(fmt, args...)
Definition: no_os_print_log.h:88
int talise_multi_chip_sync(taliseDevice_t *pd, int step)
Definition: app_talise.c:500
#define AD9081_JRX_TPL_PHASE_ADJUST
Definition: app_config.h:70
@ TALISE_A
Definition: app_talise.h:41
#define AXI_ADC_RSTN
Definition: axi_adc_core.h:47
int32_t no_os_uart_read(struct no_os_uart_desc *desc, uint8_t *data, uint32_t bytes_number)
Read data from UART.
Definition: no_os_uart.c:118
void clocking_deinit(void)
Definition: app_clocking.c:728
mykonosErr_t MYKONOS_setRx2ManualGain(mykonosDevice_t *device, uint8_t gainIndex)
Sets the Rx2 Manual Gain index.
Definition: mykonos.c:3733
uint32_t * commands_data
Definition: spi_engine.h:167
void * buff
Definition: iio_app.h:64
#define IIO_DEV_COUNT
Definition: parameters.h:45
volatile bool transfer_done
Definition: axi_dmac.h:104
uint32_t period_ns
Definition: no_os_pwm.h:70
Header file of Delay functions.
uint32_t flags
Definition: xilinx_spi.h:76
uint32_t axi_jesd204_rx_status_read(struct axi_jesd204_rx *jesd)
Read status of the JESD204 Receive Peripherial.
Definition: axi_jesd204_rx.c:212
const struct no_os_gpio_platform_ops xil_gpio_ops
Xilinx platform specific GPIO platform ops structure.
Definition: xilinx_gpio.c:450
char * name
Definition: iio_app.h:68
void SendResultUint32(uint32_t *pData, uint32_t nDataCount)
Definition: app.c:220
const char * name
Definition: no_os_clk.h:46
@ AD77681_BUFn_ENABLED
Definition: ad77681.h:433
Definition: clk_axi_clkgen.h:50
int32_t app_ad9083_status(struct app_ad9083 *app)
Check AD9083 link status.
Definition: app_ad9083.c:103
enum ad7746_exc_pin excb
Definition: ad7746.h:150
AXI ADC Device Descriptor.
Definition: axi_adc_core.h:122
#define AD9081_RX_JESD_MODE
Definition: app_config.h:82
#define pr_info(fmt, args...)
Definition: no_os_print_log.h:115
int32_t hmc7044_init(struct hmc7044_dev **device, const struct hmc7044_init_param *init_param)
Definition: hmc7044.c:1466
uint8_t uc
Definition: app_ad9083.h:14
int32_t axi_clkgen_set_rate(struct axi_clkgen *clkgen, uint32_t rate)
axi_clkgen_set_rate
Definition: clk_axi_clkgen.c:414
#define AD7768_SAMPLE_SIZE
Definition: ad7768.h:115
#define ADC_DDR_BASEADDR
Definition: main.c:62
Definition: no_os_clk.h:64
struct xil_gpio_init_param xil_gpio_param
Definition: ad7616_sdz.c:103
mykonosErr_t MYKONOS_loadArmFromBinary(mykonosDevice_t *device, uint8_t *binary, uint32_t count)
Loads binary byte array into ARM program memory.
Definition: mykonos.c:13195
@ TRACK_TX2_QEC
Definition: t_mykonos.h:854
struct axi_clkgen_init clkgen_init
Definition: ad7616_sdz.c:76
int32_t no_os_clk_init(struct no_os_clk_desc **desc, const struct no_os_clk_init_param *param)
@ NIOS_II_SPI
Definition: altera_spi.h:48
@ LOOPBACK_RX_LO_DELAY
Definition: t_mykonos.h:833
@ OBS_RX2_TXLO
Definition: t_mykonos.h:642
Clock setup and initialization routines.
Structure representing an offload message.
Definition: spi_engine.h:158
@ NO_OS_SPI_MODE_2
Definition: no_os_spi.h:65
adi_cms_jesd_param_t jesd_param
Definition: ad9081.h:55
int32_t axi_adc_init_begin(struct axi_adc **adc_core, const struct axi_adc_init *init)
Begin AXI ADC Initialization.
Definition: axi_adc_core.c:587
#define ADRV_CS
Definition: parameters.h:158
int32_t adf4371_clk_set_rate(struct adf4371_dev *dev, uint32_t chan, uint64_t rate)
Definition: adf4371.c:725
@ TX_PLL
Definition: t_mykonos.h:718
uint16_t nRefEl
Definition: app.h:44
@ UART_PS
Definition: xilinx_uart.h:59
#define AD9081_TX_LOGICAL_LANE_MAPPING
Definition: app_config.h:67
#define MUXBOARD_SIZE
Definition: mux_board.h:40
#define AD9081_TX_JESD_HD
Definition: app_config.h:63
#define GPIO_RESET_N
Definition: parameters.h:50
@ ADC_TUNER
Definition: t_mykonos.h:823
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:117
int32_t number
Definition: no_os_gpio.h:83
uint16_t nFrequency
Definition: app.h:48
mykonosErr_t MYKONOS_readRxFramerStatus(mykonosDevice_t *device, uint8_t *framerStatus)
Reads the transceiver's RX framer status.
Definition: mykonos.c:10536
uint32_t device_id
Definition: ad9081.h:133
const char * name
Definition: axi_adc_core.h:124
#define AXI_ADC_ENABLE
Definition: axi_adc_core.h:87
const char * name
Definition: clk_altera_a10_fpll.h:52
iio configuration.
Definition: iio_axi_adc.h:77
uint32_t device_id
Definition: xilinx_gpio.h:68
#define AD9081_DAC_FREQUENCY
Definition: app_config.h:42
@ AD7746_EXC_PIN_DISABLED
Definition: ad7746.h:135
@ AD77681_POSITIVE_FS
Definition: ad77681.h:379
bool bSweepEn
Definition: app.h:55
int32_t axi_clkgen_init(struct axi_clkgen **clk, const struct axi_clkgen_init *init)
axi_clkgen_init
Definition: clk_axi_clkgen.c:520
struct hmc7044_dev * hmc7044_dev
Definition: app_clock.c:52
Definition: clk_axi_clkgen.h:44
uint32_t ClrMCUIntFlag(void)
Definition: app.c:77
Driver for the Analog Devices AXI-DAC-CORE module.
uint64_t rxPllLoFrequency_Hz
Definition: t_mykonos.h:1455
Header file of ADF4371 Driver.
mykonosObsRxSettings_t * obsRx
Definition: t_mykonos.h:1700
Definition: iio_axi_dac.h:71
#define AD9081_RX_JESD_VERSION
Definition: app_config.h:84
#define NO_OS_ARRAY_SIZE(x)
Definition: no_os_util.h:49
Definition: jesd204.h:248
struct jesd204_dev * jdev
Definition: jesd204.h:240
unsigned int runningCmd
Definition: app.c:56
int32_t axi_jesd204_rx_remove(struct axi_jesd204_rx *jesd)
Free resoulces allocated for JESD204 RX peripheral.
Definition: axi_jesd204_rx.c:990
const char * name
Definition: axi_jesd204_rx.h:90
@ AD77681_CONTINUOUS_DATA_READ
Definition: ad77681.h:486
@ AD7746_MODE_CONT
Definition: ad7746.h:157
uint32_t base
Definition: axi_adc_core.h:147
#define AD9081_RX_JESD_L
Definition: app_config.h:91
int32_t ad7746_get_vt_data(struct ad7746_dev *dev, uint32_t *vt_data)
Waits until a conversion on a voltage/temperature channel has been finished and returns the output da...
Definition: ad7746.c:441
uint32_t tx_dma_baseaddr
Definition: spi_engine.h:147
int32_t ad7746_iio_remove(struct ad7746_iio_dev *desc)
Definition: iio_ad7746.c:770
@ AD77681_CONV_CONTINUOUS
Definition: ad77681.h:359
int ad7768_remove(ad7768_dev *dev)
Definition: ad7768.c:916
bool capen
Definition: ad7746.h:113
#define AD7768_RESOLUTION
Definition: ad7768.h:114
Definition: jesd204.h:239
@ AD7616_PARALLEL
Definition: ad7616.h:121
mykonosErr_t MYKONOS_readOrxFramerStatus(mykonosDevice_t *device, uint8_t *obsFramerStatus)
Reads the transceiver's Observation RX framer status.
Definition: mykonos.c:10577
#define AD7746_ADDRESS
Definition: ad7746.h:43
int32_t altera_a10_fpll_set_rate(struct altera_a10_fpll *fpll, uint32_t rate)
altera_a10_fpll_set_rate
Definition: clk_altera_a10_fpll.c:340
Structure holding the parameters for ad9083 app initialization.
Definition: app_ad9083.h:12
const char * json_profile
Definition: Navassa_CMOS_profile.h:1
@ NIOS_II_GPIO
Definition: altera_gpio.h:53
mykonosErr_t MYKONOS_readDeframerStatus(mykonosDevice_t *device, uint8_t *deframerStatus)
Reads the transceiver's deframer status.
Definition: mykonos.c:10622
int main(void)
Definition: app.c:75
Contains Talise ADI HAL function prototypes type definitions for adi_hal.c.
uint16_t nForceDist
Definition: app.h:42
struct axi_jesd204_tx * tx_jesd
Definition: app_jesd.c:50
@ TALISE_DEVICE_ID_MAX
Definition: app_talise.h:46
#define AXI_ADC_REG_RSTN
Definition: axi_adc_core.h:45
const struct no_os_gpio_platform_ops * platform_ops
Definition: no_os_gpio.h:87
#define RX1_ADC_BASEADDR
Definition: parameters.h:97
@ NO_OS_SPI_MODE_3
Definition: no_os_spi.h:67
int32_t iio_axi_adc_remove(struct iio_axi_adc_desc *desc)
Release resources.
Definition: iio_axi_adc.c:530
bool bImpedanceReadMode
Definition: app.h:53
const struct no_os_pwm_platform_ops axi_pwm_ops
AXI platform specific PWM platform ops structure.
Definition: axi_pwm.c:406
uint8_t serializerLanesEnabled
Definition: t_mykonos.h:1197
iio_axi_adc_descriptor
Definition: iio_axi_adc.h:53
#define WRITE_READ(no_bytes)
Definition: spi_engine.h:65
uint8_t spi_adrv_csn
Definition: adi_hal.h:33
Header file of AD7616 Driver.
unsigned int SinFreqValUINT
Definition: app.c:55
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:115
mykonosErr_t MYKONOS_setTx2Attenuation(mykonosDevice_t *device, uint16_t tx2Attenuation_mdB)
Sets the Tx2 RF output Attenuation (Step size is 0.05dB.)
Definition: mykonos.c:6449
int32_t altera_a10_fpll_remove(struct altera_a10_fpll *fpll)
altera_a10_fpll_remove
Definition: clk_altera_a10_fpll.c:487
uint32_t device_id
Definition: no_os_spi.h:127
@ ADIERR_FAILED
Definition: common.h:37
@ TRACK_ORX2_QEC
Definition: t_mykonos.h:850
#define RX_OS_CLKGEN_BASEADDR
Definition: parameters.h:122
Clock setup and initialization routines.
int32_t axi_dmac_remove(struct axi_dmac *dmac)
Definition: axi_dmac.c:367
#define SPI_CS_DECODE
Definition: xilinx_spi.h:47
#define AD9081_RX_JESD_M
Definition: app_config.h:85
Header file of Clock Driver.
@ ID_AD7746
Definition: ad7746.h:108
#define RX_DMA_BASEADDR
Definition: parameters.h:64
const struct no_os_uart_platform_ops aducm_uart_ops
aducm3029 platform specific UART platform ops structure
Definition: aducm3029_uart.c:501
void * extra_spi
Definition: adi_hal.h:32
#define RX_OS_XCVR_BASEADDR
Definition: parameters.h:130
#define AD7768_DMA_BASEADDR
Definition: parameters.h:44
uint8_t chip_select
Definition: no_os_spi.h:131
@ AD7768_CH_NO
Definition: ad7768.h:179
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:126
void setMuxSwitch(struct no_os_i2c_desc *i2c, struct ad5940_dev *ad5940, struct electrode_combo sw, uint16_t nElCount)
Definition: mux_board.c:91
mykonosGpioErr_t
Enum of unique error codes from the Mykonos GPIO API functions. Each error condition in the library s...
Definition: t_mykonos_gpio.h:30
struct iio_data_buffer * read_buff
Definition: iio_app.h:71
Definition: axi_dmac.h:102
#define no_os_min(x, y)
Definition: no_os_util.h:59
#define SPI_ENGINE_OFFLOAD_EXAMPLE
Definition: ad77681evb.c:92
int32_t axi_jesd204_tx_lane_clk_enable(struct axi_jesd204_tx *jesd)
JESD204 TX Lane Clock Enable.
Definition: axi_jesd204_tx.c:147
enum xil_spi_type type
Definition: spi_engine.h:87
uint16_t F_plus
Definition: mux_board.h:51
struct axi_dmac * rx_dmac
Definition: main.c:171
int jesd204_fsm_start(struct jesd204_topology *topology, unsigned int link_idx)
#define CS_HIGH
Definition: spi_engine.h:72
@ RX_PLL
Definition: t_mykonos.h:717
Driver for the ADI AXI-ADXCVR Module.
Stucture holding the UART descriptor.
Definition: no_os_uart.h:134
mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device)
Sets the Mykonos low voltage GPIO configuration registers.
Definition: mykonos_gpio.c:2835
uint8_t deserializerLanesEnabled
Definition: t_mykonos.h:1253
int32_t iio_axi_adc_init(struct iio_axi_adc_desc **desc, struct iio_axi_adc_init_param *init)
Registers a iio_axi_adc_desc for reading/writing and parameterization of axi_adc device.
Definition: iio_axi_adc.c:476
Header file of AD7746 Driver.
int32_t axi_jesd204_tx_remove(struct axi_jesd204_tx *jesd)
Free resoulces allocated for JESD204 TX peripheral.
Definition: axi_jesd204_tx.c:912
struct spi_engine_offload_init_param spi_engine_offload_init_param
Definition: ad7616_sdz.c:63
struct no_os_spi_init_param * spi_init
Definition: adf4371.h:84
struct no_os_pwm_init_param trigger_pwm_init
Definition: ad7616_sdz.c:87
#define NO_OS_DIV_ROUND_UP(x, y)
Definition: no_os_util.h:52
struct ad7746_setup setup
Definition: ad7746.h:180
@ AD7616_OSR_0
Definition: ad7616.h:160
@ AD77681_AINn_ENABLED
Definition: ad77681.h:421
@ OBS_RX1_SNIFFERLO
Definition: t_mykonos.h:645
int32_t hmc7044_remove(struct hmc7044_dev *device)
Definition: hmc7044.c:1632
mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx2AttenIncPin, mykonosGpioSelect_t tx2AttenDecPin, uint8_t enable)
This API function configures the GPIO inputs for controlling Tx attenuation settings.
Definition: mykonos_gpio.c:1915
struct link_init_param * jtx_link_rx[2]
Definition: ad9081.h:207
@ RX_QEC_INIT
Definition: t_mykonos.h:836
struct axi_dmac * tx_dmac
Definition: main.c:181
const struct no_os_gpio_platform_ops altera_gpio_ops
Altera platform specific GPIO platform ops structure.
Definition: altera_gpio.c:253
uint32_t max_speed_hz
Definition: no_os_i2c.h:68
Definition: axi_dac_core.h:87
int main(void)
main
Definition: ad7768_evb.c:61
#define TX_XCVR_BASEADDR
Definition: parameters.h:58
Structure to hold AD9528 settings.
Definition: t_ad9528.h:179
mykonosDevice_t mykDevice
Definition: myk.c:485
uint64_t txPllLoFrequency_Hz
Definition: t_mykonos.h:1435
@ IRQ_DISABLED
Definition: axi_dmac.h:79
#define PHY_CS
Definition: parameters.h:49
Header file of the AD7768-1 Driver.
bool bMagnitudeMode
Definition: app.h:50
#define RX2_DMA_BASEADDR
Definition: parameters.h:92
unsigned char firmware_Mykonos_M3_bin[]
Definition: Mykonos_M3.h:324
@ TRACK_RX1_QEC
Definition: t_mykonos.h:847
int32_t app_clock_remove(void)
Application clocking remove.
Definition: app_clock.c:371
Structure holding the initialization parameters for Altera platform specific SPI parameters.
Definition: altera_spi.h:56
struct axi_jesd204_rx * rx_os_jesd
Definition: app_jesd.c:57
int32_t axi_dac_set_datasel(struct axi_dac *dac, int32_t chan, enum axi_dac_data_sel sel)
AXI DAC Set Data type for specific channel.
Definition: axi_dac_core.c:373
Driver for the Altera ADXCVR Configuration.
#define MULTIDEVICE_INSTANCE_COUNT
Definition: app_config.h:39
uint16_t channel_b
Definition: ad7616.h:235
const char * name
Definition: axi_dac_core.h:63
int ad7768_set_power_mode_and_sampling_freq(ad7768_dev *dev, enum ad7768_power_modes_raw mode)
Definition: ad7768.c:877
#define JESD204_LINKS_ALL
Definition: jesd204.h:49
uint8_t M
Definition: t_mykonos.h:1193
Structure holding the parameters for app jesd initialization.
Definition: app_jesd.h:48
struct no_os_clk * jesd_rx_clk
Definition: app_ad9083.h:16
adiHalErr_t ADIHAL_sysrefReq(void *devHalInfo, sysrefReqMode_t mode)
Performs a SYSREF request to the clock generation device.
Definition: no_os_hal.c:144
#define TX1_DMA_BASEADDR
Definition: parameters.h:93
mykonosErr_t MYKONOS_checkPllsLockStatus(mykonosDevice_t *device, uint8_t *pllLockStatus)
Checks if the PLLs are locked.
Definition: mykonos.c:2444
struct iio_data_buffer * write_buff
Definition: iio_app.h:72
@ AD77681_BUFp_ENABLED
Definition: ad77681.h:440
@ SPI_PL
Definition: xilinx_spi.h:60
uint32_t deviceClock_kHz
Definition: t_mykonos.h:1528
Definition: mux_board.h:50
struct axi_clkgen * tx_clkgen
Definition: app_clocking.c:91
uint16_t S_plus
Definition: mux_board.h:52
mykonosErr_t MYKONOS_resetDevice(mykonosDevice_t *device)
Performs a hard reset on the MYKONOS DUT (Toggles RESETB pin on device)
Definition: mykonos.c:248
#define AD9081_TX_JESD_L
Definition: app_config.h:61
struct no_os_clk * dev_clk
Definition: ad9081.h:158
int32_t app_ad9083_init(struct app_ad9083 **app, struct app_ad9083_init *init_param)
Initialize the AD9083 app.
Definition: app_ad9083.c:142
uint8_t M
Definition: t_mykonos.h:1249
@ PATH_DELAY
Definition: t_mykonos.h:829
int ADG2128_SwRst(struct ad5940_dev *dev)
Definition: app.c:63
struct no_os_gpio_desc * gpio_reset
Definition: ad7768.h:228
Driver for the Analog Devices AXI-DMAC core.
#define DAC_DDR_BASEADDR
Definition: parameters.h:41
mykonosErr_t MYKONOS_initArm(mykonosDevice_t *device)
Resets the ARM processor and performs initialization.
Definition: mykonos.c:13061
uint8_t num_channels
Definition: axi_adc_core.h:149
Header file of ad9083 Driver.
#define AD9081_RX_MAIN_DECIMATION
Definition: app_config.h:101
#define AD9081_RX_JESD_K
Definition: app_config.h:87
uint32_t vcxo_Frequency_Hz
Definition: t_ad9528.h:108
void ad7768_set_available_sampl_freq(ad7768_dev *dev)
Definition: ad7768.c:846
@ AD77681_VCM_HALF_VCC
Definition: ad77681.h:447
uint32_t src_addr
Definition: axi_dmac.h:106
void iio_axi_dac_get_dev_descriptor(struct iio_axi_dac_desc *desc, struct iio_device **dev_descriptor)
Create structure describing a device, channels and attributes.
Definition: iio_axi_dac.c:646
@ SNIFFER_PLL
Definition: t_mykonos.h:719
Header file of AD7768 Driver.
void talise_shutdown(taliseDevice_t *const pd)
Definition: app_talise.c:756
Definition: hmc7044.h:102
mykonosErr_t MYKONOS_setObsRxManualGain(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh, uint8_t gainIndex)
Sets the Rx gain of the ObsRx channel.
Definition: mykonos.c:5423
#define AD9081_RX_MAIN_ENABLE
Definition: app_config.h:103
#define AD7616_RX_CLKGEN_BASEADDR
Definition: parameters.h:42
unsigned int num
Definition: hmc7044.h:48
uint8_t uc
Definition: app_jesd.h:50
struct no_os_spi_init_param * spi_init
Definition: hmc7044.h:103
@ TX_BB_FILTER
Definition: t_mykonos.h:822
#define AD9081_TX_JESD_CS
Definition: app_config.h:60
Structure holding CLK descriptor.
Definition: no_os_clk.h:75
int32_t app_clock_init(struct no_os_clk dev_refclk[MULTIDEVICE_INSTANCE_COUNT])
Application clock setup.
Definition: app_clock.c:69
struct ad7746_exc exc
Definition: ad7746.h:173
uint32_t outFrequency_Hz[14]
Definition: t_ad9528.h:132
enum gpio_type type
Definition: altera_gpio.h:63
mykonosErr_t MYKONOS_abortInitCals(mykonosDevice_t *device, uint32_t *calsCompleted)
Aborts from an on going ARM init calibration operation.
Definition: mykonos.c:11420
int32_t app_jesd_remove(struct app_jesd *app)
Free the resources allocated by app_jesd_init().
Definition: app_jesd.c:137
#define AD7616_TRIGGER_PULSE_WIDTH_NS
Definition: ad7616.h:109
uint32_t axi_jesd204_tx_status_read(struct axi_jesd204_tx *jesd)
Read status of the JESD204 Transmit Peripherial.
Definition: axi_jesd204_tx.c:170
Definition: ad77681.h:548
Definition: axi_dac_core.h:61
Header file of iio_axi_adc.
void * dev
Definition: no_os_clk.h:56
Definition: altera_adxcvr.h:102
struct ad7746_init_param * ad7746_initial
Definition: iio_ad7746.h:49
int32_t axi_adc_init_finish(struct axi_adc *adc)
Begin AXI ADC Initialization.
Definition: axi_adc_core.c:612
uint32_t tx_addr
Definition: spi_engine.h:169
mykonosErr_t
Enum of unique error codes from the Mykonos API functions. Each error condition in the library should...
Definition: t_mykonos.h:30
Application JESD initialization.
#define TRX_A_RESETB_GPIO
Definition: parameters.h:166
uint32_t dest_addr
Definition: axi_dmac.h:107
adiHalErr_t talise_setup(taliseDevice_t *const pd, taliseInit_t *const pi)
Definition: app_talise.c:81
#define AXI_ADC_REG_CHAN_CNTRL(c)
Definition: axi_adc_core.h:79
#define AD9081_TX_JESD_VERSION
Definition: app_config.h:54
uint32_t iqRate_kHz
Definition: t_mykonos.h:1292
const char * name
Definition: altera_adxcvr.h:103
uint8_t num_channels
Definition: axi_dac_core.h:67
#define AD9081_TX_JESD_SUBCLASS
Definition: app_config.h:53
#define AD9081_TX_JESD_NP
Definition: app_config.h:59
taliseInit_t talInit
Definition: talise_config.c:82
int app_main(struct no_os_i2c_desc *i2c, struct ad5940_init_param *ad5940_ip)
Definition: app.c:349
void * dev_desc
Definition: no_os_clk.h:52
struct axi_dmac * tx_dmac
Definition: iio_axi_dac.h:75
#define OFFLOAD_TX_EN
Definition: spi_engine.h:52
Configuration parameters for AD7746-EBZ demo project.
AXI DAC Device Descriptor.
Definition: axi_dac_core.h:48
struct axi_adc_init rx_adc_init
Definition: main.c:144
enum ad7616_interface interface
Definition: ad7616.h:192
mykonosRxProfile_t * orxProfile
Definition: t_mykonos.h:1464
#define RX2_ADC_BASEADDR
Definition: parameters.h:98
Parameters definition for AD7616-SDZ.
void ParseResultMode(struct measurement_config *pMeasCfg)
Definition: app.c:110
@ OBS_RXOFF
Definition: t_mykonos.h:640
Structure holding the initialization parameters for Xilinx platform specific UART parameters.
Definition: xilinx_uart.h:67
@ OBS_INTERNALCALS
Definition: t_mykonos.h:643
@ ADIHAL_OK
Definition: adi_hal.h:43
mykonosGpioErr_t MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx1AttenIncPin, mykonosGpioSelect_t tx1AttenDecPin, uint8_t enable, uint8_t useTx1ForTx2)
This API function configures the GPIO inputs for controlling Tx attenuation settings.
Definition: mykonos_gpio.c:1683
#define TX2_DMA_BASEADDR
Definition: parameters.h:94
mykonosTxSettings_t * tx
Definition: t_mykonos.h:1699
Platform dependent parameters.
enum xil_spi_type type
Definition: xilinx_spi.h:74
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:96
Driver for the Altera FPLL.
enum ad7746_id id
Definition: ad7746.h:179
enum cyclic_transfer cyclic
Definition: axi_dmac.h:105
struct spi_engine_init_param spi_eng_init_param
Definition: ad77681evb.c:54
const char * name
Definition: clk_altera_a10_fpll.h:45
#define AXI_ADC_FORMAT_ENABLE
Definition: axi_adc_core.h:85
Definition: no_os_clk.h:44
int iio_app_run(struct iio_app_desc *app)
Definition: iio_axi_dac.h:53
uint32_t GetMCUIntFlag(void)
Definition: app.c:72
#define AD9081_RX_CHAN_DECIMATION
Definition: app_config.h:102
uint32_t * commands
Definition: spi_engine.h:163
@ NO_OS_PWM_POLARITY_HIGH
Definition: no_os_pwm.h:57
int32_t ad7616_read_data_parallel(struct ad7616_dev *dev, uint32_t *buf, uint32_t samples)
Read from device in parallel mode. Enter register mode to read/write registers.
Definition: ad7616.c:753
uint32_t rx_dma_baseaddr
Definition: spi_engine.h:145
void MuxSupportedElectrodeCounts()
Definition: app.c:283
@ TX_ATTENUATION_DELAY
Definition: t_mykonos.h:826
void jesd_status(void)
Definition: app_jesd.c:151
mykonosRxSettings_t * rx
Definition: t_mykonos.h:1698
@ RX_LO_DELAY
Definition: t_mykonos.h:835
struct spi_engine_init_param spi_eng_init_param
Definition: ad7616_sdz.c:68
int32_t adf4371_clk_recalc_rate(struct adf4371_dev *dev, uint32_t chan, uint64_t *rate)
Definition: adf4371.c:692
#define AD9081_TX_MAIN_NCO_SHIFT
Definition: app_config.h:74
int main(void)
main
Definition: ad7616_sdz.c:148
struct iio_device * iio_dev
Definition: iio_ad7746.h:41
struct adxcvr * rx_adxcvr
Definition: app_jesd.c:52
struct axi_dac * tx_dac
Definition: iio_axi_dac.h:73
ADI_ERR AD9528_resetDevice(ad9528Device_t *device)
Performs a hard reset on the AD9528 DUT.
Definition: ad9528.c:26
Application JESD initialization.
Header file for UART driver stdout/stdin redirection.
volatile unsigned char szInSring[32]
mykonosJesd204bFramerConfig_t * framer
Definition: t_mykonos.h:1469
#define ADC_CHANNELS
Definition: iio_timer_trigger_example.h:41
#define AD9081_ADC_FREQUENCY
Definition: app_config.h:43
#define RX_XCVR_BASEADDR
Definition: parameters.h:66
Structure holding I2C address descriptor.
Definition: no_os_i2c.h:101
Structure holding the initialization parameters for axi PWM.
Definition: axi_pwm_extra.h:50
@ SPI_ENGINE
Definition: xilinx_spi.h:64
#define AD9081_TX_JESD_K
Definition: app_config.h:57
#define AD9081_TX_CHAN_GAIN
Definition: app_config.h:76
#define AD77681_REG_READ(x)
Definition: ad77681.h:316
#define AD9081_TX_DAC_CHAN_CROSSBAR
Definition: app_config.h:78
Structure holding the initialization parameters for Xilinx platform specific SPI parameters when usin...
Definition: xilinx_spi.h:72
struct no_os_clk_hw hmc7044_hw
Definition: app_clock.c:54
const struct no_os_clk_platform_ops hmc7044_clk_ops
hmc7044 clock ops
Definition: hmc7044.c:1691
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:49
int iio_app_init(struct iio_app_desc **app, struct iio_app_init_param app_init_param)
Data structure to hold Mykonos device settings.
Definition: t_mykonos.h:1695
#define AD9081_TX_JESD_N
Definition: app_config.h:58
mykonosJesd204bFramerConfig_t * framer
Definition: t_mykonos.h:1450
struct ad9083_phy * ad9083_phy
Definition: app_ad9083.h:25
Header file of I2C Interface.
#define TX1_DAC_BASEADDR
Definition: parameters.h:99
int32_t app_clocking_init(struct app_clocking **app, struct app_clocking_init *init_param)
Initialize the clocking app.
Definition: app_clocking.c:74
Header file of PWM Interface.
#define ADC_BUFFER_SAMPLES
Definition: parameters.h:161
Structure holding the initialization parameters for Altera platform specific GPIO parameters.
Definition: altera_gpio.h:61
#define OFFLOAD_RX_EN
Definition: spi_engine.h:53
@ AD7616_SW
Definition: ad7616.h:115
@ TRACK_RX2_QEC
Definition: t_mykonos.h:848
int32_t axi_adc_update_active_channels(struct axi_adc *adc, uint32_t mask)
Update active AXI ADC channels.
Definition: axi_adc_core.c:539
int32_t adf4371_init(struct adf4371_dev **device, const struct adf4371_init_param *init_param)
Definition: adf4371.c:741
Definition: axi_jesd204_tx.h:70
Structure holding the parameters for clocking app initialization.
Definition: app_clocking.h:43
void configMeasurement(struct measurement_config *oldCfg, struct measurement_config newCfg)
Definition: app.c:83
@ AD7746_EXCLVL_4_DIV_8
Definition: ad7746.h:144
#define GPIO_ADC_RESET_N
Definition: parameters.h:58
int32_t axi_jesd204_rx_watchdog(struct axi_jesd204_rx *jesd)
JESD204 RX Watchdog.
Definition: axi_jesd204_rx.c:479
@ AD77681_CRC
Definition: ad77681.h:384
struct axi_dmac_init rx_dmac_init
Definition: main.c:162
struct jesd204_dev * jdev
Definition: axi_jesd204_tx.h:92
Definition: clk_altera_a10_fpll.h:51
int32_t axi_dac_init(struct axi_dac **dac_core, const struct axi_dac_init *init)
AXI DAC Main Initialization.
Definition: axi_dac_core.c:934
#define AD77681_DMA_1_BASEADDR
Definition: parameters.h:45
uint8_t gpio_adrv_resetb_num
Definition: adi_hal.h:35
@ OBS_SNIFFER_B
Definition: t_mykonos.h:648
mykonosErr_t MYKONOS_enableSysrefToRxFramer(mykonosDevice_t *device, uint8_t enable)
Enables or disables SYSREF to the transceiver's RX framer.
Definition: mykonos.c:10437
struct axi_clkgen * rx_os_clkgen
Definition: app_clocking.c:92
@ NO
Definition: axi_dmac.h:98
#define ADXCVR_SYS_CLK_CPLL
Definition: axi_adxcvr.h:48
const struct no_os_uart_platform_ops xil_uart_ops
Xilinx platform specific UART platform ops structure.
Definition: xilinx_uart.c:520
Config file for AD9371 project.
uint32_t num
Definition: adf4371.h:56
int32_t axi_jesd204_tx_init_legacy(struct axi_jesd204_tx **jesd204, const struct jesd204_tx_init *init)
Device initialization.
Definition: axi_jesd204_tx.c:729
#define AD9081_RX_MAIN_NCO_SHIFT
Definition: app_config.h:105
void AD5940BiaStructInit(void)
Definition: app.c:291
volatile uint32_t ucInterrupted
Definition: app.c:58
const uint32_t sine_lut_iq[1024]
Definition: axi_dac_core.c:123
struct axi_adc * rx_adc
Definition: iio_axi_adc.h:79
int32_t axi_jesd204_rx_laneinfo_read(struct axi_jesd204_rx *jesd, uint32_t lane)
Read JESD204 RX Lane Info.
Definition: axi_jesd204_rx.c:415
#define FRAMER_LINK0_RX
Definition: ad9081.h:236
unsigned int no_os_hweight8(uint8_t word)
int32_t axi_adc_init(struct axi_adc **adc_core, const struct axi_adc_init *init)
AXI ADC Main Initialization.
Definition: axi_adc_core.c:641
#define AXI_ADC_MMCM_RSTN
Definition: axi_adc_core.h:46
#define TX2_DAC_BASEADDR
Definition: parameters.h:100
int32_t axi_dmac_init(struct axi_dmac **dmac_core, const struct axi_dmac_init *init)
Definition: axi_dmac.c:334
struct axi_pwm_init_param axi_pwm_init_params
Definition: ad7616_sdz.c:82
int32_t ad9081_init(struct ad9081_phy **dev, const struct ad9081_init_param *init_param)
Definition: ad9081.c:1419
void fpga_xcvr_deinit(void)
Definition: app_transceiver.c:187
struct ad77681_init_param ADC_default_init_param
Definition: ad77681evb.c:62
int32_t no_os_uart_init(struct no_os_uart_desc **desc, struct no_os_uart_init_param *param)
Initialize the UART communication peripheral.
Definition: no_os_uart.c:52
enum adi_adrv9001_SsiType adrv9002_ssi_type_detect(struct adrv9002_rf_phy *phy)
Definition: headless.c:98
struct hmc7044_dev * hmc7044_dev
Definition: app_clock.c:52
#define RX_CORE_BASEADDR
Definition: parameters.h:63
@ CYCLIC
Definition: axi_dmac.h:99
struct axi_dmac_init tx_dmac_init
Definition: main.c:172
mykonosErr_t MYKONOS_getArmVersion(mykonosDevice_t *device, uint8_t *majorVer, uint8_t *minorVer, uint8_t *rcVer, mykonosBuild_t *buildType)
Reads back the version of the ARM binary loaded into the Mykonos ARM memory.
Definition: mykonos.c:13617
void no_os_udelay(uint32_t usecs)
Wait until usecs microseconds passed.
Definition: aducm3029_delay.c:114
const char * getMykonosErrorMessage(mykonosErr_t errorCode)
Helper function for return of character string based on 32-bit mykonosErr_t enum value.
Definition: mykonos.c:7006
#define APPBUFF_SIZE
Definition: app.c:50
Structure holding the parameters for I2C initialization.
Definition: no_os_i2c.h:64
@ AD7616_10V
Definition: ad7616.h:156
ADI_ERR AD9528_requestSysref(ad9528Device_t *device, uint8_t enableSYSREF)
Send a SPI message to request a SYSREF pulse or continuous SYSREF from the AD9528.
Definition: ad9528.c:501
#define NULL
Definition: wrapper.h:64
Structure holding the parameters for UART initialization.
Definition: no_os_uart.h:110
void * dev
Definition: iio_app.h:69
struct no_os_clk jesd_rx_clk
Definition: app_jesd.h:69
mykonosErr_t MYKONOS_enableMultichipSync(mykonosDevice_t *device, uint8_t enableMcs, uint8_t *mcsStatus)
Sets up the chip for multichip sync, and cleans up after MCS.
Definition: mykonos.c:10395
const struct no_os_spi_platform_ops xil_spi_ops
Spi engine platform specific SPI platform ops structure.
Definition: xilinx_spi.c:453
mykonosErr_t MYKONOS_initialize(mykonosDevice_t *device)
Initializes the Mykonos device based on the desired device settings.
Definition: mykonos.c:600
mykonosErr_t MYKONOS_waitInitCals(mykonosDevice_t *device, uint32_t timeoutMs, uint8_t *errorFlag, uint8_t *errorCode)
Blocking waits for the Mykonos initialization calibrations to complete.
Definition: mykonos.c:11315
@ TX_LO_LEAKAGE_EXTERNAL
Definition: t_mykonos.h:831
Header file of iio_ad9083.
Structure containing the init parameters needed by the SPI engine.
Definition: spi_engine.h:83
@ TIA_3DB_CORNER
Definition: t_mykonos.h:824
int32_t no_os_gpio_set_value(struct no_os_gpio_desc *desc, uint8_t value)
Set the value of the specified GPIO.
Definition: no_os_gpio.c:197
const struct no_os_i2c_platform_ops aducm_i2c_ops
ADuCM3029 platform specific I2C platform ops structure.
Definition: aducm3029_i2c.c:314
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:113
@ TX_QEC_INIT
Definition: t_mykonos.h:832
mykonosErr_t MYKONOS_enableSysrefToDeframer(mykonosDevice_t *device, uint8_t enable)
Enables or disables SYSREF to the transceiver's deframer.
Definition: mykonos.c:10497
#define CLK_CS
Definition: parameters.h:157
#define AXI_ADC_CRC_EN
Definition: axi_adc_core.h:55
ad9528Device_t clockAD9528_
Definition: myk_ad9528init.c:55
mykonosDigClocks_t * clocks
Definition: t_mykonos.h:1702
#define AD9081_RX_CHAN_ENABLE
Definition: app_config.h:104
Definition: clk_altera_a10_fpll.h:44
#define AD9081_RX_JESD_NP
Definition: app_config.h:89
Structure holding channels and attributes of a device.
Definition: iio_types.h:247
int32_t iio_axi_dac_init(struct iio_axi_dac_desc **desc, struct iio_axi_dac_init_param *init)
Registers a iio_axi_dac_desc for reading/writing and parameterization of axi_dac device.
Definition: iio_axi_dac.c:659
Definition: axi_jesd204_rx.h:57
@ NO_OS_UART_PAR_NO
Definition: no_os_uart.h:77
#define AD77681_SPI_CS
Definition: parameters.h:47
struct ad9081_jesd_link jrx_link_tx[2]
Definition: ad9081.h:83
int32_t altera_a10_fpll_init(struct altera_a10_fpll **a10_fpll, const struct altera_a10_fpll_init *init)
altera_a10_fpll_init
Definition: clk_altera_a10_fpll.c:466
@ LOOPBACK_RX_RX_QEC_INIT
Definition: t_mykonos.h:834
const struct no_os_spi_platform_ops spi_eng_platform_ops
Spi engine platform specific SPI platform ops structure.
Definition: spi_engine.c:61
int32_t axi_adc_remove(struct axi_adc *adc)
AXI ADC Resources deallocation.
Definition: axi_adc_core.c:681
#define AD9081_RX_JESD_N
Definition: app_config.h:88
#define GPIO_DEVICE_ID
Definition: parameters.h:83
@ AD77681_SINC5_FIR_DECx32
Definition: ad77681.h:400
Header file of iio_axi_dac.
int32_t app_jesd_init(struct no_os_clk clk[2], uint32_t reference_clk_khz, uint32_t rx_device_clk_khz, uint32_t tx_device_clk_khz, uint32_t rx_lane_clk_khz, uint32_t tx_lane_clk_khz)
Application JESD setup.
Definition: app_jesd.c:63
uint64_t snifferPllLoFrequency_Hz
Definition: t_mykonos.h:1472
const char * getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)
Helper function for return of character string based on 32-bit mykonosGpioErr_t enum value.
Definition: mykonos_gpio.c:37
uint8_t hw_ch_num
Definition: no_os_clk.h:48
struct ad7746_cap cap
Definition: ad7746.h:171
void * extra_gpio
Definition: adi_hal.h:34
void altera_a10_fpll_disable(struct altera_a10_fpll *fpll)
altera_a10_fpll_disable
Definition: clk_altera_a10_fpll.c:458
uint8_t device_id
Definition: no_os_uart.h:112
int32_t ad77681_spi_read_adc_data(struct ad77681_dev *dev, uint8_t *adc_data, enum ad77681_data_read_mode mode)
Definition: ad77681.c:274
int32_t spi_engine_offload_transfer(struct no_os_spi_desc *desc, struct spi_engine_offload_message msg, uint32_t no_samples)
Initiate a SPI transfer in offload mode.
Definition: spi_engine.c:809
int32_t ad7746_get_cap_data(struct ad7746_dev *dev, uint32_t *cap_data)
Waits until a conversion on the capacitive channel has been finished and returns the output data.
Definition: ad7746.c:483
Driver for the Analog Devices AXI-JESD204-RX peripheral.
Application clocks initialization.
#define RX_JESD_BASEADDR
Definition: parameters.h:65
uint32_t app_jesd_status(struct app_jesd *app)
Definition: app_jesd.c:127
struct axi_dac_init tx_dac_init
Definition: main.c:155
unsigned int firmware_Mykonos_M3_bin_len
Definition: Mykonos_M3.h:8518
Structure holding the initialization parameters for Xilinx platform specific GPIO parameters.
Definition: xilinx_gpio.h:64
struct axi_jesd204_rx * rx_jesd
Definition: app_jesd.c:49
#define ADXCVR_SYS_CLK_QPLL0
Definition: axi_adxcvr.h:50
@ TRACK_TX1_QEC
Definition: t_mykonos.h:853
struct electrode_combo swComboSeq[256]
Definition: app.c:52
Contains macro definitions and function prototypes for mykonos.c.
@ SYSREF_CONT_ON
Definition: adi_hal.h:68
AD9361_InitParam default_init_param
Definition: main.c:183
#define AD77681_EVB_SAMPLE_NO
Definition: parameters.h:44
@ MYKONOS_ERR_OK
Definition: t_mykonos.h:32
#define TX_DMA_BASEADDR
Definition: parameters.h:111
#define AD9081_TX_CHAN_NCO_SHIFT
Definition: app_config.h:75
int32_t adxcvr_remove(struct adxcvr *xcvr)
adxcvr_remove
Definition: altera_adxcvr.c:489
void * extra
Definition: no_os_gpio.h:89
int32_t ad7616_read_data_serial(struct ad7616_dev *dev, struct ad7616_conversion_result *results, uint32_t samples)
Read conversion result from device, checking with CRC if enabled.
Definition: ad7616.c:664
int32_t axi_dac_remove(struct axi_dac *dac)
AXI DAC Resources deallocation.
Definition: axi_dac_core.c:1018
struct no_os_spi_init_param ad7616_spi_init
Definition: ad7616_sdz.c:95
Structure containing the init parameters needed by the offload module.
Definition: spi_engine.h:143
void SendResultFloat32(float *data, uint32_t DataCount)
Definition: app.c:231
Header file of GPIO Interface.
enum axi_dac_data_sel sel
Definition: axi_dac_core.h:96
int32_t app_clock_remove(void)
Application clocking remove.
Definition: app_clock.c:371
@ DC_OFFSET
Definition: t_mykonos.h:825
JESD204B/C Receive Peripheral Initialization Structure.
Definition: axi_jesd204_rx.h:88
int get_sampling_frequency(struct axi_adc *dev, uint32_t chan, uint64_t *sampling_freq_hz)
Definition: headless.c:75
FPGA XCVR setup and initialization routines.
struct no_os_spi_desc * spi_desc
Definition: ad77681.h:524
const char * name
Definition: axi_jesd204_tx.h:101
Header file of AD9081 Driver.
Definition: iio_types.h:151
Cross-point switch handling code.
Definition: iio_ad7746.h:39
mykonosErr_t MYKONOS_setRx1ManualGain(mykonosDevice_t *device, uint8_t gainIndex)
Sets the Rx1 Manual Gain Index.
Definition: mykonos.c:3687
@ AD77681_CONV_16BIT
Definition: ad77681.h:368
#define AD77681_REG_ADC_DATA
Definition: ad77681.h:71
@ GPIO_PL
Definition: xilinx_gpio.h:54
struct no_os_uart_desc * uart
Definition: main.c:74
Header file of UART interface.
int32_t axi_dmac_transfer_start(struct axi_dmac *dmac, struct axi_dma_transfer *dma_transfer)
Definition: axi_dmac.c:385
int32_t axi_dac_load_custom_data(struct axi_dac *dac, const uint32_t *custom_data_iq, uint32_t custom_tx_count, uint32_t address)
AXI DAC Load custom data.
Definition: axi_dac_core.c:846
int32_t ad7768_spi_read(ad7768_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7768.c:65
int32_t ad7746_iio_init(struct ad7746_iio_dev **iio_dev, struct ad7746_iio_init_param *init_param)
Definition: iio_ad7746.c:741
@ AXI_DAC_DATA_SEL_DMA
Definition: axi_dac_core.h:77
adiHalErr_t jesd_init(uint32_t rx_div40_rate_hz, uint32_t tx_div40_rate_hz, uint32_t rx_os_div40_rate_hz)
Definition: app_jesd.c:59
uint16_t nSenseDist
Definition: app.h:43
uint32_t base_addr
Definition: axi_pwm_extra.h:52
#define RX_OS_DMA_BASEADDR
Definition: parameters.h:241
uint32_t AppBuff[APPBUFF_SIZE]
Definition: app.c:51
struct no_os_i2c_desc * i2c
Definition: main.c:73
uint32_t iqRate_kHz
Definition: t_mykonos.h:1275
#define TX_JESD_BASEADDR
Definition: parameters.h:90
#define AD7768_REG_REV_ID
Definition: ad7768.h:56
int32_t axi_clkgen_remove(struct axi_clkgen *clkgen)
axi_clkgen_remove
Definition: clk_axi_clkgen.c:541
Header file of utility functions.
#define DAC_BUFFER_SAMPLES
Definition: parameters.h:160
struct no_os_uart_init_param iio_uart_ip
Definition: common_data.c:46
int32_t no_os_sign_extend32(uint32_t value, int index)
#define RX_OBS_DMA_BASEADDR
Definition: parameters.h:142
mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx1GainIncPin, mykonosGpioSelect_t rx1GainDecPin, uint8_t enable)
This API function configures the GPIO inputs for controlling RX gain.
Definition: mykonos_gpio.c:617
#define AD7616_DMA_BASEADDR
Definition: parameters.h:41
uint32_t ref_clk_hz
Definition: spi_engine.h:85
@ NO_OS_SPI_MODE_0
Definition: no_os_spi.h:61
uint32_t rx_addr
Definition: spi_engine.h:171
enum spi_type type
Definition: altera_spi.h:58
uint16_t nElectrodeCnt
Definition: app.h:41
@ OBS_SNIFFER_A
Definition: t_mykonos.h:647
mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx2GainIncPin, mykonosGpioSelect_t rx2GainDecPin, uint8_t enable)
This API function configures the GPIO inputs for controlling RX gain.
Definition: mykonos_gpio.c:825
mykonosErr_t MYKONOS_enableSysrefToObsRxFramer(mykonosDevice_t *device, uint8_t enable)
Enables or disables SYSREF to the transceiver's Observation RX framer.
Definition: mykonos.c:10467
uint16_t adc_buffer[ADC_BUFFER_SAMPLES *ADC_CHANNELS]
Definition: main.c:100
#define AD7768_HEADER_SIZE
Definition: parameters.h:51
#define AD9081_TX_MAIN_INTERPOLATION
Definition: app_config.h:72
int32_t ad7768_setup_begin(ad7768_dev **device, ad7768_init_param init_param)
Definition: ad7768.c:651
void iio_axi_adc_get_dev_descriptor(struct iio_axi_adc_desc *desc, struct iio_device **dev_descriptor)
Get device descriptor.
Definition: iio_axi_adc.c:463
void SendResultIeee754(float *data, uint32_t DataCount)
Definition: app.c:242
#define AD9081_TX_CHAN_INTERPOLATION
Definition: app_config.h:73
adiHalErr_t fpga_xcvr_init(uint32_t rx_lane_rate_khz, uint32_t tx_lane_rate_khz, uint32_t rx_os_lane_rate_khz, uint32_t device_clock)
Definition: app_transceiver.c:62
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:147
@ NO_OS_UART_CS_8
Definition: no_os_uart.h:66
#define AXI_ADC_FORMAT_SIGNEXT
Definition: axi_adc_core.h:83
struct iio_app_device * devices
Definition: iio_app.h:107
#define AD9081_RX_JESD_CS
Definition: app_config.h:90
JESD204B/C Transmit Peripheral Initialization Structure.
Definition: axi_jesd204_tx.h:99
uint32_t size
Definition: axi_dmac.h:103
enum xil_gpio_type type
Definition: xilinx_gpio.h:66
uint16_t F_minus
Definition: mux_board.h:54
@ AD77681_MCLK_DIV_8
Definition: ad77681.h:353
struct no_os_i2c_init_param i2c_init
Definition: ad7746.h:178
#define AD7616_SPI_ENGINE_BASEADDR
Definition: parameters.h:40
const char * name
Definition: axi_adc_core.h:145
struct no_os_spi_init_param * spi_param
Definition: ad7616.h:204
@ AD7746_VTMD_INT_TEMP
Definition: ad7746.h:120
@ AD7746_EXC_PIN_NORMAL
Definition: ad7746.h:137
#define AD77681_SPI_ENG_REF_CLK_FREQ_HZ
Definition: parameters.h:48
mykonosErr_t MYKONOS_setRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t rfPllLoFrequency_Hz)
Sets the RF PLL local oscillator frequency (RF carrier frequency).
Definition: mykonos.c:2155
uint16_t nAmplitudePP
Definition: app.h:49
int32_t axi_jesd204_rx_lane_clk_enable(struct axi_jesd204_rx *jesd)
JESD204 RX Lane Clock Enable.
Definition: axi_jesd204_rx.c:189
uint32_t nb_devices
Definition: iio_app.h:109
ad9528pll1Settings_t * pll1Settings
Definition: t_ad9528.h:182
ADI_ERR AD9528_initialize(ad9528Device_t *device)
Initializes the AD9528 by writing all SPI registers.
Definition: ad9528.c:303
struct no_os_gpio_init_param ad7616_gpio_reset
Definition: ad7616_sdz.c:107
Definition: axi_dmac.h:110
void SendResult(uint32_t *pData, uint16_t len, bool bImpedanceReadMode, bool bMagnitudeMode)
Definition: app.c:255
@ AD77681_AINp_ENABLED
Definition: ad77681.h:427
#define AD9081_RX_JESD_SUBCLASS
Definition: app_config.h:83
ADI_ERR AD9528_initDeviceDataStruct(ad9528Device_t *device, uint32_t vcxoFrequency_Hz, uint32_t refAFrequency_Hz, uint32_t outputDeviceClock_Hz)
Helper function for ADI transceiver eval boards to init the AD9528 data structure.
Definition: ad9528.c:115
#define AD9081_RX_JESD_F
Definition: app_config.h:86
#define ADRV9001_I_Q_CHANNELS
Definition: parameters.h:52
struct jesd204_dev * jdev
Definition: ad9081.h:76
uint32_t spi_msg_cmds[6]
Definition: ad77681evb.c:52
int32_t app_clocking_remove(struct app_clocking *app)
Free the resources allocated by app_clocking_init().
Definition: app_clocking.c:255
#define AD9081_TX_JESD_F
Definition: app_config.h:56
#define AD9081_RX_LOGICAL_LANE_MAPPING
Definition: app_config.h:97
#define AD9081_RX_LINK_CONVERTER_SELECT
Definition: app_config.h:99
int32_t adxcvr_init(struct adxcvr **ad_xcvr, const struct adxcvr_init *init)
adxcvr_init
Definition: altera_adxcvr.c:438
uint16_t S_minus
Definition: mux_board.h:53
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:125
Driver for the Analog Devices AXI-JESD204-TX peripheral.
#define TALISE_NUM_CHANNELS
Definition: app_talise.h:51
mykonosErr_t MYKONOS_setTx1Attenuation(mykonosDevice_t *device, uint16_t tx1Attenuation_mdB)
Sets the Tx1 RF output Attenuation.
Definition: mykonos.c:6386
Structure holding ad9083 app descriptor.
Definition: app_ad9083.h:23
#define RX_OS_CORE_BASEADDR
Definition: parameters.h:139
adiHalErr_t
Enum of possible Errors Detected by HAL layer to be communicated to ADI APIs.
Definition: adi_hal.h:42
uint32_t dac_buffer[DAC_BUFFER_SAMPLES]
Definition: iio_example.c:71
#define AXI_ADC_REG_CNTRL
Definition: axi_adc_core.h:49
