![]() |
no-OS
|
Driver for the Analog Devices AXI-ADC-CORE module. More...
Classes | |
| struct | axi_adc |
| AXI ADC Device Descriptor. More... | |
| struct | axi_adc_init |
| AXI ADC Initialization Parameters structure. More... | |
Enumerations | |
| enum | axi_adc_pn_sel { AXI_ADC_PN9 = 0 , AXI_ADC_PN23A = 1 , AXI_ADC_PN7 = 4 , AXI_ADC_PN15 = 5 , AXI_ADC_PN23 = 6 , AXI_ADC_PN31 = 7 , AXI_ADC_PN_CUSTOM = 9 , AXI_ADC_PN_RAMP_NIBBLE = 10 , AXI_ADC_PN_RAMP_16 = 11 , AXI_ADC_PN_END = 12 } |
Functions | |
| int32_t | axi_adc_init_begin (struct axi_adc **adc_core, const struct axi_adc_init *init) |
| Begin AXI ADC Initialization. | |
| int32_t | axi_adc_init_finish (struct axi_adc *adc) |
| Begin AXI ADC Initialization. | |
| int32_t | axi_adc_init (struct axi_adc **adc_core, const struct axi_adc_init *init) |
| AXI ADC Main Initialization. | |
| int32_t | axi_adc_remove (struct axi_adc *adc) |
| AXI ADC Resources deallocation. | |
| int32_t | axi_adc_read (struct axi_adc *adc, uint32_t reg_addr, uint32_t *reg_data) |
| AXI ADC Data read. | |
| int32_t | axi_adc_write (struct axi_adc *adc, uint32_t reg_addr, uint32_t reg_data) |
| AXI ADC Data Write. | |
| int32_t | axi_adc_set_pnsel (struct axi_adc *adc, uint32_t chan, enum axi_adc_pn_sel sel) |
| Set AXI ADC PN sequence. | |
| int32_t | axi_adc_pn_mon (struct axi_adc *adc, enum axi_adc_pn_sel sel, uint32_t delay_ms) |
| Monitor the AXI ADC PN Sequence. | |
| int32_t | axi_adc_get_sampling_freq (struct axi_adc *adc, uint32_t chan, uint64_t *sampling_freq) |
| Get the AXI ADC Sampling Frequency. | |
| void | axi_adc_idelay_set (struct axi_adc *adc, uint32_t lane, uint32_t val) |
| Set input/output delay primitive for specific interface line. | |
| int32_t | axi_adc_delay_set (struct axi_adc *adc, uint32_t no_of_lanes, uint32_t delay) |
| Set input/output delay primitive for number of lines. | |
| int32_t | axi_adc_delay_calibrate (struct axi_adc *core, uint32_t no_of_lanes, enum axi_adc_pn_sel sel) |
| Calibrate Delay using specific PN sequence. | |
| int32_t | axi_adc_set_calib_phase (struct axi_adc *adc, uint32_t chan, int32_t val, int32_t val2) |
| Calibrate phase for specific AXI ADC channel. | |
| int32_t | axi_adc_get_calib_phase (struct axi_adc *adc, uint32_t chan, int32_t *val, int32_t *val2) |
| Get the phase calibration values for AXI ADC channel. | |
| int32_t | axi_adc_set_calib_scale (struct axi_adc *adc, uint32_t chan, int32_t val, int32_t val2) |
| Calibrate scale for specific AXI ADC channel. | |
| int32_t | axi_adc_get_calib_scale (struct axi_adc *adc, uint32_t chan, int32_t *val, int32_t *val2) |
| Get the scale calibration values for AXI ADC channel. | |
| int32_t | axi_adc_set_calib_bias (struct axi_adc *adc, uint32_t chan, int32_t val, int32_t val2) |
| Calibrate bias for specific AXI ADC channel. | |
| int32_t | axi_adc_get_calib_bias (struct axi_adc *adc, uint32_t chan, int32_t *val, int32_t *val2) |
| Get the scale calibration values for AXI ADC channel. | |
| int32_t | axi_adc_update_active_channels (struct axi_adc *adc, uint32_t mask) |
| Update active AXI ADC channels. | |
Driver for the Analog Devices AXI-ADC-CORE module.
Copyright 2018(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
| #define ADC_DELAY_ADDRESS | ( | x | ) |
| #define ADC_DELAY_RWN NO_OS_BIT(16) |
| #define ADC_DELAY_SEL NO_OS_BIT(17) |
| #define ADC_DELAY_WDATA | ( | x | ) |
| #define ADC_TO_DELAY_ADDRESS | ( | x | ) |
| #define ADC_TO_DELAY_WDATA | ( | x | ) |
| #define AXI_ADC_ADC_DATA_SEL | ( | x | ) |
| #define AXI_ADC_ADC_PN_SEL | ( | x | ) |
| #define AXI_ADC_CLK_FREQ | ( | x | ) |
| #define AXI_ADC_CLK_RATIO | ( | x | ) |
| #define AXI_ADC_CMOS_OR_LVDS_N NO_OS_BIT(7) |
| #define AXI_ADC_CRC_EN NO_OS_BIT(8) |
| #define AXI_ADC_DATAFORMAT_DISABLE NO_OS_BIT(2) |
| #define AXI_ADC_DCFILT_COEFF | ( | x | ) |
| #define AXI_ADC_DCFILT_ENB NO_OS_BIT(8) |
| #define AXI_ADC_DCFILT_OFFSET | ( | x | ) |
| #define AXI_ADC_DCFILTER_DISABLE NO_OS_BIT(1) |
| #define AXI_ADC_DDR_EDGESEL NO_OS_BIT(1) |
| #define AXI_ADC_DELAY_CONTROL_DISABLE NO_OS_BIT(5) |
| #define AXI_ADC_ENABLE NO_OS_BIT(0) |
| #define AXI_ADC_FORMAT_ENABLE NO_OS_BIT(4) |
| #define AXI_ADC_FORMAT_SIGNEXT NO_OS_BIT(6) |
| #define AXI_ADC_FORMAT_TYPE NO_OS_BIT(5) |
| #define AXI_ADC_IQCOR_COEFF_1 | ( | x | ) |
| #define AXI_ADC_IQCOR_COEFF_2 | ( | x | ) |
| #define AXI_ADC_IQCOR_ENB NO_OS_BIT(9) |
| #define AXI_ADC_IQCORRECTION_DISABLE NO_OS_BIT(0) |
| #define AXI_ADC_MMCM_RSTN NO_OS_BIT(1) |
| #define AXI_ADC_MODE_1R1T NO_OS_BIT(4) |
| #define AXI_ADC_MUX_OVER_RANGE NO_OS_BIT(1) |
| #define AXI_ADC_MUX_PN_ERR NO_OS_BIT(3) |
| #define AXI_ADC_MUX_PN_OOS NO_OS_BIT(2) |
| #define AXI_ADC_OVER_RANGE NO_OS_BIT(0) |
| #define AXI_ADC_PIN_MODE NO_OS_BIT(0) |
| #define AXI_ADC_PN23_TYPE NO_OS_BIT(1) |
| #define AXI_ADC_PN_ERR NO_OS_BIT(2) |
| #define AXI_ADC_PN_OOS NO_OS_BIT(1) |
| #define AXI_ADC_PN_SEL NO_OS_BIT(10) |
| #define AXI_ADC_PPS_RECEIVER_ENABLE NO_OS_BIT(8) |
| #define AXI_ADC_R1_MODE NO_OS_BIT(2) |
| #define AXI_ADC_REG_CHAN_CNTRL | ( | c | ) |
| #define AXI_ADC_REG_CHAN_CNTRL_1 | ( | c | ) |
| #define AXI_ADC_REG_CHAN_CNTRL_2 | ( | c | ) |
| #define AXI_ADC_REG_CHAN_CNTRL_3 | ( | c | ) |
| #define AXI_ADC_REG_CHAN_STATUS | ( | c | ) |
| #define AXI_ADC_REG_CLK_FREQ 0x0054 |
| #define AXI_ADC_REG_CLK_RATIO 0x0058 |
| #define AXI_ADC_REG_CNTRL 0x0044 |
| #define AXI_ADC_REG_CNTRL_3 0x004C |
| #define AXI_ADC_REG_CONFIG 0x000C |
| #define AXI_ADC_REG_DELAY | ( | l | ) |
| #define AXI_ADC_REG_DELAY_CNTRL 0x0060 |
| #define AXI_ADC_REG_RSTN 0x0040 |
| #define AXI_ADC_REG_STATUS 0x005C |
| #define AXI_ADC_RSTN NO_OS_BIT(0) |
| #define AXI_ADC_SCALECORRECTION_ONLY NO_OS_BIT(9) |
| #define AXI_ADC_STATUS NO_OS_BIT(0) |
| #define AXI_ADC_TO_ADC_DATA_SEL | ( | x | ) |
| #define AXI_ADC_TO_ADC_PN_SEL | ( | x | ) |
| #define AXI_ADC_TO_CLK_FREQ | ( | x | ) |
| #define AXI_ADC_TO_CLK_RATIO | ( | x | ) |
| #define AXI_ADC_TO_DCFILT_COEFF | ( | x | ) |
| #define AXI_ADC_TO_DCFILT_OFFSET | ( | x | ) |
| #define AXI_ADC_TO_IQCOR_COEFF_1 | ( | x | ) |
| #define AXI_ADC_TO_IQCOR_COEFF_2 | ( | x | ) |
| #define AXI_ADC_USERPORTS_DISABLE NO_OS_BIT(3) |
| enum axi_adc_pn_sel |
| int32_t axi_adc_delay_calibrate | ( | struct axi_adc * | adc, |
| uint32_t | no_of_lanes, | ||
| enum axi_adc_pn_sel | sel ) |
Calibrate Delay using specific PN sequence.
Calibrate Delay using specific PN sequence
| adc | - The device structure. |
| no_of_lanes | - The AXI ADC number of lanes. |
| sel | - PN sequence. |
| int32_t axi_adc_delay_set | ( | struct axi_adc * | adc, |
| uint32_t | no_of_lanes, | ||
| uint32_t | delay ) |
Set input/output delay primitive for number of lines.
Set input/output delay primitive for number of lines
| adc | - The device structure. |
| no_of_lanes | - The AXI ADC number of lanes. |
| delay | - Delay value. |
| int32_t axi_adc_get_calib_bias | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| int32_t * | val, | ||
| int32_t * | val2 ) |
Get the scale calibration values for AXI ADC channel.
Get the bias calibration values for AXI ADC channel
| adc | - The device structure. |
| chan | - AXI ADC channel. |
| val | - Integer value |
| val2 | - Fractional value |
| int32_t axi_adc_get_calib_phase | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| int32_t * | val, | ||
| int32_t * | val2 ) |
Get the phase calibration values for AXI ADC channel.
Get the phase calibration values for AXI ADC channel
| adc | - The device structure. |
| chan | - AXI ADC channel. |
| val | - Integer value |
| val2 | - Fractional value |
| int32_t axi_adc_get_calib_scale | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| int32_t * | val, | ||
| int32_t * | val2 ) |
Get the scale calibration values for AXI ADC channel.
Get the scale calibration values for AXI ADC channel
| adc | - The device structure. |
| chan | - AXI ADC channel. |
| val | - Integer value |
| val2 | - Fractional value |
| int32_t axi_adc_get_sampling_freq | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| uint64_t * | sampling_freq ) |
Get the AXI ADC Sampling Frequency.
Get the AXI ADC Sampling Frequency
| adc | - The device structure. |
| chan | - The AXI ADC channel. |
| sampling_freq | - Sampling frequency value. |
| void axi_adc_idelay_set | ( | struct axi_adc * | adc, |
| uint32_t | lane, | ||
| uint32_t | val ) |
Set input/output delay primitive for specific interface line.
Set input/output delay primitive for specific interface line
| adc | - The device structure. |
| lane | - The AXI ADC interface line. |
| val | - Delay value. |
| int32_t axi_adc_init | ( | struct axi_adc ** | adc_core, |
| const struct axi_adc_init * | init ) |
AXI ADC Main Initialization.
AXI ADC Main Initialization
| adc_core | - The device structure. |
| init | - Initialization parameters. |
| int32_t axi_adc_init_begin | ( | struct axi_adc ** | adc_core, |
| const struct axi_adc_init * | init ) |
Begin AXI ADC Initialization.
Begin AXI ADC Initialization
| adc_core | - The device structure. |
| init | - Initialization parameters. |
| int32_t axi_adc_init_finish | ( | struct axi_adc * | adc | ) |
Begin AXI ADC Initialization.
Finish AXI ADC Initialization
| adc | - The device structure. |
| int32_t axi_adc_pn_mon | ( | struct axi_adc * | adc, |
| enum axi_adc_pn_sel | sel, | ||
| uint32_t | delay_ms ) |
Monitor the AXI ADC PN Sequence.
Monitor the AXI ADC PN Sequence
| adc | - The device structure. |
| sel | - PN sequence. |
| delay_ms | - Delay in ms. |
| int32_t axi_adc_read | ( | struct axi_adc * | adc, |
| uint32_t | reg_addr, | ||
| uint32_t * | reg_data ) |
AXI ADC Data read.
AXI ADC Read
| adc | - The device structure. |
| reg_addr | - The register address. |
| reg_data | - Read data value. |
| int32_t axi_adc_remove | ( | struct axi_adc * | adc | ) |
AXI ADC Resources deallocation.
Resources Deallocation
| adc | - The device structure. |
| int32_t axi_adc_set_calib_bias | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| int32_t | val, | ||
| int32_t | val2 ) |
Calibrate bias for specific AXI ADC channel.
Calibrate bias for specific AXI ADC channel
| adc | - The device structure. |
| chan | - AXI ADC channel. |
| val | - Integer value |
| val2 | - Fractional value |
| int32_t axi_adc_set_calib_phase | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| int32_t | val, | ||
| int32_t | val2 ) |
Calibrate phase for specific AXI ADC channel.
Calibrate phase for specific AXI ADC channel
| adc | - The device structure. |
| chan | - AXI ADC channel. |
| val | - Integer value |
| val2 | - Fractional value |
| int32_t axi_adc_set_calib_scale | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| int32_t | val, | ||
| int32_t | val2 ) |
Calibrate scale for specific AXI ADC channel.
Calibrate scale for specific AXI ADC channel
| adc | - The device structure. |
| chan | - AXI ADC channel. |
| val | - Integer value |
| val2 | - Fractional value |
| int32_t axi_adc_set_pnsel | ( | struct axi_adc * | adc, |
| uint32_t | chan, | ||
| enum axi_adc_pn_sel | sel ) |
Set AXI ADC PN sequence.
Set AXI ADC PN sequence
| adc | - The device structure. |
| chan | - The AXI ADC channel. |
| sel | - PN sequence. |
| int32_t axi_adc_update_active_channels | ( | struct axi_adc * | adc, |
| uint32_t | mask ) |
Update active AXI ADC channels.
Update active AXI ADC channels
| adc | - The device structure. |
| mask | - Channel mask. |
| int32_t axi_adc_write | ( | struct axi_adc * | adc, |
| uint32_t | reg_addr, | ||
| uint32_t | reg_data ) |
AXI ADC Data Write.
AXI ADC Write
| adc | - The device structure. |
| reg_addr | - The register address. |
| reg_data | - Data value to be written. |