ltc7871.h

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/***************************************************************************/
 
#ifndef __LTC7871_H__
#define __LTC7871_H__
 
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include "no_os_gpio.h"
#include "no_os_spi.h"
#include "no_os_units.h"
#include "no_os_util.h"
 
#define SET 1
#define CLEAR 0
 
#define LTC7871_CRC_POLYNOMIAL          0x07
 
#define LTC7871_FRAME_SIZE              3
#define LTC7871_NUM_REGISTERS           8
 
/* Miscellaneous Definitions*/
#define LTC7871_SPI_READ            0x01
#define LTC7871_SPI_WRITE           0x00
 
// LTC7871 SPI Command
#define LTC7871_STATUS_ACQUISITION_COMMAND    0xF0
#define LTC7871_DATA_WRITE_COMMAND            0xF2
#define LTC7871_DATA_READ_COMMAND             0xF4
 
// LTC7871 SPI Command Size in Bytes
#define LTC7871_STATUS_ACQUISITION_COMMAND_SIZE   4
#define LTC7871_DATA_WRITE_COMMAND_SIZE           8
#define LTC7871_DATA_READ_COMMAND_SIZE            8
 
// LTC7871 SPI Register Address
#define LTC7871_MFR_FAULT                   0x01
#define LTC7871_MFR_OC_FAULT                0x02
#define LTC7871_MFR_NOC_FAULT               0x03
#define LTC7871_MFR_STATUS                  0x04
#define LTC7871_MFR_CONFIG1                 0x05
#define LTC7871_MFR_CONFIG2                 0x06
#define LTC7871_CHIP_CTRL                   0x07
#define LTC7871_IDAC_VLOW                   0x08
#define LTC7871_IDAC_VHIGH                  0x09
#define LTC7871_IDAC_SETCUR                 0x0A
#define LTC7871_MFR_SSFM                    0x0B
 
// LTC7871 SPI Register Mask
#define LTC7871_MFR_FAULT_MASK                NO_OS_GENMASK(6, 0)
#define LTC7871_MFR_OC_FAULT_MASK             NO_OS_GENMASK(6, 0)
#define LTC7871_MFR_NOC_FAULT_MASK            NO_OS_GENMASK(6, 0)
#define LTC7871_MFR_STATUS_MASK               NO_OS_GENMASK(2, 0)
#define LTC7871_MFR_CONFIG1_MASK              NO_OS_GENMASK(5, 0)
#define LTC7871_MFR_CONFIG2_MASK              NO_OS_GENMASK(4, 0)
#define LTC7871_MFR_CHIP_CTRL_MASK            NO_OS_GENMASK(2, 0)
#define LTC7871_MFR_SSFM_MASK                 NO_OS_GENMASK(8, 0)
 
 
// LTC7871 MFR_FAULT register bits
#define LTC7871_VLOW_OV_MASK                  NO_OS_BIT(6)
#define LTC7871_VHIGH_OV_MASK                 NO_OS_BIT(5)
#define LTC7871_VHIGH_UV_MASK                 NO_OS_BIT(4)
#define LTC7871_DRVCC_UV_MASK                 NO_OS_BIT(3)
#define LTC7871_V5_UV_MASK                    NO_OS_BIT(2)
#define LTC7871_VREF_BAD_MASK                 NO_OS_BIT(1)
#define LTC7871_OVER_TEMP_MASK                NO_OS_BIT(0)
 
// LTC7871 MFR_OC_FAULT register bits
#define LTC7871_OC_FAULT_6_MASK               NO_OS_BIT(5)
#define LTC7871_OC_FAULT_5_MASK               NO_OS_BIT(4)
#define LTC7871_OC_FAULT_4_MASK               NO_OS_BIT(3)
#define LTC7871_OC_FAULT_3_MASK               NO_OS_BIT(2)
#define LTC7871_OC_FAULT_2_MASK               NO_OS_BIT(1)
#define LTC7871_OC_FAULT_1_MASK               NO_OS_BIT(0)
 
// LTC7871 MFR_NOC_FAULT register bits
#define LTC7871_NOC_FAULT_6_MASK               NO_OS_BIT(5)
#define LTC7871_NOC_FAULT_5_MASK               NO_OS_BIT(4)
#define LTC7871_NOC_FAULT_4_MASK               NO_OS_BIT(3)
#define LTC7871_NOC_FAULT_3_MASK               NO_OS_BIT(2)
#define LTC7871_NOC_FAULT_2_MASK               NO_OS_BIT(1)
#define LTC7871_NOC_FAULT_1_MASK               NO_OS_BIT(0)
 
// LTC7871 MFR_STATUS register bits
#define LTC7871_SS_DONE_MASK                   NO_OS_BIT(2)
#define LTC7871_MAX_CURRENT_MASK               NO_OS_BIT(1)
#define LTC7871_PGOOD_MASK                     NO_OS_BIT(0)
 
// LTC7871 MFR_CONFIG1 register bits
#define LTC7871_SERCUR_WARNING_MASK            NO_OS_BIT(5)
#define LTC7871_DRVCC_SET_MASK                 NO_OS_GENMASK(4, 3)
#define LTC7871_ILIM_SET_MASK                  NO_OS_GENMASK(2, 0)
 
// LTC7871 MFR_CONFIG2 register bits
#define LTC7871_BURST_MASK                     NO_OS_BIT(4)
#define LTC7871_DCM_MASK                       NO_OS_BIT(3)
#define LTC7871_HIZ_MASK                       NO_OS_BIT(2)
#define LTC7871_SPRD_MASK                      NO_OS_BIT(1)
#define LTC7871_BUCK_BOOST_MASK                NO_OS_BIT(0)
 
// LTC7871 MFR_CHIP_CTRL register bits
#define LTC7871_CML_MASK                       NO_OS_BIT(2)
#define LTC7871_RESET_MASK                     NO_OS_BIT(1)
#define LTC7871_WP_MASK                        NO_OS_BIT(0)
 
// LTC7871 MFR_IDAC_VLOW register bits
#define LTC7871_MFR_IDAC_VLOW_MASK             NO_OS_GENMASK(6, 0)
 
// LTC7871 MFR_IDAC_VHIGH register bits
#define LTC7871_MFR_IDAC_VHIGH_MASK            NO_OS_GENMASK(6, 0)
 
// LTC7871 MFR_IDAC_SETCUR register bits
#define LTC7871_MFR_IDAC_SETCUR_MASK           NO_OS_GENMASK(4, 0)
 
// LTC7871 MFR_SSFM register bits
#define LTC7871_MFR_SSFM_FSR_MASK              NO_OS_GENMASK(4, 3)
#define LTC7871_MFR_SSFM_MSF_MASK              NO_OS_GENMASK(2, 0)
 

enum ltc7871_ssfm_fsr {
    LTC7871_SSFM_FSR_12,
    LTC7871_SSFM_FSR_15,
    LTC7871_SSFM_FSR_10,
    LTC7871_SSFM_FSR_8
};
enum ltc7871_ssfm_fsr {…};

enum ltc7871_ssfm_msf {
    LTC7871_SSFM_MSF_512,
    LTC7871_SSFM_MSF_1024,
    LTC7871_SSFM_MSF_2048,
    LTC7871_SSFM_MSF_4096,
    LTC7871_SSFM_MSF_256,
    LTC7871_SSFM_MSF_128,
    LTC7871_SSFM_MSF_64,
    LTC7871_SSFM_MSF_512U
};
enum ltc7871_ssfm_msf {…};

enum ltc7871_ctrl_wp {
    LTC7871_CTRL_WP_ENABLE,
    LTC7871_CTRL_WP_DISABLE
};
enum ltc7871_ctrl_wp {…};

struct ltc7871_init_param {
    struct no_os_spi_init_param *spi;
    struct no_os_gpio_init_param *gpio_pwmen;
};
struct ltc7871_init_param {…};

struct ltc7871_dev {
    struct no_os_spi_desc *spi;
    struct no_os_gpio_desc *gpio_pwmen;
};
struct ltc7871_dev {…};

uint8_t ltc7871_get_pec_byte(uint8_t *data, uint8_t len);

int ltc7871_reg_read(struct ltc7871_dev *dev, uint8_t reg, uint8_t *data);

int ltc7871_reg_write(struct ltc7871_dev *dev, uint8_t reg, uint8_t data);

int ltc7871_reg_write_mask(struct ltc7871_dev *dev, uint8_t address,
               uint8_t mask, uint8_t data);

int ltc7871_get_mfr_fault(struct ltc7871_dev *dev, uint8_t status, bool *value);

int ltc7871_get_mfr_oc_fault(struct ltc7871_dev *dev, uint8_t status,
                 bool *value);

int ltc7871_get_mfr_noc_fault(struct ltc7871_dev *dev, uint8_t status,
                  bool *value);

int ltc7871_get_mfr_config1_setting(struct ltc7871_dev *dev,
                    uint8_t config, uint8_t *value);

int ltc7871_get_mfr_config2_setting(struct ltc7871_dev *dev,
                    uint8_t config, uint8_t *value);

int ltc7871_get_mfr_status(struct ltc7871_dev *dev, uint8_t status_mask,
               bool *status);

int ltc7871_reset(struct ltc7871_dev *dev);

int ltc7871_clear_pec_fault(struct ltc7871_dev *dev);

int ltc7871_read_pec_fault(struct ltc7871_dev *dev, bool *value);

int ltc7871_set_write_protect(struct ltc7871_dev *dev, bool value);

int ltc7871_is_write_protected(struct ltc7871_dev *dev, bool *value);

int ltc7871_get_mfr_idac_vlow(struct ltc7871_dev *dev, int8_t *value);

int ltc7871_set_mfr_idac_vlow(struct ltc7871_dev *dev, int8_t value);

int ltc7871_get_mfr_idac_vhigh(struct ltc7871_dev *dev, int8_t *value);

int ltc7871_set_mfr_idac_vhigh(struct ltc7871_dev *dev, int8_t value);

int ltc7871_get_mfr_idac_setcur(struct ltc7871_dev *dev, int8_t *value);

int ltc7871_set_mfr_idac_setcur(struct ltc7871_dev *dev, int8_t value);

int ltc7871_get_freq_spread_range(struct ltc7871_dev *dev, uint8_t *value);

int ltc7871_set_freq_spread_range(struct ltc7871_dev *dev,
                  enum ltc7871_ssfm_fsr value);

int ltc7871_get_mod_freq(struct ltc7871_dev *dev, uint8_t *value);

int ltc7871_set_mod_freq(struct ltc7871_dev *dev, enum ltc7871_ssfm_msf value);

int ltc7871_set_pwmen_pin(struct ltc7871_dev *dev, uint8_t value);

int ltc7871_get_pwmen_pin(struct ltc7871_dev *dev, uint8_t *value);

int ltc7871_init(struct ltc7871_dev **device,
         struct ltc7871_init_param *init_param);

int ltc7871_remove(struct ltc7871_dev *dev);
 
#endif