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max17851.h File Reference

Header file of the MAX17851 driver. More...

#include <stdint.h>
#include <string.h>
#include "no_os_uart.h"
#include "no_os_gpio.h"
#include "no_os_spi.h"
#include "no_os_util.h"
Include dependency graph for max17851.h:
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Go to the source code of this file.

Classes

struct  max17851_init_param
 
struct  max17851_desc
 

Macros

#define MAX17851_UART_MAX_BYTES_NB   31
 
#define MAX17851_FRAME_SIZE   2
 
#define MAX17851_RD_REG(reg)
 
#define MAX17851_GPIO_RECOVERY_DELAY_DISABLED   0xFF
 
#define MAX17851_CONTACT_TIMER_DELAY_INFINITE   0xFF
 
#define MAX17851_CONFIG_GEN2_MASK(sel)
 
#define MAX17851_ALRTPCKT_TIME_MASK   NO_OS_GENMASK(3, 0)
 
#define MAX17851_LOADQ_MASK   NO_OS_GENMASK(1, 0)
 
#define MAX17851_TXQ_MASK   NO_OS_GENMASK(3, 2)
 
#define MAX17851_ALRT_MASK(alrt)
 
#define MAX17851_BAUD_MASK   NO_OS_GENMASK(6, 4)
 
#define MAX17851_SINGLE_MASK   NO_OS_BIT(7)
 
#define MAX17851_MS_MASK   NO_OS_GENMASK(5, 4)
 
#define MAX17851_ALRTPCKT_DBNC_MASK   NO_OS_GENMASK(5, 3)
 
#define MAX17851_SAFEMON_GPIO_MASK(x)
 
#define MAX17851_COMM_RETRY_COUNT_MASK   NO_OS_GENMASK(5, 4)
 
#define MAX17851_COMM_TIMEOUT_DELAY_MASK   NO_OS_GENMASK(2, 0)
 
#define MAX17851_STATUS_RX_REG   0x00
 
#define MAX17851_STATUS_TX_REG   0x02
 
#define MAX17851_STATUS_LSSM_BYTE_REG   0x04
 
#define MAX17851_STATUS_GEN_REG   0x06
 
#define MAX17851_STATUS_OPSTATE_REG   0x08
 
#define MAX17851_STATUS_BUF_REG   0x0A
 
#define MAX17851_STATUS_WD_REG   0x0C
 
#define MAX17851_STATUS_GPIO_REG   0x0E
 
#define MAX17851_ALERT_RX_REG   0x10
 
#define MAX17851_ALERT_TX_REG   0x12
 
#define MAX17851_ALERT_LSSM_BYTE_REG   0x14
 
#define MAX17851_ALERT_GEN_REG   0x16
 
#define MAX17851_ALERT_OPSTATE_REG   0x18
 
#define MAX17851_ALERT_BUF_REG   0x1A
 
#define MAX17851_ALERT_WD_REG   0x1C
 
#define MAX17851_ALERT_GPIO_REG   0x1E
 
#define MAX17851_ALRTEN_RX_REG   0x20
 
#define MAX17851_ALRTEN_TX_REG   0x22
 
#define MAX17851_ALRTEN_LSSM_BYTE_REG   0x24
 
#define MAX17851_ALRTEN_GEN_REG   0x26
 
#define MAX17851_ALRTEN_OPSTATE_REG   0x28
 
#define MAX17851_ALRTEN_BUF_REG   0x2A
 
#define MAX17851_ALRTEN_WD_REG   0x2C
 
#define MAX17851_ALRTEN_GPIO_REG   0x2E
 
#define MAX17851_CLR_TXBUF_REG   0x40
 
#define MAX17851_CLR_RXBUF_REG   0x42
 
#define MAX17851_CLR_LSSM_REG   0x44
 
#define MAX17851_CLR_ALIVECOUNT_SEED_REG   0x48
 
#define MAX17851_SWPOR_REG   0x4A
 
#define MAX17851_SLP_EN_REG   0x4C
 
#define MAX17851_VER_CONFIG_REG   0x4E
 
#define MAX17851_LOAD_CONFIG_REG   0x50
 
#define MAX17851_WD_KEY_REG   0x52
 
#define MAX17851_CONFIG_GEN0_REG   0x60
 
#define MAX17851_CONFIG_GEN1_REG   0x62
 
#define MAX17851_CONFIG_GEN2_REG   0x64
 
#define MAX17851_CONFIG_GEN3_REG   0x66
 
#define MAX17851_CONFIG_GEN4_REG   0x68
 
#define MAX17851_CONFIG_GEN5_REG   0x6A
 
#define MAX17851_CONFIG_SAFEMON0_REG   0x6C
 
#define MAX17851_CONFIG_SAFEMON1_REG   0x6E
 
#define MAX17851_CONFIG_SAFEMON2_REG   0x70
 
#define MAX17851_CONFIG_SAFEMON3_REG   0x72
 
#define MAX17851_CONFIG_SLP_REG   0x74
 
#define MAX17851_CONFIG_COMM_REG   0x76
 
#define MAX17851_STATUS_DBNC_MASK0_REG   0x78
 
#define MAX17851_STATUS_DBNC_MASK1_REG   0x7A
 
#define MAX17851_STATUS_ERR_MASK0_REG   0x7C
 
#define MAX17851_STATUS_ERR_MASK1_REG   0x7E
 
#define MAX17851_CONFIG_GPIO12_REG   0x80
 
#define MAX17851_CONFIG_GPIO34_REG   0x82
 
#define MAX17851_CONFIG_WD0_REG   0x84
 
#define MAX17851_CONFIG_WD1_REG   0x86
 
#define MAX17851_CONFIG_WD2_REG   0x88
 
#define MAX17851_ALRTPCKTBUF_RD_PTR_REG   0x8C
 
#define MAX17851_ALRTPCKTBUF_RD_MSG_REG   0x8E
 
#define MAX17851_RX_RD_MSG_REG   0x90
 
#define MAX17851_RX_RD_NXT_MSG_REG   0x92
 
#define MAX17851_TX_QUEUE_SEL_REG   0x94
 
#define MAX17851_RX_RD_PTR_REG   0x96
 
#define MAX17851_RX_WR_PTR_REG   0x98
 
#define MAX17851_RX_NXT_MSG_PTR_REG   0x9A
 
#define MAX17851_RX_SPACE_REG   0x9C
 
#define MAX17851_RX_BYTE_REG   0x9E
 
#define MAX17851_NXT_LDQ_REG   0xB0
 
#define MAX17851_LDQ_REG   0xC0
 
#define MAX17851_LDQ_PTR_REG   0xC2
 
#define MAX17851_CONFIGQ_REG   0xD0
 
#define MAX17851_CONFIG_PTR_REG   0xD2
 
#define MAX17851_STATE_REG   0xDC
 
#define MAX17851_COMM_RTRY_CNT_REG   0xDE
 
#define MAX17851_ALRTPCKT_ERR_CNT_REG   0xE0
 
#define MAX17851_WD_FAULT_CNT_REG   0xE2
 
#define MAX17851_ALIVECOUNT_SEED_REG   0xE4
 
#define MAX17851_ALIVECOUNT_RET_REG   0xE6
 
#define MAX17851_ALIVECOUNT_Q_REG   0xE8
 
#define MAX17851_FAULT_TIMER0_REG   0xEA
 
#define MAX17851_FAULT_TIMER1_REG   0xEC
 
#define MAX17851_SLP_CBTIMER0_REG   0xEE
 
#define MAX17851_SLP_CBTIMER1_REG   0xF0
 
#define MAX17851_VERSION_REG   0xF2
 
#define MAX17851_MODEL_REG   0xF4
 

Enumerations

enum  max17851_command {
  MAX17851_CLR_LSSM = MAX17851_CLR_LSSM_REG ,
  MAX17851_CLR_ALIVECOUNT_SEED = MAX17851_CLR_ALIVECOUNT_SEED_REG ,
  MAX17851_SWPOR = MAX17851_SWPOR_REG ,
  MAX17851_SLP_EN = MAX17851_SLP_EN_REG ,
  MAX17851_VER_CONFIG = MAX17851_VER_CONFIG_REG ,
  MAX17851_LOAD_CONFIG = MAX17851_LOAD_CONFIG_REG ,
  MAX17851_WD_KEY = MAX17851_WD_KEY_REG
}
 
enum  max17851_alert {
  MAX17851_RX_EMPTY_ALRT ,
  MAX17851_RX_STOP_ALRT ,
  MAX17851_RX_OVRFLW_ERR_ALRT ,
  MAX17851_RX_IDLE_ALRT ,
  MAX17851_RX_BUSY_ALRT ,
  MAX17851_RX_ERR_ALRT = 7 ,
  MAX17851_TX_EMPTY_ALRT ,
  MAX17851_TX_AVAIL_ALRT ,
  MAX17851_TX_FULL_ALRT ,
  MAX17851_TX_OVRFLW_ERR_ALRT ,
  MAX17851_TX_IDLE_ALRT ,
  MAX17851_TX_BUSY_ALRT ,
  MAX17851_TX_HELD_ALRT = 15 ,
  MAX17851_HW_ERR_ALRT ,
  MAX17851_ALIVECNT_ERR_ALRT ,
  MAX17851_COMMAND_OP_ALRT ,
  MAX17851_COMM_MSMTCH_ERR_ALRT ,
  MAX17851_ALRTPCKT_ERR_ALRT ,
  MAX17851_COMM_ERR_ALRT ,
  MAX17851_ALRTPCKT_STATUS_ERR_ALRT ,
  MAX17851_RX_READY_ALRT ,
  MAX17851_ALRTPCKTBUF_HW_ERR_ALRT ,
  MAX17851_ALRTPCKT_COMM_ERR_ALRT ,
  MAX17851_SPI_ERR_ALRT ,
  MAX17851_DATAPATH_ERR_ALRT ,
  MAX17851_GPIO_ERR_ALRT ,
  MAX17851_WD_ERR_ALRT ,
  MAX17851_DEV_COUNT_ERR_ALRT ,
  MAX17851_SAFEMON_CFG_ERR_ALRT = 32 ,
  MAX17851_SAFEMON_STATUS_ERR_ALRT ,
  MAX17851_SAFEMON_GPIO12_ALRT ,
  MAX17851_SAFEMON_ALRT ,
  MAX17851_SLP_STATUS_ERR_ALRT ,
  MAX17851_SLP_ALRT ,
  MAX17581_LSSM_FULL_ALRT = 43 ,
  MAX17851_ALRTPCKTBUF_FULL_ALRT = 47 ,
  MAX17851_WD_EXP_ERR_ALRT ,
  MAX17851_WD_RJCT_ERR_ALRT ,
  MAX17851_WD_LFSR_ERR_ALRT ,
  MAX17851_WD_OPEN_ALRT ,
  MAX17851_WD_TO_ERR_ALRT ,
  MAX17851_GPIO1_ERR_ALRT = 56 ,
  MAX17851_GPIO2_ERR_ALRT ,
  MAX17851_GPIO3_ERR_ALRT ,
  MAX17851_GPIO4_ERR_ALRT
}
 
enum  max17851_queue_sel {
  MAX17851_LOADQ_0_SEL ,
  MAX17851_LOADQ_1_SEL ,
  MAX17851_LOADQ_2_SEL ,
  MAX17851_LOADQ_3_SEL ,
  MAX17851_TXQ_0_SEL ,
  MAX17851_TXQ_1_SEL ,
  MAX17851_TXQ_2_SEL ,
  MAX17851_TXQ_3_SEL
}
 
enum  max17851_config_gen2_sel {
  MAX17851_TX_NOPREAMBLE_SEL ,
  MAX17851_TX_NOSTOP_SEL ,
  MAX17851_TX_PAUSE_SEL ,
  MAX17851_TX_ODDPARITY_SEL ,
  MAX17851_TX_QUEUE_SEL ,
  MAX17851_TX_PREAMBLES_SEL ,
  MAX17851_TX_RAW_DATA_SEL ,
  MAX17851_RX_RAW_DATA_SEL
}
 
enum  max17851_alrtpckt_time {
  MAX17851_ALRTPCKT_0US ,
  MAX17851_ALRTPCKT_10US ,
  MAX17851_ALRTPCKT_20US ,
  MAX17851_ALRTPCKT_40US ,
  MAX17851_ALRTPCKT_80US ,
  MAX17851_ALRTPCKT_160US ,
  MAX17851_ALRTPCKT_320US ,
  MAX17851_ALRTPCKT_640US ,
  MAX17851_ALRTPCKT_1280US ,
  MAX17851_ALRTPCKT_2560US ,
  MAX17851_ALRTPCKT_5120US ,
  MAX17851_ALRTPCKT_10240US ,
  MAX17851_ALRTPCKT_INFINITE = 15
}
 
enum  max17851_baud_rate {
  MAX17851_UART_BAUD_500K = 1 ,
  MAX17851_UART_BAUD_1M ,
  MAX17851_UART_BAUD_2M
}
 
enum  max17851_uart_op_mode {
  MAX17851_SLAVE_DUAL_UART ,
  MAX17851_MASTER_SINGLE_UART = 2 ,
  MAX17851_MASTER_DUAL_UART
}
 
enum  max17851_status_debounce {
  MAX17851_ALERTPCKT_DBNC_1 ,
  MAX17851_ALERTPCKT_DBNC_2 ,
  MAX17851_ALERTPCKT_DBNC_4 ,
  MAX17851_ALERTPCKT_DBNC_8 ,
  MAX17851_ALERTPCKT_DBNC_16 ,
  MAX17851_ALERTPCKT_DBNC_32 ,
  MAX17851_ALERTPCKT_DBNC_64 ,
  MAX17851_ALERTPCKT_DBNC_128
}
 
enum  max17851_safemon_dly {
  MAX17851_SAFEMON_DLY_500MS ,
  MAX17851_SAFEMON_DLY_1000MS ,
  MAX17851_SAFEMON_DLY_1500MS
}
 
enum  max17851_safemon_gpio {
  MAX17851_SAFEMON_GPIO1 ,
  MAX17851_SAFEMON_GPIO2 ,
  MAX17851_SAFEMON_GPIO3 ,
  MAX17851_SAFEMON_GPIO4
}
 
enum  max17851_comm_try_count {
  MAX17851_RETRY_COUNT_2 ,
  MAX17851_RETRY_COUNT_4 ,
  MAX17851_RETRY_COUNT_8 ,
  MAX17851_RETRY_COUNT_16
}
 
enum  max17851_comm_timeout_delay {
  MAX17851_TIMEOUT_DELAY_276BITS ,
  MAX17851_TIMEOUT_DELAY_516BITS ,
  MAX17851_TIMEOUT_DELAY_996BITS ,
  MAX17851_TIMEOUT_DELAY_1956BITS ,
  MAX17851_TIMEOUT_DELAY_DISABLED
}
 

Functions

int max17851_send_command (struct max17851_desc *desc, enum max17851_command command, bool enable)
 Send specific device command over SPI.
 
int max17851_read_msg (struct max17851_desc *desc, uint8_t *data, uint8_t len)
 Read message over UART from the MAX17851.
 
int max17851_write_msg (struct max17851_desc *desc, const uint8_t *data, uint8_t len)
 Write message over UART using MAX17851.
 
int max17851_config_gen2 (struct max17851_desc *desc, enum max17851_config_gen2_sel sel, bool enable)
 Configure general settings for MAX17851.
 
int max17851_sel_alrtpckt_time (struct max17851_desc *desc, enum max17851_alrtpckt_time time)
 Set timing for Alert Packets/Keep-Alive Packets.
 
int max17851_select_queue (struct max17851_desc *desc, enum max17851_queue_sel sel)
 Select queue for transmitting/loading TX buffer for UART.
 
int max17851_clear_buff (struct max17851_desc *desc, bool tx_buf)
 Clear RX/TX buffer inside the MAX17851 memory.
 
int max17851_get_alert (struct max17851_desc *desc, enum max17851_alert alert, bool *enable)
 Read specific alert state.
 
int max17851_set_alert (struct max17851_desc *desc, enum max17851_alert alert, bool enable)
 Enable/Disable specific alert.
 
int max17851_set_alert_debounce (struct max17851_desc *desc, enum max17851_status_debounce dbnc)
 Select the number of unmasked consecutive Alert Packet status alerts, which must happen prior to taking action in either Safe Minotring or Sleep Mode.
 
int max17851_set_safemon_dly (struct max17851_desc *desc, enum max17851_safemon_dly delay)
 Select Safe Monitoring Mode Scan Delay.
 
int max17851_set_safemon_gpio (struct max17851_desc *desc, enum max17851_safemon_gpio gpio, bool enable)
 Select which GPIO pins to be configured as SAFEMON output.
 
int max17851_set_comm (struct max17851_desc *desc, enum max17851_comm_try_count count, enum max17851_comm_timeout_delay delay)
 Set communication retry count and timeout delay.
 
int max17851_reg_read (struct max17851_desc *desc, uint8_t reg, uint8_t *data)
 MAX17851 register read function.
 
int max17851_reg_write (struct max17851_desc *desc, uint8_t reg, uint8_t data)
 MAX17851 register write function.
 
int max17851_reg_update (struct max17851_desc *desc, uint8_t reg, uint8_t mask, uint8_t data)
 MAX17851 register update function.
 
int max17851_init (struct max17851_desc **desc, struct max17851_init_param *init_param)
 MAX17851 device initialization function.
 
int max17851_remove (struct max17851_desc *desc)
 Deallocate any resources used at the initialization function.
 

Variables

const struct no_os_uart_platform_ops max17851_uart_ops
 MAX17851 platform specific UART platform ops structure.
 

Detailed Description

Header file of the MAX17851 driver.

Author
Radu Sabau (radu..nosp@m.saba.nosp@m.u@ana.nosp@m.log..nosp@m.com)

Copyright 2025(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ MAX17851_ALERT_BUF_REG

#define MAX17851_ALERT_BUF_REG   0x1A

◆ MAX17851_ALERT_GEN_REG

#define MAX17851_ALERT_GEN_REG   0x16

◆ MAX17851_ALERT_GPIO_REG

#define MAX17851_ALERT_GPIO_REG   0x1E

◆ MAX17851_ALERT_LSSM_BYTE_REG

#define MAX17851_ALERT_LSSM_BYTE_REG   0x14

◆ MAX17851_ALERT_OPSTATE_REG

#define MAX17851_ALERT_OPSTATE_REG   0x18

◆ MAX17851_ALERT_RX_REG

#define MAX17851_ALERT_RX_REG   0x10

◆ MAX17851_ALERT_TX_REG

#define MAX17851_ALERT_TX_REG   0x12

◆ MAX17851_ALERT_WD_REG

#define MAX17851_ALERT_WD_REG   0x1C

◆ MAX17851_ALIVECOUNT_Q_REG

#define MAX17851_ALIVECOUNT_Q_REG   0xE8

◆ MAX17851_ALIVECOUNT_RET_REG

#define MAX17851_ALIVECOUNT_RET_REG   0xE6

◆ MAX17851_ALIVECOUNT_SEED_REG

#define MAX17851_ALIVECOUNT_SEED_REG   0xE4

◆ MAX17851_ALRT_MASK

#define MAX17851_ALRT_MASK ( alrt)
Value:
NO_OS_BIT(((alrt) % 8))
NO_OS_BIT
#define NO_OS_BIT(x)
Definition no_os_util.h:46

◆ MAX17851_ALRTEN_BUF_REG

#define MAX17851_ALRTEN_BUF_REG   0x2A

◆ MAX17851_ALRTEN_GEN_REG

#define MAX17851_ALRTEN_GEN_REG   0x26

◆ MAX17851_ALRTEN_GPIO_REG

#define MAX17851_ALRTEN_GPIO_REG   0x2E

◆ MAX17851_ALRTEN_LSSM_BYTE_REG

#define MAX17851_ALRTEN_LSSM_BYTE_REG   0x24

◆ MAX17851_ALRTEN_OPSTATE_REG

#define MAX17851_ALRTEN_OPSTATE_REG   0x28

◆ MAX17851_ALRTEN_RX_REG

#define MAX17851_ALRTEN_RX_REG   0x20

◆ MAX17851_ALRTEN_TX_REG

#define MAX17851_ALRTEN_TX_REG   0x22

◆ MAX17851_ALRTEN_WD_REG

#define MAX17851_ALRTEN_WD_REG   0x2C

◆ MAX17851_ALRTPCKT_DBNC_MASK

#define MAX17851_ALRTPCKT_DBNC_MASK   NO_OS_GENMASK(5, 3)

◆ MAX17851_ALRTPCKT_ERR_CNT_REG

#define MAX17851_ALRTPCKT_ERR_CNT_REG   0xE0

◆ MAX17851_ALRTPCKT_TIME_MASK

#define MAX17851_ALRTPCKT_TIME_MASK   NO_OS_GENMASK(3, 0)

◆ MAX17851_ALRTPCKTBUF_RD_MSG_REG

#define MAX17851_ALRTPCKTBUF_RD_MSG_REG   0x8E

◆ MAX17851_ALRTPCKTBUF_RD_PTR_REG

#define MAX17851_ALRTPCKTBUF_RD_PTR_REG   0x8C

◆ MAX17851_BAUD_MASK

#define MAX17851_BAUD_MASK   NO_OS_GENMASK(6, 4)

◆ MAX17851_CLR_ALIVECOUNT_SEED_REG

#define MAX17851_CLR_ALIVECOUNT_SEED_REG   0x48

◆ MAX17851_CLR_LSSM_REG

#define MAX17851_CLR_LSSM_REG   0x44

◆ MAX17851_CLR_RXBUF_REG

#define MAX17851_CLR_RXBUF_REG   0x42

◆ MAX17851_CLR_TXBUF_REG

#define MAX17851_CLR_TXBUF_REG   0x40

◆ MAX17851_COMM_RETRY_COUNT_MASK

#define MAX17851_COMM_RETRY_COUNT_MASK   NO_OS_GENMASK(5, 4)

◆ MAX17851_COMM_RTRY_CNT_REG

#define MAX17851_COMM_RTRY_CNT_REG   0xDE

◆ MAX17851_COMM_TIMEOUT_DELAY_MASK

#define MAX17851_COMM_TIMEOUT_DELAY_MASK   NO_OS_GENMASK(2, 0)

◆ MAX17851_CONFIG_COMM_REG

#define MAX17851_CONFIG_COMM_REG   0x76

◆ MAX17851_CONFIG_GEN0_REG

#define MAX17851_CONFIG_GEN0_REG   0x60

◆ MAX17851_CONFIG_GEN1_REG

#define MAX17851_CONFIG_GEN1_REG   0x62

◆ MAX17851_CONFIG_GEN2_MASK

#define MAX17851_CONFIG_GEN2_MASK ( sel)
Value:
NO_OS_BIT(sel)

◆ MAX17851_CONFIG_GEN2_REG

#define MAX17851_CONFIG_GEN2_REG   0x64

◆ MAX17851_CONFIG_GEN3_REG

#define MAX17851_CONFIG_GEN3_REG   0x66

◆ MAX17851_CONFIG_GEN4_REG

#define MAX17851_CONFIG_GEN4_REG   0x68

◆ MAX17851_CONFIG_GEN5_REG

#define MAX17851_CONFIG_GEN5_REG   0x6A

◆ MAX17851_CONFIG_GPIO12_REG

#define MAX17851_CONFIG_GPIO12_REG   0x80

◆ MAX17851_CONFIG_GPIO34_REG

#define MAX17851_CONFIG_GPIO34_REG   0x82

◆ MAX17851_CONFIG_PTR_REG

#define MAX17851_CONFIG_PTR_REG   0xD2

◆ MAX17851_CONFIG_SAFEMON0_REG

#define MAX17851_CONFIG_SAFEMON0_REG   0x6C

◆ MAX17851_CONFIG_SAFEMON1_REG

#define MAX17851_CONFIG_SAFEMON1_REG   0x6E

◆ MAX17851_CONFIG_SAFEMON2_REG

#define MAX17851_CONFIG_SAFEMON2_REG   0x70

◆ MAX17851_CONFIG_SAFEMON3_REG

#define MAX17851_CONFIG_SAFEMON3_REG   0x72

◆ MAX17851_CONFIG_SLP_REG

#define MAX17851_CONFIG_SLP_REG   0x74

◆ MAX17851_CONFIG_WD0_REG

#define MAX17851_CONFIG_WD0_REG   0x84

◆ MAX17851_CONFIG_WD1_REG

#define MAX17851_CONFIG_WD1_REG   0x86

◆ MAX17851_CONFIG_WD2_REG

#define MAX17851_CONFIG_WD2_REG   0x88

◆ MAX17851_CONFIGQ_REG

#define MAX17851_CONFIGQ_REG   0xD0

◆ MAX17851_CONTACT_TIMER_DELAY_INFINITE

#define MAX17851_CONTACT_TIMER_DELAY_INFINITE   0xFF

◆ MAX17851_FAULT_TIMER0_REG

#define MAX17851_FAULT_TIMER0_REG   0xEA

◆ MAX17851_FAULT_TIMER1_REG

#define MAX17851_FAULT_TIMER1_REG   0xEC

◆ MAX17851_FRAME_SIZE

#define MAX17851_FRAME_SIZE   2

◆ MAX17851_GPIO_RECOVERY_DELAY_DISABLED

#define MAX17851_GPIO_RECOVERY_DELAY_DISABLED   0xFF

◆ MAX17851_LDQ_PTR_REG

#define MAX17851_LDQ_PTR_REG   0xC2

◆ MAX17851_LDQ_REG

#define MAX17851_LDQ_REG   0xC0

◆ MAX17851_LOAD_CONFIG_REG

#define MAX17851_LOAD_CONFIG_REG   0x50

◆ MAX17851_LOADQ_MASK

#define MAX17851_LOADQ_MASK   NO_OS_GENMASK(1, 0)

◆ MAX17851_MODEL_REG

#define MAX17851_MODEL_REG   0xF4

◆ MAX17851_MS_MASK

#define MAX17851_MS_MASK   NO_OS_GENMASK(5, 4)

◆ MAX17851_NXT_LDQ_REG

#define MAX17851_NXT_LDQ_REG   0xB0

◆ MAX17851_RD_REG

#define MAX17851_RD_REG ( reg)
Value:
((reg) + 1)

◆ MAX17851_RX_BYTE_REG

#define MAX17851_RX_BYTE_REG   0x9E

◆ MAX17851_RX_NXT_MSG_PTR_REG

#define MAX17851_RX_NXT_MSG_PTR_REG   0x9A

◆ MAX17851_RX_RD_MSG_REG

#define MAX17851_RX_RD_MSG_REG   0x90

◆ MAX17851_RX_RD_NXT_MSG_REG

#define MAX17851_RX_RD_NXT_MSG_REG   0x92

◆ MAX17851_RX_RD_PTR_REG

#define MAX17851_RX_RD_PTR_REG   0x96

◆ MAX17851_RX_SPACE_REG

#define MAX17851_RX_SPACE_REG   0x9C

◆ MAX17851_RX_WR_PTR_REG

#define MAX17851_RX_WR_PTR_REG   0x98

◆ MAX17851_SAFEMON_GPIO_MASK

#define MAX17851_SAFEMON_GPIO_MASK ( x)
Value:
NO_OS_BIT(x)

◆ MAX17851_SINGLE_MASK

#define MAX17851_SINGLE_MASK   NO_OS_BIT(7)

◆ MAX17851_SLP_CBTIMER0_REG

#define MAX17851_SLP_CBTIMER0_REG   0xEE

◆ MAX17851_SLP_CBTIMER1_REG

#define MAX17851_SLP_CBTIMER1_REG   0xF0

◆ MAX17851_SLP_EN_REG

#define MAX17851_SLP_EN_REG   0x4C

◆ MAX17851_STATE_REG

#define MAX17851_STATE_REG   0xDC

◆ MAX17851_STATUS_BUF_REG

#define MAX17851_STATUS_BUF_REG   0x0A

◆ MAX17851_STATUS_DBNC_MASK0_REG

#define MAX17851_STATUS_DBNC_MASK0_REG   0x78

◆ MAX17851_STATUS_DBNC_MASK1_REG

#define MAX17851_STATUS_DBNC_MASK1_REG   0x7A

◆ MAX17851_STATUS_ERR_MASK0_REG

#define MAX17851_STATUS_ERR_MASK0_REG   0x7C

◆ MAX17851_STATUS_ERR_MASK1_REG

#define MAX17851_STATUS_ERR_MASK1_REG   0x7E

◆ MAX17851_STATUS_GEN_REG

#define MAX17851_STATUS_GEN_REG   0x06

◆ MAX17851_STATUS_GPIO_REG

#define MAX17851_STATUS_GPIO_REG   0x0E

◆ MAX17851_STATUS_LSSM_BYTE_REG

#define MAX17851_STATUS_LSSM_BYTE_REG   0x04

◆ MAX17851_STATUS_OPSTATE_REG

#define MAX17851_STATUS_OPSTATE_REG   0x08

◆ MAX17851_STATUS_RX_REG

#define MAX17851_STATUS_RX_REG   0x00

◆ MAX17851_STATUS_TX_REG

#define MAX17851_STATUS_TX_REG   0x02

◆ MAX17851_STATUS_WD_REG

#define MAX17851_STATUS_WD_REG   0x0C

◆ MAX17851_SWPOR_REG

#define MAX17851_SWPOR_REG   0x4A

◆ MAX17851_TX_QUEUE_SEL_REG

#define MAX17851_TX_QUEUE_SEL_REG   0x94

◆ MAX17851_TXQ_MASK

#define MAX17851_TXQ_MASK   NO_OS_GENMASK(3, 2)

◆ MAX17851_UART_MAX_BYTES_NB

#define MAX17851_UART_MAX_BYTES_NB   31

◆ MAX17851_VER_CONFIG_REG

#define MAX17851_VER_CONFIG_REG   0x4E

◆ MAX17851_VERSION_REG

#define MAX17851_VERSION_REG   0xF2

◆ MAX17851_WD_FAULT_CNT_REG

#define MAX17851_WD_FAULT_CNT_REG   0xE2

◆ MAX17851_WD_KEY_REG

#define MAX17851_WD_KEY_REG   0x52

Enumeration Type Documentation

◆ max17851_alert

enum max17851_alert
Enumerator
MAX17851_RX_EMPTY_ALRT 
MAX17851_RX_STOP_ALRT 
MAX17851_RX_OVRFLW_ERR_ALRT 
MAX17851_RX_IDLE_ALRT 
MAX17851_RX_BUSY_ALRT 
MAX17851_RX_ERR_ALRT 
MAX17851_TX_EMPTY_ALRT 
MAX17851_TX_AVAIL_ALRT 
MAX17851_TX_FULL_ALRT 
MAX17851_TX_OVRFLW_ERR_ALRT 
MAX17851_TX_IDLE_ALRT 
MAX17851_TX_BUSY_ALRT 
MAX17851_TX_HELD_ALRT 
MAX17851_HW_ERR_ALRT 
MAX17851_ALIVECNT_ERR_ALRT 
MAX17851_COMMAND_OP_ALRT 
MAX17851_COMM_MSMTCH_ERR_ALRT 
MAX17851_ALRTPCKT_ERR_ALRT 
MAX17851_COMM_ERR_ALRT 
MAX17851_ALRTPCKT_STATUS_ERR_ALRT 
MAX17851_RX_READY_ALRT 
MAX17851_ALRTPCKTBUF_HW_ERR_ALRT 
MAX17851_ALRTPCKT_COMM_ERR_ALRT 
MAX17851_SPI_ERR_ALRT 
MAX17851_DATAPATH_ERR_ALRT 
MAX17851_GPIO_ERR_ALRT 
MAX17851_WD_ERR_ALRT 
MAX17851_DEV_COUNT_ERR_ALRT 
MAX17851_SAFEMON_CFG_ERR_ALRT 
MAX17851_SAFEMON_STATUS_ERR_ALRT 
MAX17851_SAFEMON_GPIO12_ALRT 
MAX17851_SAFEMON_ALRT 
MAX17851_SLP_STATUS_ERR_ALRT 
MAX17851_SLP_ALRT 
MAX17581_LSSM_FULL_ALRT 
MAX17851_ALRTPCKTBUF_FULL_ALRT 
MAX17851_WD_EXP_ERR_ALRT 
MAX17851_WD_RJCT_ERR_ALRT 
MAX17851_WD_LFSR_ERR_ALRT 
MAX17851_WD_OPEN_ALRT 
MAX17851_WD_TO_ERR_ALRT 
MAX17851_GPIO1_ERR_ALRT 
MAX17851_GPIO2_ERR_ALRT 
MAX17851_GPIO3_ERR_ALRT 
MAX17851_GPIO4_ERR_ALRT 

◆ max17851_alrtpckt_time

enum max17851_alrtpckt_time
Enumerator
MAX17851_ALRTPCKT_0US 
MAX17851_ALRTPCKT_10US 
MAX17851_ALRTPCKT_20US 
MAX17851_ALRTPCKT_40US 
MAX17851_ALRTPCKT_80US 
MAX17851_ALRTPCKT_160US 
MAX17851_ALRTPCKT_320US 
MAX17851_ALRTPCKT_640US 
MAX17851_ALRTPCKT_1280US 
MAX17851_ALRTPCKT_2560US 
MAX17851_ALRTPCKT_5120US 
MAX17851_ALRTPCKT_10240US 
MAX17851_ALRTPCKT_INFINITE 

◆ max17851_baud_rate

enum max17851_baud_rate
Enumerator
MAX17851_UART_BAUD_500K 
MAX17851_UART_BAUD_1M 
MAX17851_UART_BAUD_2M 

◆ max17851_comm_timeout_delay

enum max17851_comm_timeout_delay
Enumerator
MAX17851_TIMEOUT_DELAY_276BITS 
MAX17851_TIMEOUT_DELAY_516BITS 
MAX17851_TIMEOUT_DELAY_996BITS 
MAX17851_TIMEOUT_DELAY_1956BITS 
MAX17851_TIMEOUT_DELAY_DISABLED 

◆ max17851_comm_try_count

enum max17851_comm_try_count
Enumerator
MAX17851_RETRY_COUNT_2 
MAX17851_RETRY_COUNT_4 
MAX17851_RETRY_COUNT_8 
MAX17851_RETRY_COUNT_16 

◆ max17851_command

enum max17851_command
Enumerator
MAX17851_CLR_LSSM 
MAX17851_CLR_ALIVECOUNT_SEED 
MAX17851_SWPOR 
MAX17851_SLP_EN 
MAX17851_VER_CONFIG 
MAX17851_LOAD_CONFIG 
MAX17851_WD_KEY 

◆ max17851_config_gen2_sel

enum max17851_config_gen2_sel
Enumerator
MAX17851_TX_NOPREAMBLE_SEL 
MAX17851_TX_NOSTOP_SEL 
MAX17851_TX_PAUSE_SEL 
MAX17851_TX_ODDPARITY_SEL 
MAX17851_TX_QUEUE_SEL 
MAX17851_TX_PREAMBLES_SEL 
MAX17851_TX_RAW_DATA_SEL 
MAX17851_RX_RAW_DATA_SEL 

◆ max17851_queue_sel

enum max17851_queue_sel
Enumerator
MAX17851_LOADQ_0_SEL 
MAX17851_LOADQ_1_SEL 
MAX17851_LOADQ_2_SEL 
MAX17851_LOADQ_3_SEL 
MAX17851_TXQ_0_SEL 
MAX17851_TXQ_1_SEL 
MAX17851_TXQ_2_SEL 
MAX17851_TXQ_3_SEL 

◆ max17851_safemon_dly

enum max17851_safemon_dly
Enumerator
MAX17851_SAFEMON_DLY_500MS 
MAX17851_SAFEMON_DLY_1000MS 
MAX17851_SAFEMON_DLY_1500MS 

◆ max17851_safemon_gpio

enum max17851_safemon_gpio
Enumerator
MAX17851_SAFEMON_GPIO1 
MAX17851_SAFEMON_GPIO2 
MAX17851_SAFEMON_GPIO3 
MAX17851_SAFEMON_GPIO4 

◆ max17851_status_debounce

enum max17851_status_debounce
Enumerator
MAX17851_ALERTPCKT_DBNC_1 
MAX17851_ALERTPCKT_DBNC_2 
MAX17851_ALERTPCKT_DBNC_4 
MAX17851_ALERTPCKT_DBNC_8 
MAX17851_ALERTPCKT_DBNC_16 
MAX17851_ALERTPCKT_DBNC_32 
MAX17851_ALERTPCKT_DBNC_64 
MAX17851_ALERTPCKT_DBNC_128 

◆ max17851_uart_op_mode

enum max17851_uart_op_mode
Enumerator
MAX17851_SLAVE_DUAL_UART 
MAX17851_MASTER_SINGLE_UART 
MAX17851_MASTER_DUAL_UART 

Function Documentation

◆ max17851_clear_buff()

int max17851_clear_buff ( struct max17851_desc * desc,
bool tx_buf )

Clear RX/TX buffer inside the MAX17851 memory.

Parameters
desc- MAX17851 device descriptor.
tx_buf- True - Clear TX buffer. False - Clear RX buffer.
Returns
0 incase of success, negative error code otherwise.
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◆ max17851_config_gen2()

int max17851_config_gen2 ( struct max17851_desc * desc,
enum max17851_config_gen2_sel sel,
bool enable )

Configure general settings for MAX17851.

Parameters
desc- MAX17851 device descriptor.
sel- Specific setting to be changed.
enable- Disable/Enable specific setting.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_get_alert()

int max17851_get_alert ( struct max17851_desc * desc,
enum max17851_alert alert,
bool * enable )

Read specific alert state.

Parameters
desc- MAX17851 device descriptor.
alert- Specific alert state to be read.
enable- Pointer to alert state value to be read.
Returns
0 in case of success, negative error code otherwise.

◆ max17851_init()

int max17851_init ( struct max17851_desc ** desc,
struct max17851_init_param * init_param )

MAX17851 device initialization function.

Parameters
desc- MAX17851 device descriptor to be intialized.
init_param- MAX17851 initialization parameter.
Returns
0 in case of success, negative error code otherwise.

◆ max17851_read_msg()

int max17851_read_msg ( struct max17851_desc * desc,
uint8_t * data,
uint8_t len )

Read message over UART from the MAX17851.

Parameters
desc- MAX17851 device descriptor.
data- Pointer to data containing buffer.
len- Length of the message in bytes.
Returns
0 in case of success, negative error code otherwise.

◆ max17851_reg_read()

int max17851_reg_read ( struct max17851_desc * desc,
uint8_t reg,
uint8_t * data )

MAX17851 register read function.

Parameters
desc- MAX17851 device descriptor.
reg- Register Address.
data- Data byte to be read.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_reg_update()

int max17851_reg_update ( struct max17851_desc * desc,
uint8_t reg,
uint8_t mask,
uint8_t data )

MAX17851 register update function.

Parameters
desc- MAX17851 device descriptor.
reg- Register Address.
mask- Field mask to be udated inside the register.
data- Data byte to be updated.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_reg_write()

int max17851_reg_write ( struct max17851_desc * desc,
uint8_t reg,
uint8_t data )

MAX17851 register write function.

Parameters
desc- MAX17851 device descriptor.
reg- Register Address.
data- Data byte to be written.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_remove()

int max17851_remove ( struct max17851_desc * desc)

Deallocate any resources used at the initialization function.

Parameters
desc- MAX17851 device descriptor.
Returns
0 in case of success, negative error code otherwise.

◆ max17851_sel_alrtpckt_time()

int max17851_sel_alrtpckt_time ( struct max17851_desc * desc,
enum max17851_alrtpckt_time time )

Set timing for Alert Packets/Keep-Alive Packets.

Parameters
desc- MAX17851 device descriptor.
time- Specific pre-defined time value to be set.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_select_queue()

int max17851_select_queue ( struct max17851_desc * desc,
enum max17851_queue_sel sel )

Select queue for transmitting/loading TX buffer for UART.

Parameters
desc- MAX17851 device descriptor.
sel- Specific pre-defined value for either TX or LD queue selection.
Returns
0 in case of success, negative error code otherwise.

◆ max17851_send_command()

int max17851_send_command ( struct max17851_desc * desc,
enum max17851_command command,
bool enable )

Send specific device command over SPI.

Parameters
desc- MAX17851 device descriptor.
command- Specific command from the command list.
enable- Enable/Disable function in case of some commands. Appropiated value needed only for SWPORT or SLEEP_EN commands, ohterwise can be left either true or false.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_set_alert()

int max17851_set_alert ( struct max17851_desc * desc,
enum max17851_alert alert,
bool enable )

Enable/Disable specific alert.

Parameters
desc- MAX17851 device descriptor.
alert- Specific alert to be enabled/disabled.
enable- true - Enable specific alert. false - Disable specific alert.
Returns
0 in case of success, negative erro code otherwise.

◆ max17851_set_alert_debounce()

int max17851_set_alert_debounce ( struct max17851_desc * desc,
enum max17851_status_debounce dbnc )

Select the number of unmasked consecutive Alert Packet status alerts, which must happen prior to taking action in either Safe Minotring or Sleep Mode.

Parameters
desc- MAX17851 device descriptor.
dbnc- Specific pre-defined value for number of debounces.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_set_comm()

int max17851_set_comm ( struct max17851_desc * desc,
enum max17851_comm_try_count count,
enum max17851_comm_timeout_delay delay )

Set communication retry count and timeout delay.

Parameters
desc- MAX17851 device descriptor.
count- Specific pre-defined value for communication retry count.
delay- Specific pre-defined value for communication timeout delay.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_set_safemon_dly()

int max17851_set_safemon_dly ( struct max17851_desc * desc,
enum max17851_safemon_dly delay )

Select Safe Monitoring Mode Scan Delay.

Parameters
desc- MAX17851 device descriptor.
delay- Specific pre-defined time delay.
Returns
0 in case of success, negative error code otherwise.
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◆ max17851_set_safemon_gpio()

int max17851_set_safemon_gpio ( struct max17851_desc * desc,
enum max17851_safemon_gpio gpio,
bool enable )

Select which GPIO pins to be configured as SAFEMON output.

Parameters
desc- MAX17851 device descriptor.
gpio- Selected GPIO.
enable- Enable/Disable the SAFEMON output function of the GPIO.
Returns
0 in case of success, negative error code otherwise.

◆ max17851_write_msg()

int max17851_write_msg ( struct max17851_desc * desc,
const uint8_t * data,
uint8_t len )

Write message over UART using MAX17851.

Parameters
desc- MAX17851 device descriptor.
data- Pointer to data containing buffer.
len- Length of the message in bytes.
Returns
0 in case of success, negative error code otherwise.

Variable Documentation

◆ max17851_uart_ops

const struct no_os_uart_platform_ops max17851_uart_ops
extern

MAX17851 platform specific UART platform ops structure.