no-OS
max22196.h
Go to the documentation of this file.
1 /***************************************************************************/
33 #ifndef _MAX22196_H
34 #define _MAX22196_H
35 
36 #include <stdint.h>
37 #include <stdbool.h>
38 #include "no_os_spi.h"
39 #include "no_os_gpio.h"
40 #include "no_os_util.h"
41 
42 #define MAX22196_FRAME_SIZE 2
43 
44 #define MAX22196_CHANNELS 8
45 #define MAX22194_CHANNELS 4
46 
47 #define MAX22196_CHN_CNT_RESET 0
48 
49 #define MAX22196_DI_STATE_REG 0x00
50 #define MAX22196_FAULT1_REG 0x01
51 #define MAX22196_F1MASK_REG 0x02
52 #define MAX22196_CFG_REG(x) (0x03 + (x))
53 #define MAX22196_GLOBALCFG_REG 0x0B
54 #define MAX22196_LED_REG 0x0C
55 #define MAX22196_FAULT2_REG 0x0D
56 #define MAX22196_F2MASK_REG 0x0E
57 #define MAX22196_START_STOP_REG 0x0F
58 #define MAX22196_CNT_LSB_REG(x) (0x10 + 2 * (x))
59 #define MAX22196_CNT_MSB_REG(x) (0x11 + 2 * (x))
60 
61 #define MAX22196_ADDR_MASK NO_OS_GENMASK(7, 6)
62 #define MAX22196_REG_ADDR_MASK NO_OS_GENMASK(5, 1)
63 #define MAX22196_RW_MASK NO_OS_BIT(0)
64 
65 #define MAX22196_DI_STATE_MASK(x) NO_OS_BIT(x)
66 #define MAX22196_HITHR_MASK NO_OS_BIT(7)
67 #define MAX22196_SOURCE_MASK NO_OS_BIT(6)
68 #define MAX22196_CURR_MASK NO_OS_GENMASK(5, 4)
69 #define MAX22196_FLTEN_MASK NO_OS_BIT(3)
70 #define MAX22196_DELAY_MASK NO_OS_GENMASK(2, 0)
71 #define MAX22196_CNT_MASK(x) NO_OS_BIT(x)
72 #define MAX22196_CFG_MASK (NO_OS_BIT(7) | NO_OS_GENMASK(5, 4))
73 #define MAX22196_LSB_MASK NO_OS_GENMASK(7, 0)
74 #define MAX22196_MSB_MASK NO_OS_GENMASK(15, 8)
75 #define MAX22196_CNT_BYTE_MASK NO_OS_GENMASK(7, 0)
76 
77 #define MAX22196_FAULT_MASK(x) NO_OS_BIT(x)
78 #define MAX22196_GLOBAL_MASK(x) NO_OS_BIT(x)
79 #define MAX22196_FAULT2_MASK NO_OS_GENMASK(4, 0)
80 
81 #define MAX22196_FILTER_CLRFLT_MASK NO_OS_BIT(3)
82 
86 };
87 
100 };
101 
107 };
108 
112 };
113 
123 };
124 
130 };
131 
133  uint32_t chip_address;
136  bool crc_en;
138 };
139 
141  uint32_t chip_address;
144  uint8_t buff[MAX22196_FRAME_SIZE + 1];
145  uint8_t fault2en;
146  bool crc_en;
148  uint8_t max_chn_nb;
149 };
150 
152 int max22196_reg_write(struct max22196_desc *, uint32_t, uint32_t);
153 
155 int max22196_reg_read(struct max22196_desc *, uint32_t, uint32_t *);
156 
158 int max22196_reg_update(struct max22196_desc *, uint32_t, uint32_t, uint32_t);
159 
161 int max22196_set_mode(struct max22196_desc *, uint32_t, enum max22196_mode);
162 
164 int max22196_chan_cfg(struct max22196_desc *, uint32_t, uint32_t,
165  enum max22196_curr);
166 
168 int max22196_filter_set(struct max22196_desc *, uint32_t, uint32_t, uint32_t,
169  enum max22196_delay);
170 
172 int max22196_filter_get(struct max22196_desc *, uint32_t, uint32_t *,
173  uint32_t *, enum max22196_delay *);
174 
177  bool);
178 
181  bool *);
182 
184 int max22196_global_cfg(struct max22196_desc *, enum max22196_global_cfg, bool);
185 
187 int max22196_set_chan_cnt(struct max22196_desc *, uint32_t, uint16_t);
188 
190 int max22196_get_chan_cnt(struct max22196_desc *, uint32_t, uint16_t *);
191 
193 int max22196_init(struct max22196_desc **, struct max22196_init_param *);
194 
196 int max22196_remove(struct max22196_desc *);
197 
198 #endif
MAX22196_1X_CURRENT
@ MAX22196_1X_CURRENT
Definition: max22196.h:127
MAX22196_FAULT2_OTSHDN2
@ MAX22196_FAULT2_OTSHDN2
Definition: max22196.h:97
max22196_init_param::crc_en
bool crc_en
Definition: max22196.h:136
MAX22196_DELAY_1600US
@ MAX22196_DELAY_1600US
Definition: max22196.h:119
no_os_alloc.h
no_os_gpio_init_param
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:79
MAX22196_FAULT2_MASK
#define MAX22196_FAULT2_MASK
Definition: max22196.h:79
max22196_get_chan_cnt
int max22196_get_chan_cnt(struct max22196_desc *desc, uint32_t ch, uint16_t *cnt_msb_lsb_bytes)
MAX22196 channel counter get function.
Definition: max22196.c:460
max22196_set_mode
int max22196_set_mode(struct max22196_desc *, uint32_t, enum max22196_mode)
MAX22196 function that helps setting the mode of the device.
Definition: max22196.c:189
MAX22196_GLOBAL_LEDINT
@ MAX22196_GLOBAL_LEDINT
Definition: max22196.h:105
max22196_chip_id
max22196_chip_id
Definition: max22196.h:83
max22196_fault_mask
max22196_fault_mask
Definition: max22196.h:88
MAX22196_CHANNELS
#define MAX22196_CHANNELS
Definition: max22196.h:44
MAX22196_DELAY_128000US
@ MAX22196_DELAY_128000US
Definition: max22196.h:121
no_os_spi.h
Header file of SPI Interface.
max22196_reg_update
int max22196_reg_update(struct max22196_desc *, uint32_t, uint32_t, uint32_t)
MAX22196 register update function
Definition: max22196.c:166
max22196.h
Header file of MAX22196 Driver.
MAX22196_HITHR_MASK
#define MAX22196_HITHR_MASK
Definition: max22196.h:66
max22196_chan_cfg
int max22196_chan_cfg(struct max22196_desc *desc, uint32_t ch, uint32_t hi_thr, enum max22196_curr curr)
MAX22196 channel configuration function
Definition: max22196.c:208
max22196_desc::fault2en
uint8_t fault2en
Definition: max22196.h:145
max22196_desc
Definition: max22196.h:140
max22196_remove
int max22196_remove(struct max22196_desc *)
Free the resources allocated during init.
Definition: max22196.c:557
max22196_reg_write
int max22196_reg_write(struct max22196_desc *desc, uint32_t reg, uint32_t val)
MAX22196 register write function.
Definition: max22196.c:93
MAX22196_MSB_MASK
#define MAX22196_MSB_MASK
Definition: max22196.h:74
max22196_chan_cfg
int max22196_chan_cfg(struct max22196_desc *, uint32_t, uint32_t, enum max22196_curr)
MAX22196 channel configuration function
Definition: max22196.c:208
MAX22196_FAULT1_REG
#define MAX22196_FAULT1_REG
Definition: max22196.h:50
max22196_reg_read
int max22196_reg_read(struct max22196_desc *desc, uint32_t reg, uint32_t *val)
MAX22196 register read function.
Definition: max22196.c:121
no_os_spi_msg
Definition: no_os_spi.h:100
max22196_init_param::crc_param
struct no_os_gpio_init_param * crc_param
Definition: max22196.h:135
MAX22196_FAULT2_RFDIS
@ MAX22196_FAULT2_RFDIS
Definition: max22196.h:95
max22196_reg_read
int max22196_reg_read(struct max22196_desc *, uint32_t, uint32_t *)
MAX22196 register read function.
Definition: max22196.c:121
max22196_set_chan_cnt
int max22196_set_chan_cnt(struct max22196_desc *, uint32_t, uint16_t)
MAX22196 channel counter set function
Definition: max22196.c:413
MAX22196_CNT_MASK
#define MAX22196_CNT_MASK(x)
Definition: max22196.h:71
max22196_desc::buff
uint8_t buff[MAX22196_FRAME_SIZE+1]
Definition: max22196.h:144
ID_MAX22194
@ ID_MAX22194
Definition: max22196.h:84
MAX22196_START_STOP_REG
#define MAX22196_START_STOP_REG
Definition: max22196.h:57
MAX22196_FAULT1_V24UV
@ MAX22196_FAULT1_V24UV
Definition: max22196.h:91
MAX22196_FAULT1_VMLOW
@ MAX22196_FAULT1_VMLOW
Definition: max22196.h:90
max22196_init
int max22196_init(struct max22196_desc **, struct max22196_init_param *)
Initialize and configure the MAX22196 device.
Definition: max22196.c:501
max22196_get_chan_cnt
int max22196_get_chan_cnt(struct max22196_desc *, uint32_t, uint16_t *)
MAX22196 channel counter get function.
Definition: max22196.c:460
max22196_fault_mask_get
int max22196_fault_mask_get(struct max22196_desc *desc, enum max22196_fault_mask fault_mask, bool *enabled)
Get fault mask bits from the fault mask registers.
Definition: max22196.c:346
NO_OS_GPIO_HIGH
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:117
MAX22196_SOURCE_MASK
#define MAX22196_SOURCE_MASK
Definition: max22196.h:67
MAX22196_GLOBAL_GPO
@ MAX22196_GLOBAL_GPO
Definition: max22196.h:106
MAX22196_GLOBAL_FSPICLR
@ MAX22196_GLOBAL_FSPICLR
Definition: max22196.h:103
MAX22196_F1MASK_REG
#define MAX22196_F1MASK_REG
Definition: max22196.h:51
no_os_calloc
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:54
max22196_filter_set
int max22196_filter_set(struct max22196_desc *, uint32_t, uint32_t, uint32_t, enum max22196_delay)
MAX22196 filter set function
Definition: max22196.c:230
MAX22196_DELAY_800US
@ MAX22196_DELAY_800US
Definition: max22196.h:118
MAX22196_FAULT2_SPI8CLK
@ MAX22196_FAULT2_SPI8CLK
Definition: max22196.h:98
MAX22196_GLOBALCFG_REG
#define MAX22196_GLOBALCFG_REG
Definition: max22196.h:53
MAX22196_FLTEN_MASK
#define MAX22196_FLTEN_MASK
Definition: max22196.h:69
MAX22196_DELAY_MASK
#define MAX22196_DELAY_MASK
Definition: max22196.h:70
MAX22196_DELAY_400US
@ MAX22196_DELAY_400US
Definition: max22196.h:117
no_os_spi_msg::tx_buff
uint8_t * tx_buff
Definition: no_os_spi.h:102
MAX22196_CHN_CNT_RESET
#define MAX22196_CHN_CNT_RESET
Definition: max22196.h:47
MAX22196_FAULT2_RFDIO
@ MAX22196_FAULT2_RFDIO
Definition: max22196.h:96
MAX22196_REG_ADDR_MASK
#define MAX22196_REG_ADDR_MASK
Definition: max22196.h:62
max22196_global_cfg
int max22196_global_cfg(struct max22196_desc *desc, enum max22196_global_cfg global_cfg, bool enabled)
Set global configuration.
Definition: max22196.c:390
max22196_curr
max22196_curr
Definition: max22196.h:125
max22196_desc::max_chn_nb
uint8_t max_chn_nb
Definition: max22196.h:148
max22196_mode
max22196_mode
Definition: max22196.h:109
max22196_set_mode
int max22196_set_mode(struct max22196_desc *desc, uint32_t ch, enum max22196_mode mode)
MAX22196 function that helps setting the mode of the device.
Definition: max22196.c:189
no_os_field_prep
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)
MAX22196_SINK_MODE
@ MAX22196_SINK_MODE
Definition: max22196.h:110
max22196_desc::crc_desc
struct no_os_gpio_desc * crc_desc
Definition: max22196.h:143
MAX22196_CURR_MASK
#define MAX22196_CURR_MASK
Definition: max22196.h:68
MAX22196_FAULT_MASK
#define MAX22196_FAULT_MASK(x)
Definition: max22196.h:77
MAX22196_CFG_REG
#define MAX22196_CFG_REG(x)
Definition: max22196.h:52
MAX22196_RW_MASK
#define MAX22196_RW_MASK
Definition: max22196.h:63
max22196_desc::chip_id
enum max22196_chip_id chip_id
Definition: max22196.h:147
MAX22196_CFG_MASK
#define MAX22196_CFG_MASK
Definition: max22196.h:72
max22196_delay
max22196_delay
Definition: max22196.h:114
max22196_init
int max22196_init(struct max22196_desc **desc, struct max22196_init_param *param)
Initialize and configure the MAX22196 device.
Definition: max22196.c:501
MAX22196_HTL_MODE
@ MAX22196_HTL_MODE
Definition: max22196.h:126
MAX22196_GLOBAL_LED9
@ MAX22196_GLOBAL_LED9
Definition: max22196.h:104
max22196_desc::crc_en
bool crc_en
Definition: max22196.h:146
max22196_desc::comm_desc
struct no_os_spi_desc * comm_desc
Definition: max22196.h:142
max22196_init_param::chip_address
uint32_t chip_address
Definition: max22196.h:133
MAX22196_CNT_MSB_REG
#define MAX22196_CNT_MSB_REG(x)
Definition: max22196.h:59
max22196_reg_write
int max22196_reg_write(struct max22196_desc *, uint32_t, uint32_t)
MAX22196 register write function.
Definition: max22196.c:93
no_os_gpio_remove
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:104
no_os_spi_desc
Structure holding SPI descriptor.
Definition: no_os_spi.h:192
MAX22196_DELAY_3200US
@ MAX22196_DELAY_3200US
Definition: max22196.h:120
MAX22196_ADDR_MASK
#define MAX22196_ADDR_MASK
Definition: max22196.h:61
MAX22196_FAULT1_FAULT2
@ MAX22196_FAULT1_FAULT2
Definition: max22196.h:94
MAX22196_GLOBAL_MASK
#define MAX22196_GLOBAL_MASK(x)
Definition: max22196.h:78
no_os_gpio_desc
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:96
MAX22194_CHANNELS
#define MAX22194_CHANNELS
Definition: max22196.h:45
no_os_spi_transfer
int32_t no_os_spi_transfer(struct no_os_spi_desc *desc, struct no_os_spi_msg *msgs, uint32_t len)
Iterate over head list and send all spi messages.
Definition: no_os_spi.c:185
no_os_spi_msg::bytes_number
uint32_t bytes_number
Definition: no_os_spi.h:106
no_os_gpio_get
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:49
max22196_init_param
Definition: max22196.h:132
max22196_desc::chip_address
uint32_t chip_address
Definition: max22196.h:141
MAX22196_DELAY_20MS
@ MAX22196_DELAY_20MS
Definition: max22196.h:122
MAX22196_F2MASK_REG
#define MAX22196_F2MASK_REG
Definition: max22196.h:56
MAX22196_FILTER_CLRFLT_MASK
#define MAX22196_FILTER_CLRFLT_MASK
Definition: max22196.h:81
no_os_field_get
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
MAX22196_LSB_MASK
#define MAX22196_LSB_MASK
Definition: max22196.h:73
MAX22196_FRAME_SIZE
#define MAX22196_FRAME_SIZE
Definition: max22196.h:42
max22196_filter_get
int max22196_filter_get(struct max22196_desc *desc, uint32_t ch, uint32_t *flt_en, uint32_t *clr_filtr, enum max22196_delay *delay)
MAX22196 filter get function
Definition: max22196.c:262
no_os_free
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:69
MAX22196_CNT_BYTE_MASK
#define MAX22196_CNT_BYTE_MASK
Definition: max22196.h:75
MAX22196_FAULT2_REG
#define MAX22196_FAULT2_REG
Definition: max22196.h:55
max22196_init_param::comm_param
struct no_os_spi_init_param * comm_param
Definition: max22196.h:134
max22196_filter_get
int max22196_filter_get(struct max22196_desc *, uint32_t, uint32_t *, uint32_t *, enum max22196_delay *)
MAX22196 filter get function
Definition: max22196.c:262
max22196_fault_mask_set
int max22196_fault_mask_set(struct max22196_desc *desc, enum max22196_fault_mask fault_mask, bool enabled)
Set fault mask bits in the fault mask registers.
Definition: max22196.c:295
MAX22196_DELAY_50US
@ MAX22196_DELAY_50US
Definition: max22196.h:115
MAX22196_CNT_LSB_REG
#define MAX22196_CNT_LSB_REG(x)
Definition: max22196.h:58
ID_MAX22196
@ ID_MAX22196
Definition: max22196.h:85
MAX22196_TTL_OP_OFF
@ MAX22196_TTL_OP_OFF
Definition: max22196.h:129
max22196_remove
int max22196_remove(struct max22196_desc *desc)
Free the resources allocated during init.
Definition: max22196.c:557
MAX22196_FAULT2_VAUV
@ MAX22196_FAULT2_VAUV
Definition: max22196.h:99
max22196_init_param::chip_id
enum max22196_chip_id chip_id
Definition: max22196.h:137
no_os_spi_remove
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:116
MAX22196_DELAY_100US
@ MAX22196_DELAY_100US
Definition: max22196.h:116
no_os_gpio.h
Header file of GPIO Interface.
MAX22196_SOURCE_MODE
@ MAX22196_SOURCE_MODE
Definition: max22196.h:111
MAX22196_FAULT1_OTSHDN1
@ MAX22196_FAULT1_OTSHDN1
Definition: max22196.h:93
max22196_set_chan_cnt
int max22196_set_chan_cnt(struct max22196_desc *desc, uint32_t ch, uint16_t cnt_msb_lsb_bytes)
MAX22196 channel counter set function
Definition: max22196.c:413
no_os_spi_init
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:52
MAX22196_FAULT1_TEMPALM
@ MAX22196_FAULT1_TEMPALM
Definition: max22196.h:92
max22196_reg_update
int max22196_reg_update(struct max22196_desc *desc, uint32_t reg, uint32_t mask, uint32_t val)
MAX22196 register update function
Definition: max22196.c:166
no_os_util.h
Header file of utility functions.
max22196_global_cfg
max22196_global_cfg
Definition: max22196.h:102
max22196_filter_set
int max22196_filter_set(struct max22196_desc *desc, uint32_t ch, uint32_t flt_en, uint32_t clr_filtr, enum max22196_delay delay)
MAX22196 filter set function
Definition: max22196.c:230
no_os_gpio_direction_output
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:147
max22196_fault_mask_set
int max22196_fault_mask_set(struct max22196_desc *, enum max22196_fault_mask, bool)
Set fault mask bits in the fault mask registers.
Definition: max22196.c:295
max22196_fault_mask_get
int max22196_fault_mask_get(struct max22196_desc *, enum max22196_fault_mask, bool *)
Get fault mask bits from the fault mask registers.
Definition: max22196.c:346
MAX22196_GLOBAL_REFDISHTCFG
@ MAX22196_GLOBAL_REFDISHTCFG
Definition: max22196.h:89
errno.h
Error macro definition for ARM Compiler.
no_os_spi_init_param
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:140
MAX22196_3X_CURRENT
@ MAX22196_3X_CURRENT
Definition: max22196.h:128