max96792_diag.h

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/*******************************************************************************
 *   @file   max96792_diag.h
 *   @brief  Header file of Diagnostics Driver Implementation of max96792 Deserializer.
 *   @author Automotive Software and Systems team, Bangalore, India
********************************************************************************
 * Copyright 2025(c) Analog Devices, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 *
 * 3. Neither the name of Analog Devices, Inc. nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. "AS IS" AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
 * EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
 
#ifndef MAX96792_DIAG_H
#define MAX96792_DIAG_H
 
#include "gmsl_common.h"
#include "max96792.h"
#define NOT_APPLICABLE_FOR_MAX96792 (NULL)          
#define MAX96792_NUM_OF_MIPI_PKT_READ (4U)          
#define MAX96792_NUM_OF_VIDEO_PIPES (2U)            
#define MAX96792_NUM_OF_GMSL_LINKS (2U)             
#define MAX96792_NUM_OF_CSI_CONTROLLERS (2U)        
#define MAX96792_NUM_OF_MIPI_PHY (4U)               
#define MAX96792_NUM_OF_LINE_FAULT_MONITORS (4U)    
#define MAX96792_MAX_NUM_OF_SRC_DST_DT_VC_MAP (16U) 
 
#define MAX96792A_DEV_ID (0xBE)
#define MAX96792F_DEV_ID (0xB8)
 
#define MAX96792_LINK_IDLE_REG_OFFSET_MULTIPLIER (0x4FF6U)     
#define MIPI_REG_OFFSET_MULT (0x40U)                           
#define VIDEO_PIPE_REG_OFFSET_MULT (0x12U)                     
#define MAX96792_IDLE_ERROR_COUNT_REG_OFFSET_A (0x09u)         
#define MAX96792_IDLE_ERROR_COUNT_REG_OFFSET_B (0x13u)         
#define MAX96792_PIPE_DIAG_CHECK_CRC_ERROR_OFFSET_MULT (0x12U) 
#define MAX96792_NUM_OF_PHY_PER_CSI (2U)                       
#define MAX96792_BLK_LEN_ERR_OFFSET_MULT (0x12U)               
#define MAX96792_MAX_STREAM_ID (3U)                            
#define MAX96792_STREAM_ID_EXTRACTION_MASK (0x3U)              

struct max96792_dev_diag_device_id_status {
    uint8_t dev_id; 
};

struct max96792_dev_diag_dev_rev_status {
    uint8_t dev_rev; 
};

struct max96792_link_diag_link_lock_status {
    bool link_lock_a; 
    bool link_lock_b; 
};

struct max96792_diag_link_decode_err {
    enum max96792_link max96792_gmsl_link; 
    bool decode_err_link_flag;             
    uint8_t decode_err_cnt;                
};

struct max96792_pipe_diag_decode_err_status {
    enum max96792_link
    max96792_gmsl_link[MAX96792_NUM_OF_GMSL_LINKS]; 
    bool decode_err_link_flag[MAX96792_NUM_OF_GMSL_LINKS];             
    uint8_t decode_err_cnt[MAX96792_NUM_OF_GMSL_LINKS];                
};

enum max96792_link_diag_lmn_status {
    MAX96792_LINK_DIAG_LMN_SHORT_TO_BAT = 0u,      
    MAX96792_LINK_DIAG_LMN_SHORT_TO_GND = 1u,      
    MAX96792_LINK_DIAG_LMN_NORMAL = 2u,            
    MAX96792_LINK_DIAG_LMN_LINE_OPEN = 3u,         
    MAX96792_LINK_DIAG_LMN_LINE_TO_LINE_SHORT = 4u 
};

enum max96792_link_lmn {
    MAX96792_LINK_LMN_0 = 0u, 
    MAX96792_LINK_LMN_1 = 1u, 
    MAX96792_LINK_LMN_2 = 2u, 
    MAX96792_LINK_LMN_3 = 3u, 
};

struct max96792_link_diag_line_fault_details {
    bool lf_int;                                         
    enum max96792_link_diag_lmn_status
    lmn_err_status[MAX96792_NUM_OF_LINE_FAULT_MONITORS]; 
};

enum max96792_dp_pclkdetlost_status {
    MAX96792_DP_PCLKDET_NOT_LOST = 0u, 
    MAX96792_DP_PCLKDET_LOST = 1u,     
};

enum max96792_dp_pclkdetlost_assert_event {
    MAX96792_DP_PCLKDETLOST_NO_ASSERT_ON_RST = 0u, 
    MAX96792_DP_PCLKDETLOST_ASSERT = 1u,           
};

enum max96792_csi_packet_stream_id {
    MAX96792_CSI_STREAM_ID_0 = 0u, 
    MAX96792_CSI_STREAM_ID_1 = 1u, 
    MAX96792_CSI_STREAM_ID_2 = 2u, 
    MAX96792_CSI_STREAM_ID_3 = 3u  
};

enum max96792_csi_mipi_phy {
    MAX96792_CSI_MIPI_PHY_0 = 0u, 
    MAX96792_CSI_MIPI_PHY_1 = 1u, 
    MAX96792_CSI_MIPI_PHY_2 = 2u, 
    MAX96792_CSI_MIPI_PHY_3 = 3u  
 
};

enum max96792_dev_csi_mode {
    MAX96792_DEV_CSI_PIXEL_MODE = 0u, 
    MAX96792_DEV_CSI_TUNNEL_MODE = 1u 
};

enum max96792_dev_lane_count {
    MAX96792_DEV_LANE_COUNT_1 = 0u, 
    MAX96792_DEV_LANE_COUNT_2 = 1u, 
    MAX96792_DEV_LANE_COUNT_3 = 2u, 
    MAX96792_DEV_LANE_COUNT_4 = 3u, 
};

enum max96792_dev_csi_lane_frequency {
    MAX96792_CSI_PER_LANE_FREQ_80Mbps = 0x0u,    
    MAX96792_CSI_PER_LANE_FREQ_100Mbps = 0x1u,   
    MAX96792_CSI_PER_LANE_FREQ_200Mbps = 0x2u,   
    MAX96792_CSI_PER_LANE_FREQ_300Mbps = 0x3u,   
    MAX96792_CSI_PER_LANE_FREQ_400Mbps = 0x4u,   
    MAX96792_CSI_PER_LANE_FREQ_500Mbps = 0x5u,   
    MAX96792_CSI_PER_LANE_FREQ_600Mbps = 0x6u,   
    MAX96792_CSI_PER_LANE_FREQ_700Mbps = 0x7u,   
    MAX96792_CSI_PER_LANE_FREQ_800Mbps = 0x8u,   
    MAX96792_CSI_PER_LANE_FREQ_900Mbps = 0x9u,   
    MAX96792_CSI_PER_LANE_FREQ_1000Mbps = 0xAu,  
    MAX96792_CSI_PER_LANE_FREQ_1100Mbps = 0xBu,  
    MAX96792_CSI_PER_LANE_FREQ_1200Mbps = 0xCu,  
    MAX96792_CSI_PER_LANE_FREQ_1300Mbps = 0xDu,  
    MAX96792_CSI_PER_LANE_FREQ_1400Mbps = 0xEu,  
    MAX96792_CSI_PER_LANE_FREQ_1500Mbps = 0xFu,  
    MAX96792_CSI_PER_LANE_FREQ_1600Mbps = 0x10u, 
    MAX96792_CSI_PER_LANE_FREQ_1700Mbps = 0x11u, 
    MAX96792_CSI_PER_LANE_FREQ_1800Mbps = 0x12u, 
    MAX96792_CSI_PER_LANE_FREQ_1900Mbps = 0x13u, 
    MAX96792_CSI_PER_LANE_FREQ_2000Mbps = 0x14u, 
    MAX96792_CSI_PER_LANE_FREQ_2100Mbps = 0x15u, 
    MAX96792_CSI_PER_LANE_FREQ_2200Mbps = 0x16u, 
    MAX96792_CSI_PER_LANE_FREQ_2300Mbps = 0x17u, 
    MAX96792_CSI_PER_LANE_FREQ_2400Mbps = 0x18u, 
    MAX96792_CSI_PER_LANE_FREQ_2500Mbps = 0x19u, 
};

struct max96792_pipe_diag_src_dst_dt_vc_map_status {
    uint8_t src_pipe_dt; 
    uint8_t src_pipe_vc; 
    uint8_t dst_pipe_dt; 
    uint8_t dst_pipe_vc; 
};

struct max96792_csi_diag_mipi_phy_lane_polarity_map {
    bool lane_0;   
    bool lane_1;   
    bool clk_lane; 
};

struct max96792_dev_diag_part_cfg_status {
    enum max96792_csi_packet_stream_id
    stream_id[MAX96792_NUM_OF_VIDEO_PIPES];                                                    
    enum max96792_dev_csi_mode
    mode[MAX96792_NUM_OF_CSI_CONTROLLERS];                                                     
    struct max96792_pipe_diag_src_dst_dt_vc_map_status
        src_dst_dt_vc_map[MAX96792_NUM_OF_VIDEO_PIPES][MAX96792_MAX_NUM_OF_SRC_DST_DT_VC_MAP]; 
    uint8_t dphy_dst[MAX96792_NUM_OF_CSI_CONTROLLERS][MAX96792_MAX_NUM_OF_SRC_DST_DT_VC_MAP];  
    enum max96792_dev_lane_count
    lane_count[MAX96792_NUM_OF_MIPI_PHY];                                                      
    uint8_t lane_map[MAX96792_NUM_OF_CSI_CONTROLLERS];                                         
    struct max96792_csi_diag_mipi_phy_lane_polarity_map
        lane_pol[MAX96792_NUM_OF_MIPI_PHY];                                                    
    bool mipi_out_enabled;                                                                     
    enum max96792_dev_csi_lane_frequency
    csi_lane_freq[MAX96792_NUM_OF_MIPI_PHY];                                                   
    bool csi_lane_freq_sw_override[MAX96792_NUM_OF_MIPI_PHY];                                  
    bool pll_func_reset;                                                                       
};

struct max96792_pipe_diag_video_lock_status {
    bool video_lock_enabled[MAX96792_NUM_OF_VIDEO_PIPES]; 
    bool video_lock[MAX96792_NUM_OF_VIDEO_PIPES];         
};

struct max96792_csi_diag_stream_id_status {
    enum max96792_csi_packet_stream_id
    stream_id[MAX96792_NUM_OF_VIDEO_PIPES]; 
};

struct max96792_pipe_diag_idle_error_status {
    bool idle_error_detected[MAX96792_NUM_OF_GMSL_LINKS]; 
    uint8_t idle_error_count[MAX96792_NUM_OF_GMSL_LINKS]; 
};

struct max96792_csi_mipi_status {
    bool mipi_out_enabled;                                                                
    uint8_t csi2_pkt_cnt[MAX96792_NUM_OF_CSI_CONTROLLERS][MAX96792_NUM_OF_MIPI_PKT_READ]; 
    uint8_t phy_pkt_cnt[MAX96792_NUM_OF_MIPI_PHY][MAX96792_NUM_OF_MIPI_PKT_READ];         
};

struct max96792_link_max_retrans_data {
    bool main_control_channel_err_detected; 
    uint8_t main_ctrl_chnl_retrans_count;   
    bool gpio_chnl_err_detected;            
    uint8_t gpio_chnl_retrans_count;        
    bool pass_thru_chnl1_err_detected;      
    uint8_t pass_thru_chnl1_retrans_count;  
    bool pass_thru_chnl2_err_detected;      
    uint8_t pass_thru_chnl2_retrans_count;  
};

struct max96792_link_diag_max_retransmission_error_status {
    bool max_retrans_err_detected[MAX96792_NUM_OF_GMSL_LINKS];   
    struct max96792_link_max_retrans_data
        max_retrans_data[MAX96792_NUM_OF_GMSL_LINKS];            
};

struct max96792_pipe_diag_line_mem_ovrflw_status {
    bool line_mem_ovrflw_detected[MAX96792_NUM_OF_VIDEO_PIPES]; 
};

struct max96792_pipe_diag_video_block_length_status {
    bool vid_blk_length_err[MAX96792_NUM_OF_VIDEO_PIPES]; 
};

struct max96792_link_diag_eom_status {
    bool eom_err[MAX96792_NUM_OF_GMSL_LINKS]; 
};

struct max96792_dev_diag_rem_err_flg_status {
    bool rem_cc_en;   
    bool rem_err_flg; 
};

struct max96792_pipe_diag_crc_err_status {
    bool line_crc_en[MAX96792_NUM_OF_GMSL_LINKS];  
    bool line_crc_err[MAX96792_NUM_OF_GMSL_LINKS]; 
};

struct max96792_link_enabled_status {
    bool link_enabled[MAX96792_NUM_OF_GMSL_LINKS]; 
};

struct max96792_pipe_enabled_status {
    bool pipe_enabled[MAX96792_NUM_OF_VIDEO_PIPES]; 
};
 
extern int max96792_pipe_diag_check_video_lock_status(struct gmsl_dev *dev,
        void *video_lock_status, bool *diag_err);
extern int max96792_link_diag_check_link_lock_status(struct gmsl_dev *dev,
        void *link_lock_status, bool *diag_err);
extern int max96792_dev_diag_get_device_id(struct gmsl_dev *dev,
        void *dev_id_status, bool *diag_err);
extern int max96792_link_diag_check_idle_error_status(struct gmsl_dev *dev,
        void *idle_err_status, bool *diag_err);
extern int max96792_link_diag_get_line_fault_int_status(struct gmsl_dev *dev,
        uint8_t *line_fault_int);
extern int max96792_link_diag_get_line_fault_enabled_status(
    struct gmsl_dev *dev, uint8_t *line_fault_enable_status);
extern int max96792_link_diag_get_lmn_status(struct gmsl_dev *dev,
        enum max96792_link_lmn lmn,
        enum max96792_link_diag_lmn_status *line_fault_status);
extern int max96792_link_diag_check_line_fault_status(struct gmsl_dev *dev,
        void *line_fault_status, bool *diag_err);
extern int max96792_link_diag_check_max_retransmission_error_status(
    struct gmsl_dev *dev, void *max_retransmission_status, bool *diag_err);
extern int max96792_pipe_diag_check_crc_error(struct gmsl_dev *dev,
        void *vid_line_crc_status, bool *diag_err);
extern int max96792_pipe_diag_check_stream_id(struct gmsl_dev *dev,
        void *stream_id_status, bool *diag_err);
extern int max96792_pipe_diag_check_video_block_length_error(
    struct gmsl_dev *dev, void *vid_block_length_status, bool *diag_err);
extern int max96792_pipe_diag_check_line_memory_overflow(struct gmsl_dev *dev,
        void *line_mem_ovrflw_status, bool *diag_err);
extern int max96792_dev_diag_check_remote_err_flg(struct gmsl_dev *dev,
        void *remote_err_status, bool *diag_err);
extern int max96792_link_diag_check_eye_open_monitor_error(struct gmsl_dev *dev,
        void *eye_open_monitor_status, bool *diag_err);
extern int max96792_csi_diag_check_mipi_status(struct gmsl_dev *dev,
        void *mipi_status, bool *diag_err);
extern int max96792_dev_diag_get_device_revision(struct gmsl_dev *dev,
        void *dev_revision_status, bool *diag_err);
extern int max96792_link_diag_check_decode_error_status(struct gmsl_dev *dev,
        void *decode_err_status, bool *diag_err);
extern int max96792_dev_diag_check_part_config(struct gmsl_dev *dev,
        void *part_config_status, bool *diag_err);
extern int max96792_check_gmsl_link_enable(struct gmsl_dev *dev,
        struct max96792_link_enabled_status *link_en);
extern int max96792_check_video_pipe_enable(struct gmsl_dev *dev,
        struct max96792_pipe_enabled_status *pipe_en);
#endif