ltc2688.h

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/***************************************************************************/
#ifndef __LTC2688_H__
#define __LTC2688_H__
 
#include "no_os_spi.h"
#include "no_os_util.h"
#include "no_os_delay.h"
#include "errno.h"
 
/******************************************************************************/
/******************* Macros and Constants Definitions *************************/
/******************************************************************************/
#define LTC2688_DAC_CHANNELS    16
 
#define LTC2688_CMD_CH_CODE(x)          (0x00 + x)
#define LTC2688_CMD_CH_SETTING(x)       (0x10 + x)
#define LTC2688_CMD_CH_OFFSET(x)        (0X20 + x)
#define LTC2688_CMD_CH_GAIN(x)          (0x30 + x)
#define LTC2688_CMD_CH_CODE_UPDATE(x)       (0x40 + x)
#define LTC2688_CMD_CH_CODE_UPDATE_ALL(x)   (0x50 + x)
#define LTC2688_CMD_CH_UPDATE(x)        (0x60 + x)
 
#define LTC2688_CMD_CONFIG_REG          0x70
#define LTC2688_CMD_POWERDOWN_REG       0x71
#define LTC2688_CMD_A_B_SELECT_REG      0x72
#define LTC2688_CMD_SW_TOGGLE_REG       0x73
#define LTC2688_CMD_TOGGLE_DITHER_EN_REG    0x74
#define LTC2688_CMD_MUX_CTRL_REG        0x75
#define LTC2688_CMD_FAULT_REG           0x76
#define LTC2688_CMD_CODE_ALL            0x78
#define LTC2688_CMD_CODE_UPDATE_ALL     0x79
#define LTC2688_CMD_SETTING_ALL         0x7A
#define LTC2688_CMD_SETTING_UPDATE_ALL      0x7B
#define LTC2688_CMD_UPDATE_ALL          0x7C
#define LTC2688_CMD_NOOP            0xFF
 
#define LTC2688_READ_OPERATION          0x80
 
/* Channel Settings */
#define LTC2688_CH_SPAN_MSK         NO_OS_GENMASK(3, 0)
#define LTC2688_CH_SPAN(x)          no_os_field_prep(LTC2688_CH_SPAN_MSK, x)
#define LTC2688_CH_TD_SEL_MSK           NO_OS_GENMASK(5, 4)
#define LTC2688_CH_TD_SEL(x)            no_os_field_prep(LTC2688_CH_TD_SEL_MSK, x)
#define LTC2688_CH_DIT_PER_MSK          NO_OS_GENMASK(8, 6)
#define LTC2688_CH_DIT_PER(x)           no_os_field_prep(LTC2688_CH_DIT_PER_MSK, x)
#define LTC2688_CH_DIT_PH_MSK           NO_OS_GENMASK(10, 9)
#define LTC2688_CH_DIT_PH(x)            no_os_field_prep(LTC2688_CH_DIT_PH_MSK, x)
#define LTC2688_CH_MODE             NO_OS_BIT(11)
 
/* Configuration register */
#define LTC2688_CONFIG_RST          NO_OS_BIT(15)
 
#define LTC2688_PWDN(x)             (1 << ((x) & 0xF))
#define LTC2688_DITH_EN(x)          (1 << ((x) & 0xF))
 
 
/******************************************************************************/
/*************************** Types Declarations *******************************/
/******************************************************************************/
enum ltc2688_voltage_range {
    LTC2688_VOLTAGE_RANGE_0V_5V,
    LTC2688_VOLTAGE_RANGE_0V_10V,
    LTC2688_VOLTAGE_RANGE_M5V_5V,
    LTC2688_VOLTAGE_RANGE_M10V_10V,
    LTC2688_VOLTAGE_RANGE_M15V_15V,
};
 
struct ltc2688_span_tbl {
    int min;
    int max;
};
 
enum ltc2688_dither_period {
    LTC2688_DITH_PERIOD_4,
    LTC2688_DITH_PERIOD_8,
    LTC2688_DITH_PERIOD_16,
    LTC2688_DITH_PERIOD_32,
    LTC2688_DITH_PERIOD_64
};
 
enum ltc2688_dither_phase {
    LTC2688_DITH_PHASE_0,
    LTC2688_DITH_PHASE_90,
    LTC2688_DITH_PHASE_180,
    LTC2688_DITH_PHASE_270
};
 
enum ltc2688_a_b_register {
    LTC2688_SELECT_A_REG,
    LTC2688_SELECT_B_REG
};
 
enum  ltc2688_clk_input {
    LTC2688_SOFT_TGL,
    LTC2688_TGP0,
    LTC2688_TGP1,
    LTC2688_TGP2
};
 
struct ltc2688_dev {
    no_os_spi_desc          *spi_desc;
    uint16_t            pwd_dac_setting;
    uint16_t            dither_toggle_en;
    bool                dither_mode[16];
    uint16_t            dac_code[16];
    enum ltc2688_voltage_range  crt_range[16];
    enum ltc2688_dither_phase   dither_phase[16];
    enum ltc2688_dither_period  dither_period[16];
    enum ltc2688_clk_input      clk_input[16];
    enum ltc2688_a_b_register   reg_select[16];
};
 
struct ltc2688_init_param {
    /* SPI */
    no_os_spi_init_param            spi_init;
    uint16_t            pwd_dac_setting;
    uint16_t            dither_toggle_en;
    bool                dither_mode[16];
    enum ltc2688_voltage_range  crt_range[16];
    enum ltc2688_dither_phase   dither_phase[16];
    enum ltc2688_dither_period  dither_period[16];
    enum ltc2688_clk_input      clk_input[16];
    enum ltc2688_a_b_register   reg_select[16];
};
/******************************************************************************/
/******************************** LTC2688 *************************************/
/******************************************************************************/
int32_t ltc2688_set_pwr_dac(struct ltc2688_dev *dev, uint16_t setting);
int32_t ltc2688_set_dither_toggle(struct ltc2688_dev *dev, uint16_t setting);
int32_t ltc2688_set_dither_mode(struct ltc2688_dev *dev, uint8_t channel,
                bool en);
int32_t ltc2688_set_span(struct ltc2688_dev *dev, uint8_t channel,
             enum ltc2688_voltage_range range);
int32_t ltc2688_set_dither_phase(struct ltc2688_dev *dev, uint8_t channel,
                 enum  ltc2688_dither_phase phase);
int32_t ltc2688_set_dither_period(struct ltc2688_dev *dev, uint8_t channel,
                  enum  ltc2688_dither_period period);
int32_t ltc2688_select_tg_dith_clk(struct ltc2688_dev *dev, uint8_t channel,
                   enum  ltc2688_clk_input clk_input);
int32_t ltc2688_select_reg(struct ltc2688_dev *dev, uint8_t channel,
               enum  ltc2688_a_b_register sel_reg);
int32_t ltc2688_software_reset(struct ltc2688_dev *dev);
int32_t ltc2688_set_voltage(struct ltc2688_dev *dev, uint8_t channel,
                float voltage);
int32_t ltc2688_software_toggle(struct ltc2688_dev *dev, uint8_t channel);
int32_t ltc2688_init(struct ltc2688_dev **device,
             struct ltc2688_init_param init_param);
int32_t ltc2688_remove(struct ltc2688_dev *dev);
 
#endif // __LTC2688_H__