Public Attributes | List of all members
ad9523_platform_data Struct Reference

platform specific information More...

#include <ad9523.h>

Collaboration diagram for ad9523_platform_data:
Collaboration graph

Public Attributes

uint32_t vcxo_freq
uint8_t spi3wire
uint8_t refa_diff_rcv_en
uint8_t refb_diff_rcv_en
uint8_t zd_in_diff_en
uint8_t osc_in_diff_en
uint8_t refa_cmos_neg_inp_en
uint8_t refb_cmos_neg_inp_en
uint8_t zd_in_cmos_neg_inp_en
uint8_t osc_in_cmos_neg_inp_en
uint16_t refa_r_div
uint16_t refb_r_div
uint16_t pll1_feedback_div
uint16_t pll1_charge_pump_current_nA
uint8_t zero_delay_mode_internal_en
uint8_t osc_in_feedback_en
uint8_t pll1_bypass_en
uint8_t pll1_loop_filter_rzero
uint8_t ref_mode
uint32_t pll2_charge_pump_current_nA
uint8_t pll2_ndiv_a_cnt
uint8_t pll2_ndiv_b_cnt
uint8_t pll2_freq_doubler_en
uint8_t pll2_r2_div
uint8_t pll2_vco_diff_m1
uint8_t pll2_vco_diff_m2
uint8_t rpole2
uint8_t rzero
uint8_t cpole1
uint8_t rzero_bypass_en
int32_t num_channels
struct ad9523_channel_specchannels
int8_t name [16]

Detailed Description

platform specific information

Member Data Documentation

◆ channels

struct ad9523_channel_spec* ad9523_platform_data::channels

Pointer to channel array.

◆ cpole1

uint8_t ad9523_platform_data::cpole1

PLL2 loop filter Cpole capacitor value.

◆ name

int8_t ad9523_platform_data::name[16]

Optional alternative iio device name.

◆ num_channels

int32_t ad9523_platform_data::num_channels

Array size of struct ad9523_channel_spec.

◆ osc_in_cmos_neg_inp_en

uint8_t ad9523_platform_data::osc_in_cmos_neg_inp_en

OSC single-ended neg./pos. input enable.

◆ osc_in_diff_en

uint8_t ad9523_platform_data::osc_in_diff_en

OSC differential/ single-ended input selection.

◆ osc_in_feedback_en

uint8_t ad9523_platform_data::osc_in_feedback_en

PLL1 feedback path, local feedback from the OSC_IN receiver or zero delay mode

◆ pll1_bypass_en

uint8_t ad9523_platform_data::pll1_bypass_en

Bypass PLL1 - Single loop mode

◆ pll1_charge_pump_current_nA

uint16_t ad9523_platform_data::pll1_charge_pump_current_nA

Magnitude of PLL1 charge pump current (nA).

◆ pll1_feedback_div

uint16_t ad9523_platform_data::pll1_feedback_div

PLL1 10-bit Feedback N divider.

◆ pll1_loop_filter_rzero

uint8_t ad9523_platform_data::pll1_loop_filter_rzero

PLL1 Loop Filter Zero Resistor selection.

◆ pll2_charge_pump_current_nA

uint32_t ad9523_platform_data::pll2_charge_pump_current_nA

Magnitude of PLL2 charge pump current (nA).

◆ pll2_freq_doubler_en

uint8_t ad9523_platform_data::pll2_freq_doubler_en

PLL2 frequency doubler enable.

◆ pll2_ndiv_a_cnt

uint8_t ad9523_platform_data::pll2_ndiv_a_cnt

PLL2 Feedback N-divider, A Counter, range 0..4.

◆ pll2_ndiv_b_cnt

uint8_t ad9523_platform_data::pll2_ndiv_b_cnt

PLL2 Feedback N-divider, B Counter, range 0..63.

◆ pll2_r2_div

uint8_t ad9523_platform_data::pll2_r2_div

PLL2 R2 divider, range 0..31.

◆ pll2_vco_diff_m1

uint8_t ad9523_platform_data::pll2_vco_diff_m1

VCO1 divider, range 3..5.

◆ pll2_vco_diff_m2

uint8_t ad9523_platform_data::pll2_vco_diff_m2

VCO2 divider, range 3..5.

◆ ref_mode

uint8_t ad9523_platform_data::ref_mode

Reference mode selection.

◆ refa_cmos_neg_inp_en

uint8_t ad9523_platform_data::refa_cmos_neg_inp_en

REFA single-ended neg./pos. input enable.

◆ refa_diff_rcv_en

uint8_t ad9523_platform_data::refa_diff_rcv_en

REFA differential/single-ended input selection.

◆ refa_r_div

uint16_t ad9523_platform_data::refa_r_div

PLL1 10-bit: REFA R divider.

◆ refb_cmos_neg_inp_en

uint8_t ad9523_platform_data::refb_cmos_neg_inp_en

◆ refb_diff_rcv_en

uint8_t ad9523_platform_data::refb_diff_rcv_en

REFB differential/single-ended input selection.

◆ refb_r_div

uint16_t ad9523_platform_data::refb_r_div

PLL1 10-bit: REFB R divider.

◆ rpole2

uint8_t ad9523_platform_data::rpole2

PLL2 loop filter Rpole resistor value.

◆ rzero

uint8_t ad9523_platform_data::rzero

PLL2 loop filter Rzero resistor value.

◆ rzero_bypass_en

uint8_t ad9523_platform_data::rzero_bypass_en

PLL2 loop filter Rzero bypass enable.

◆ spi3wire

uint8_t ad9523_platform_data::spi3wire

Enable SPI-3wire mode

◆ vcxo_freq

uint32_t ad9523_platform_data::vcxo_freq

External VCXO frequency in Hz

◆ zd_in_cmos_neg_inp_en

uint8_t ad9523_platform_data::zd_in_cmos_neg_inp_en

Zero Delay single-ended neg./pos. input enable.

◆ zd_in_diff_en

uint8_t ad9523_platform_data::zd_in_diff_en

Zero Delay differential/single-ended input selection.

◆ zero_delay_mode_internal_en

uint8_t ad9523_platform_data::zero_delay_mode_internal_en

Internal, external Zero Delay mode selection.

The documentation for this struct was generated from the following file: