adi.Stingray

The adi.Stingray system object is an API to control the
Stingray X/Ku Band Beamforming Developer Platform.

rx = adi.Stingray;
rx = adi.Stingray('uri','ip:ip:192.168.2.1');

Stingray X/Ku Band Beamforming Developer Platform Wiki

Creation

The class can be instantiated in the following way with and without property name value pairs.

dev = adi.Stingray
dev = adi.Stingray(Name, Value)

Properties

Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them.

If a property is tunable, you can change its value at any time.

For more information on changing property values, see System Design in MATLAB Using System Objects.

NumADAR1000s +

Mode +

Mode is a cellarray where each element addresses individual ADAR1000's. Each cell must contain a string of value 'Rx', 'Tx', or 'disabled' to set the modes.

LNABiasOutEnable +

Enable output of LNA bias DAC. LNABiasOutEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

LNABiasOn +

External Bias for External LNAs. LNABiasOn is an array where each element addresses individual ADAR1000's.

BeamMemEnable +

Enable beam memory. BeamMemEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

BiasDACEnable +

Enable PA and LNA bias DACs. BiasDACEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

BiasDACMode +

External Amplifier Bias Control. BiasDACMode is a cellarray where each element addresses individual ADAR1000's. Each cell must contain a string of values 'On' or 'Off' to set the modes.

BiasMemEnable +

Enable bias memory. BiasMemEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

CommonMemEnable +

CommonMemEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

CommonRxBeamState +

Static Rx Beam Position Load. CommonRxBeamState is an array where each element addresses individual ADAR1000's.

CommonTxBeamState +

Static Tx Beam Position Load. CommonTxBeamState is an array where each element addresses individual ADAR1000's.

ExternalTRPin +

Select Tx/Rx output driver. TxRxSwitchControl is a cellarray where each element addresses individual ADAR1000's. Each cell must contain a string of values 'Pos' or 'Neg' to set the modes.

ExternalTRPolarity +

Controls Sense of Tx/Rx Switch Driver Output. ExternalTRPolarity is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

LNABiasOff +

External Bias for External LNAs. LNABiasOff is an array where each element addresses individual ADAR1000's.

PolState +

Control for External Polarity Switch Drivers. PolSwitchEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

PolSwitchEnable +

Enables Switch Driver for External Polarization Switch. PolSwitchEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

RxLNABiasCurrent +

Set LNA bias current. RxLNABiasCurrent is an array where each element addresses individual ADAR1000's.

RxLNAEnable +

Enables Rx LNA. RxLNAEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

RxToTxDelay1 +

LNA Bias off to TR Switch Delay. RxToTxDelay1 is an array where each element addresses individual ADAR1000's.

RxToTxDelay2 +

TR Switch to PA Bias on Delay. RxToTxDelay2 is an array where each element addresses individual ADAR1000's.

RxVGAEnable +

Enable Rx Channel VGAs. RxVGAEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

RxVGABiasCurrentVM +

Apply Rx bias current. RxVGABiasCurrentVM is an array where each element addresses individual ADAR1000's.

RxVMEnable +

Enable Rx Channel Vector Modulators. RxVMEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

SequencerEnable +

Enable sequencer. Sequencer is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

TRSwitchEnable +

Enables Switch Driver for External Tx/Rx Switch. TRSwitchEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

TxPABiasCurrent +

Set Tx driver bias current. TxPABiasCurrent is an array where each element addresses individual ADAR1000's.

TxPAEnable +

Enables the Tx channel drivers. TxToRxDelay1 is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

TxToRxDelay1 +

PA Bias off to TR Switch Delay. TxToRxDelay1 is an array where each element addresses individual ADAR1000's.

TxToRxDelay2 +

TR Switch to LNA Bias on Delay. TxToRxDelay2 is an array where each element addresses individual ADAR1000's.

TxVGAEnable +

Enable Tx Channel VGAs. TxVGAEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

TxVGABiasCurrentVM +

Apply Tx bias current. TxVGABiasCurrentVM is an array where each element addresses individual ADAR1000's.

TxVMEnable +

Enable Tx Channel Vector Modulators. TxVMEnable is an array where each element addresses individual ADAR1000's. Each element must be a logical true (to enable) or false (to not enable).

TxRxSwitchControl +

Set source of control for Rx and Tx switching. TxRxSwitchControl is a cellarray where each element addresses individual ADAR1000's. Each cell must contain a string of values 'spi' or 'external' to set the modes.

DetectorEnable +

DetectorEnable is an array where each element addresses each channel of each ADAR1000.

DetectorPower +

DetectorPower is an array where each element addresses each channel of each ADAR1000.

PABiasOff +

Apply bias off to external PA. PABiasOff is an array where each element addresses each channel of each ADAR1000.

PABiasOn +

Apply bias on to external PA. PABiasOn is an array where each element addresses each channel of each ADAR1000.

RxAttn +

Attenuate Rx channels. RxAttn is an array where each element addresses each channel of each ADAR1000. Each element must be a logical true (to attenuate) or false (to not attenuate).

RxBeamState +

Load Rx Position. RxBeamState is an array where each element addresses each channel of each ADAR1000. Each element must be a value between 0 and 360.

RxPowerDown +

Power down Rx channels. RxPowerDown is a logical array where each element addresses each channel of each ADAR1000. Each element must be a logical false (to power up) or true (to power down).

RxGain +

Apply gain to Rx channels. RxGain is an array where each element addresses each channel of each ADAR1000. Each element must be a value between 0 and 127.

RxPhase +

Apply phase to Rx channels. RxPhase is an array where each element addresses each channel of each ADAR1000. Each element must be a value between 0 and 360.

TxAttn +

Attenuate Tx channels. TxAttn is an array where each element addresses each channel of each ADAR1000. Each element must be a logical true (to attenuate) or false (to not attenuate).

TxBeamState +

Load Tx Position. TxBeamState is an array where each element addresses each channel of each ADAR1000. Each element must be a value between 0 and 360.

TxPowerDown +

Power down Tx channels. TxPowerDown is a logical array where each element addresses each channel of each ADAR1000. Each element must be a logical false (to power up) or true (to power down).

TxGain +

Apply gain to Tx channels. TxGain is an array where each element addresses each channel of each ADAR1000. Each element must be a value between 0 and 127.

TxPhase +

Apply phase to Tx channels. TxPhase is an array where each element addresses each channel of each ADAR1000. Each element must be a value between 0 and 360.

RxSequencerStart +

RxSequencerStart Rx Sequencer Start RxSequencerStart is a logical array where each element addresses each channel of each ADAR1000. Each element must be a logical false or true.

RxSequencerStop +

RxSequencerStop is a logical array where each element addresses each channel of each ADAR1000. Each element must be a logical false or true.

TxSequencerStart +

TxSequencerStart Tx Sequencer Start TxSequencerStart is a logical array where each element addresses each channel of each ADAR1000. Each element must be a logical false or true.

TxSequencerStop +

TxSequencerStop is a logical array where each element addresses each channel of each ADAR1000. Each element must be a logical false or true.

Temp +

Get temperature of X-band Development Platform.

TargetFrequency +

ADAR1000 target frequency

ElementSpacing +

ADAR1000 element spacing

uri +

Hostname or IP address of remote libIIO deviceHelp for adi.Stingray/uri is inherited from superclass matlabshared.libiio.base

channelCount +

Number of enabled channelsHelp for adi.Stingray/channelCount is inherited from superclass matlabshared.libiio.base

DataTimeout +

Timeout for I/O operations (in seconds) 0 = non-blocking (or default context timeout) Inf = infiniteHelp for adi.Stingray/DataTimeout is inherited from superclass matlabshared.libiio.base

EnabledChannels +

Indexs of channels to be enabled. Input should be a [1xN] vector with the indexes of channels to be enabled. Order is irrelevant

PowerUpDown +

Pulse to sequence the first RF power rails in ADAR1000-EVAL1Z board power treeHelp for adi.Stingray/PowerUpDown is inherited from superclass adi.internal.StingrayControl

Ctrl5V +

Pulse +5V in ADAR1000-EVAL1Z board power treeHelp for adi.Stingray/Ctrl5V is inherited from superclass adi.internal.StingrayControl

PAOn +

Enable/disable PA in ADAR1000-EVAL1Z board power treeHelp for adi.Stingray/PAOn is inherited from superclass adi.internal.StingrayControl

TXRX0 +

Select Channel A for XUD1A Up and Down converter Usage: Channel A in Tx Mode - Set TXRX0 to 0, RxGainMode to 0 Channel A in Rx Low Gain Mode - Set TXRX0 to 1, RxGainMode to 0 Channel A in Rx High Gain Mode - Set TXRX0 to 1, RxGainMode to 1Help for adi.Stingray/TXRX0 is inherited from superclass adi.internal.XUD1aControl

TXRX1 +

Select Channel B for XUD1A Up and Down converter Usage: Channel B in Tx Mode - Set TXRX1 to 0, RxGainMode to 0 Channel B in Rx Low Gain Mode - Set TXRX1 to 1, RxGainMode to 0 Channel B in Rx High Gain Mode - Set TXRX1 to 1, RxGainMode to 1Help for adi.Stingray/TXRX1 is inherited from superclass adi.internal.XUD1aControl

TXRX2 +

Select Channel C for XUD1A Up and Down converter Usage: Channel C in Tx Mode - Set TXRX2 to 0, RxGainMode to 0 Channel C in Rx Low Gain Mode - Set TXRX2 to 1, RxGainMode to 0 Channel C in Rx High Gain Mode - Set TXRX2 to 1, RxGainMode to 1Help for adi.Stingray/TXRX2 is inherited from superclass adi.internal.XUD1aControl

TXRX3 +

Select Channel D for XUD1A Up and Down converter Usage: Channel D in Tx Mode - Set TXRX3 to 0, RxGainMode to 0 Channel D in Rx Low Gain Mode - Set TXRX3 to 1, RxGainMode to 0 Channel D in Rx High Gain Mode - Set TXRX3 to 1, RxGainMode to 1Help for adi.Stingray/TXRX3 is inherited from superclass adi.internal.XUD1aControl

PllOutputSel +

Configure ADF4371 output frequency 1: 8-16 GHz 0: 16-32 GHzHelp for adi.Stingray/PllOutputSel is inherited from superclass adi.internal.XUD1aControl

RxGainMode +

For usage, see usage of TXRX[0-3]Help for adi.Stingray/RxGainMode is inherited from superclass adi.internal.XUD1aControl

ADF4371Name +

Configure programmable divider for ADF4371 Options: 'RF16x' or 'RF32x'Help for adi.Stingray/ADF4371Name is inherited from superclass adi.internal.ADF4371

ADF4371Frequency +

Configure ADF4371 output frequency Allowed range: 'RF16x': >= 8GHz, <= 16 GHz 'RF32x': >= 16GHz, <= 32 GHzHelp for adi.Stingray/ADF4371Frequency is inherited from superclass adi.internal.ADF4371

ADF4371Phase +

Configure ADF4371 output phase in milli-degrees Range: 0-359999Help for adi.Stingray/ADF4371Phase is inherited from superclass adi.internal.ADF4371

MUXOutEnable +

Enable output multiplexer on the ADF4371Help for adi.Stingray/MUXOutEnable is inherited from superclass adi.internal.ADF4371

BurstCount +

Configure number of bursts in TDD controllerHelp for adi.Stingray/BurstCount is inherited from superclass adi.internal.AXICoreTDD

CounterInt +

Configure TDD internal counter start valueHelp for adi.Stingray/CounterInt is inherited from superclass adi.internal.AXICoreTDD

DMAGateingMode +

Configure TDD DMA gate 0 - none, 1 - rx_only, 2 - tx_only, 3 - rx_txHelp for adi.Stingray/DMAGateingMode is inherited from superclass adi.internal.AXICoreTDD

Enable +

Enable or disable the TDD engineHelp for adi.Stingray/Enable is inherited from superclass adi.internal.AXICoreTDD

EnableMode +

Configure TDD controller RX/TX mode 1 - rx_only, 2 - tx_only, 3 - rx_txHelp for adi.Stingray/EnableMode is inherited from superclass adi.internal.AXICoreTDD

FrameLength +

TDD Frame LengthHelp for adi.Stingray/FrameLength is inherited from superclass adi.internal.AXICoreTDD

Secondary +

Enable secondary times. Allows one signal to go high twice at two times within a single frame.Help for adi.Stingray/Secondary is inherited from superclass adi.internal.AXICoreTDD

SyncTerminalType +

Sync Terminal TypeHelp for adi.Stingray/SyncTerminalType is inherited from superclass adi.internal.AXICoreTDD

TxDPoff +

TDD: TX DMA port timing parameters in ms. Format [primary_off secondary_off]Help for adi.Stingray/TxDPoff is inherited from superclass adi.internal.AXICoreTDD

TxDPon +

TDD: TX DMA port timing parameters in ms. Format [primary_on secondary_on]Help for adi.Stingray/TxDPon is inherited from superclass adi.internal.AXICoreTDD

TxOff +

TDD: TX RF port timing parameters in ms. Format [primary_off secondary_off]Help for adi.Stingray/TxOff is inherited from superclass adi.internal.AXICoreTDD

TxOn +

TDD: TX RF port timing parameters in ms. Format [primary_on secondary_on]Help for adi.Stingray/TxOn is inherited from superclass adi.internal.AXICoreTDD

TxVCOoff +

TDD: TX VCO port timing parameters in ms. Format [primary_off secondary_off]Help for adi.Stingray/TxVCOoff is inherited from superclass adi.internal.AXICoreTDD

TxVCOon +

TDD: TX VCO port timing parameters in ms. Format [primary_on secondary_on]Help for adi.Stingray/TxVCOon is inherited from superclass adi.internal.AXICoreTDD

RxDPoff +

TDD: RX DMA port timing parameters in ms. Format [primary_off secondary_off]Help for adi.Stingray/RxDPoff is inherited from superclass adi.internal.AXICoreTDD

RxDPon +

TDD: RX DMA port timing parameters in ms. Format [primary_on secondary_on]Help for adi.Stingray/RxDPon is inherited from superclass adi.internal.AXICoreTDD

RxOff +

TDD: RX RF port timing parameters in ms. Format [primary_off secondary_off]Help for adi.Stingray/RxOff is inherited from superclass adi.internal.AXICoreTDD

RxOn +

TDD: RX RF port timing parameters in ms. Format [primary_on secondary_on]Help for adi.Stingray/RxOn is inherited from superclass adi.internal.AXICoreTDD

RxVCOoff +

TDD: RX VCO port timing parameters in ms. Format [primary_off secondary_off]Help for adi.Stingray/RxVCOoff is inherited from superclass adi.internal.AXICoreTDD

RxVCOon +

TDD: RX VCO port timing parameters in ms. Format [primary_on secondary_on]Help for adi.Stingray/RxVCOon is inherited from superclass adi.internal.AXICoreTDD

LTC2314RFPower +

RF power level measured from on-board RF detector, LTC2314Help for adi.Stingray/LTC2314RFPower is inherited from superclass adi.internal.LTC2314