PicoZed Power and Sequencing

Sequence and timing information for the PicoZed SDR is controlled by the ADM1166 Super Sequencer with Margining Control and Nonvolatile Fault Recording. These files and information were designed in accordance with the Xilinx product specification Zynq-7000 All Programmable SoC: DC and AC Switching Characteristics to prevent damage to the FPGA.

Timing Diagram

The diagram below details the timing and order of operation for every enable pin, voltage rail, gated transistor, and sequencer state on the board. This information is meant to be used in conjunction with the state diagram, Xilinx document, and sequencer code to provide a more complete understanding of this complicated power design.

Some of the voltages for this design are generated by the Avnet PicoZed SDR Carrier Card and brought to the PicoZed SDR through connectors JX1–JX4. These voltages are gated by a transistor and must be qualified by the sequencer before they can pass to other components on the board. The remainder of the voltages are generated on board by an LDO or switcher.

The sequencer qualifies a particular voltage then drives the enable pin high to turn on the next voltage for qualification and/or to drive a transistor gate and allow that particular voltage access to the downstream circuitry.

For example, in state 3 of the sequencing engine, the ADM1166 will check if the 1.0V rail is in range. If yes, the state machine will attempt to turn on 1.8V by setting 1.8V_EN high. If no, the state machine will take appropriate action. State 4 checks the 1.8V rail is in range, and tries to enable 1.35V by setting 1.35V_EN high, and so on.

Download

Timing Diagram — generated with Timing Diagram Editor

State Diagram

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/sequencer_state_diagram.jpg

Programming the ADM1166 Power Sequencer

Using Linux or Hyperterminal Program

Required items

  • A 12V, 5A AC-DC Power Adapter

  • 1 PicoZed SDR Carrier Board (AES-PZSDRCC-FMC-G)

  • 1 PicoZed SDR Board (AES-PZSDR-Z7035-AD9361-G)

  • 1 microSD card or 1 SD card

  • 1 micro USB cable

  • 1 Ethernet cable

Setting up the hardware

  1. Plug the PicoZed SDR into the PicoZed SDR Carrier.

  2. Plug the power supply into connector P20.

  3. Plug the micro USB cable into connector P10.

  4. Plug the Ethernet cable into your network and the PicoZed SDR Carrier.

  5. Insert the micro SD card into the PicoZed SDR.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/pzsdr_rfsom_sequencer_setup_serial_command2.jpg

Command line

In the command line of your terminal program, enter the following:

root@analog:~# git clone https://github.com/analogdevicesinc/PicoZed-sdr.git
Cloning into 'PicoZed-sdr'...
remote: Counting objects: 13, done.
remote: Compressing objects: 100% (11/11), done.
remote: Total 13 (delta 2), reused 0 (delta 0), pack-reused 0
Unpacking objects: 100% (13/13), done.
Checking connectivity... done.
root@analog:~# cd PicoZed-sdr/
root@analog:~# cd SDR2_ADM1166_updates/
root@analog:~# chmod +x ./adm1166_eeprom
root@analog:~# ./adm1166_eeprom ADM1166.hex
Starting to reprogramm the AD1166 EEPROM.
Reading f800 ... success
 ... existing memory is identical.
...
Successfully reprogrammed the ADM1166 EEPROM.
 ... reboot the board to load the new configuration.
root@analog:~#

Reboot the board and the new EEPROM configuration will be implemented.

Using the USB-SDP-CABLEZ serial I/O interface

Required items

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/usb-sdp-cablez.png

  • 1 Custom Adapter for the USB-SDP-CABLEZ

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adapter_board_t_b.jpg

Software setup

  1. Install the ADMxxxx Run Time Installer.

  2. Install the Super Sequencer Configuration Tool.

  3. Install the Graphviz setup (included in the Super Sequencer Tool install process; allows generation of state diagrams).

Hardware setup

  1. Insert the micro SD card into the PZSDR board.

  2. Firmly plug the PZSDR board into the Breakout board.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/setup_2.jpg

  3. Using a USB mini cable, plug the USB-SDP-CABLEZ into the PC.

  4. Connect the custom adapter to the USB-SDP-CABLEZ.

    Note

    If using the carrier board, place a piece of non-conductive tape on the bottom of the adapter board to avoid unintentional short circuits. If using the breakout board or the PZSDR card by itself, no tape is required.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adapter_board_b_tape.jpg

  5. Plug the adapter into connector P1 on the PZSDR board (underside of the PCB), lining up the 5 pins with the 5 holes of the connector.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adapter_board_alignment.jpg

  6. Check that the green LED is on, confirming the boards are correctly mated.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adapter_plugged_in_and_led_on_2.jpg

Note

If the PZSDR board is not plugged into the breakout board, the sequencer tool cannot monitor the voltage rails (but it can still be properly programmed). To monitor the voltage rails, plug the PZSDR board into the breakout board and toggle S5 so the switch is towards the outside edge of the board.

How to program the sequencer

  1. Find and open the Super Sequencer Software. The ADM1166 should be listed under device type.

    Note

    If the ADM1166 is not listed, check the connection between connector P1 of the PZSDR board and the custom adapter. A solid connection is required for configuration.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/software_1.png

  2. Click Continue. If prompted to load settings from last saved session, click No.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/software_2.png

  3. Click File → Recall Settings from File → Recall.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/software_4.png

  4. Navigate to the desired .txt file and select it. Click Recall then Ok.

  5. Wait a few seconds while the software imports the configuration. A prompt appears detailing the checksum results.

    https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/software_3.png

  6. Click Ok → EEPROM OPTIONS → Copy Entire Configuration to EEPROM.

  7. Wait a few seconds while the software uploads the configuration to the ADM1166. The sequencer is now properly configured.

  8. Disconnect the custom adapter from the PZSDR board.

Troubleshooting

If the board has no power, plug in the USB-SDP-CABLEZ and navigate to the Readback tab. From there you can observe each of the VH, VPx, VXx input voltages as read by the ADM1166.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adm1166_readback.png

Software — Input Voltage Range Determination and Setting

The following provides a detailed overview of how the ADM1166 input voltage ranges are calculated and programmed to account for input and output Zynq voltage settings, ADM1166 power sequencer input voltage ranges, etc.

Zynq I/O Voltage Range

From the XC7Z035 Zynq DC and AC Switching Characteristics:

Description

VIN_MIN

VIN_MAX

VMGTAVCC

0.97 V

1.080 V

VMGTAVTT

1.17 V

1.230 V

VCCO (HR Bank)

1.14 V

3.465 V

VCCO (HP Bank)

1.14 V

1.890 V

ADM1166 Super Sequencer Input Voltage Ranges

The ADM1166 has several input voltage ranges for the VP and VX pins. The VX pins only work on the Ultra-Low Range setting.

ADM1166 Range

VP_MIN

VP_MAX

VX_MIN

VX_MAX

Mid-Range

2.5000 V

6.000 V

—

—

Low Range

1.250 V

3.000 V

—

—

Ultra-Low Range

0.573 V

1.375 V

0.573 V

1.375 V

VMGTAVCC and VMGTAVTT drive directly into the VX3 and VX4 pins of the ADM1166. The I/O voltage range lines up nicely inside the input voltage range of the sequencer: 1.14V is above the minimum of the Ultra-Low Range (0.573V) and 1.23V is below the maximum (1.375V).

The problem

The VCCO I/O voltage levels don’t fit inside any one range of the sequencer. 1.14V is below the minimum voltage of the Low-Range (1.25V), and the 1.89V/3.465V is above the maximum of the Ultra-Low Range (1.375V).

Fixing the problem for HP Banks 33 and 34

A resistor divider is added between the bank voltage and the ADM1166 input. The input impedance of the IC to ground (R3) is in parallel with R2.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adm1166_input_impedance.png

Its resistance varies from 20kΩ to 60kΩ depending on the input voltage.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adm1166_input_impedance_graph.png

The resistor divider was designed so the worst case output voltage fits inside the Ultra-Low Range:

  • When JX_VCCO_33_34 = 1.14V, the input impedance of the IC is 35kΩ.

  • When JX_VCCO_33_34 = 1.89V, the input impedance of the IC is 23kΩ.

Description

Ohms

Ohms

R2

10.0k

10.0k

R3

35k

23k

R2 ‖ R3

7.777k

6.96k

Applying Ohm’s law:

  • JX_VCCO_33_34_SEQ = (1.14V × 7777) / (4020 + 7777) = 0.7515V

  • JX_VCCO_33_34_SEQ = (1.89V × 6969) / (4020 + 6969) = 1.198V

Both values are inside the Ultra-Low Range of the power sequencer.

Fixing the problem for HR Banks 12 and 13

The resistor divider for bank 12 (HR bank) has swapped resistor values with the bottom leg of the divider connected to a 3.3V supply. Bank 13 is also an HR bank with the same resistor divider; the calculations are identical.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/bank_12_and_13_resistor_divider.png

Nodal analysis gives:

\[V_{OUT} = \frac{V_2 \cdot R_1 \cdot R_3 + V_1 \cdot R_2 \cdot R_3}{R_1 \cdot R_2 + R_2 \cdot R_3 + R_1 \cdot R_3}\]

For the smallest possible Zynq output voltage and smallest ADM1166 input impedance: VOUT = 2.431V.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/adm1166_input_impedance_graph.png

This shows the smallest possible output voltage of the Zynq does NOT sit in the Mid-Range setting (minimum is 2.5V). This accommodates most use cases.

Warning

If you are trying to use 1.2V for HR bank 12 or bank 13, you MUST CHANGE to the Low Range setting.

For the largest possible Zynq output voltage and largest ADM1166 input impedance: VOUT = 3.041V. This sits inside the Mid-Range after going through the resistor divider.

Summary

Zynq Voltage Rail

ADM1166 Range

Datasheet Min

Datasheet Max

Divider Vout Min

Divider Vout Max

ADM1166 Input Min

ADM1166 Input Max

VMGTAVCC

Ultralow

0.970 V

1.080 V

—

—

0.573 V

1.375 V

VMGTAVTT

Ultralow

1.170 V

1.230 V

—

—

0.573 V

1.375 V

VCCO (HR Bank)

Mid-Range

1.140 V

3.465 V

2.431 V

3.043 V

2.500 V

6.000 V

VCCO (HP Bank)

Ultralow

1.140 V

1.890 V

0.748 V

1.192 V

0.573 V

1.375 V

Resistor divider values

All resistors are 1%.

Description

ADM1166 Range

V1

R1

R2

V2

VCCO (HR Bank)

Ultralow

1.140 V

10.0k

4.02k

3.300 V

VCCO (HR Bank)

Ultralow

3.465 V

10.0k

4.02k

3.300 V

VCCO (HP Bank)

Mid-Range

1.140 V

4.02k

10.0k

0.000 V

VCCO (HP Bank)

Ultralow

1.890 V

4.02k

10.0k

0.000 V

Sequencer default configuration

When you purchase the PicoZed SDR 2x2 SOM, the sequencer comes pre-programmed. Settings can be changed using the Super Sequencer software with the USB-SDP-CABLEZ dongle. The images below show the default states for the voltage rails.

JX_MGTAVCC

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/mgtavcc_software.png

JX_MGTAVTT

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/mgtavttsoftware.png

JX_VCCO_12

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/sw_jx_vcco_12.png

JX_VCCO_13

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/sw_jx_vcco_13.png

JX_VCCO_33_34

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/vcco_33_34software.png

The ADM1166 Super Sequencer Software shows where to select the range for each input pin (VP or VX), how to set the desired UV/OV thresholds, hysteresis, fault type, and glitch delay.

Note

The thresholds are programmed using 8-bit resolution, so the program was written to be as close to the UV or OV threshold as possible without restricting the range, and in some cases adding a small amount of headroom. This is why the calculated tables differ slightly from the software values.

VH Thresholds

Warning

Be very careful when modifying VH Thresholds. These thresholds are designed based on the FMC Carrier to account for absolute worst case diode voltage drop over current and temperature.

https://media.githubusercontent.com/media/analogdevicesinc/documentation/main/docs/solutions/reference-designs/pzsdr/images/sw_vh.png

Warning

Thinking of modifying other settings? Still be careful! This is not to say DON’T change settings — merely think twice, then think twice more, then program once. The worst thing that can happen is to have a board with no power and no way to reprogram the threshold you just changed.

Recovery procedure

If you adjusted a setting incorrectly and the sequencer won’t allow the system to boot (for example, if you typed the under voltage threshold into the over voltage threshold field), this is recoverable. If you have the USB-SDP-CABLEZ dongle, use the Super Sequencer Software to reprogram the device as described in the Using the USB-SDP-CABLEZ serial I/O interface section above. If you do not have a USB-SDP-CABLEZ dongle, order one, then follow the same procedure.

Default configuration file

The default file that comes pre-loaded when you order hardware can be found on GitHub. This file is updated on occasion to include new features, tweaks, or other improvements.