Documentation/MAX32650/wdt__regs_8h_source.html

/******************************************************************************

 *

 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by

 * Analog Devices, Inc.),

 * Copyright (C) 2023-2024 Analog Devices, Inc.

 *

 * Licensed under the Apache License, Version 2.0 (the "License");

 * you may not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 *     http://www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an "AS IS" BASIS,

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 *

 ******************************************************************************/


#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_WDT_REGS_H_

#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_WDT_REGS_H_


/* **** Includes **** */

#include <stdint.h>


#ifdef __cplusplus

extern "C" {

#endif


#if defined (__ICCARM__)

  #pragma system_include

#endif


#if defined (__CC_ARM)

  #pragma anon_unions

#endif

/*

    If types are not defined elsewhere (CMSIS) define them here

*/

#ifndef __IO

#define __IO volatile

#endif

#ifndef __I

#define __I  volatile const

#endif

#ifndef __O

#define __O  volatile

#endif

#ifndef __R

#define __R  volatile const

#endif


/* **** Definitions **** */


typedef struct {

    __IO uint32_t ctrl;

    __O  uint32_t rst;

} mxc_wdt_regs_t;


/* Register offsets for module WDT */

#define MXC_R_WDT_CTRL                     ((uint32_t)0x00000000UL)

#define MXC_R_WDT_RST                      ((uint32_t)0x00000004UL)

#define MXC_F_WDT_CTRL_INT_PERIOD_POS                  0

#define MXC_F_WDT_CTRL_INT_PERIOD                      ((uint32_t)(0xFUL << MXC_F_WDT_CTRL_INT_PERIOD_POS))

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW31            ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW31            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW31 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW30            ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW30            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW30 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW29            ((uint32_t)0x2UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW29            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW29 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW28            ((uint32_t)0x3UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW28            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW28 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW27            ((uint32_t)0x4UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW27            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW27 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW26            ((uint32_t)0x5UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW26            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW26 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW25            ((uint32_t)0x6UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW25            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW25 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW24            ((uint32_t)0x7UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW24            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW24 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW23            ((uint32_t)0x8UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW23            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW23 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW22            ((uint32_t)0x9UL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW22            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW22 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW21            ((uint32_t)0xAUL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW21            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW21 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW20            ((uint32_t)0xBUL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW20            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW20 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW19            ((uint32_t)0xCUL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW19            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW19 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW18            ((uint32_t)0xDUL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW18            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW18 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW17            ((uint32_t)0xEUL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW17            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW17 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW16            ((uint32_t)0xFUL)

#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW16            (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW16 << MXC_F_WDT_CTRL_INT_PERIOD_POS)

#define MXC_F_WDT_CTRL_RST_PERIOD_POS                  4

#define MXC_F_WDT_CTRL_RST_PERIOD                      ((uint32_t)(0xFUL << MXC_F_WDT_CTRL_RST_PERIOD_POS))

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW31            ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW31            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW31 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW30            ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW30            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW30 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW29            ((uint32_t)0x2UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW29            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW29 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW28            ((uint32_t)0x3UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW28            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW28 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW27            ((uint32_t)0x4UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW27            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW27 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW26            ((uint32_t)0x5UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW26            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW26 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW25            ((uint32_t)0x6UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW25            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW25 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW24            ((uint32_t)0x7UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW24            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW24 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW23            ((uint32_t)0x8UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW23            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW23 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW22            ((uint32_t)0x9UL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW22            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW22 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW21            ((uint32_t)0xAUL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW21            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW21 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW20            ((uint32_t)0xBUL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW20            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW20 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW19            ((uint32_t)0xCUL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW19            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW19 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW18            ((uint32_t)0xDUL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW18            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW18 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW17            ((uint32_t)0xEUL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW17            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW17 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW16            ((uint32_t)0xFUL)

#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW16            (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW16 << MXC_F_WDT_CTRL_RST_PERIOD_POS)

#define MXC_F_WDT_CTRL_WDT_EN_POS                      8

#define MXC_F_WDT_CTRL_WDT_EN                          ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_WDT_EN_POS))

#define MXC_V_WDT_CTRL_WDT_EN_DIS                      ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_WDT_EN_DIS                      (MXC_V_WDT_CTRL_WDT_EN_DIS << MXC_F_WDT_CTRL_WDT_EN_POS)

#define MXC_V_WDT_CTRL_WDT_EN_EN                       ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_WDT_EN_EN                       (MXC_V_WDT_CTRL_WDT_EN_EN << MXC_F_WDT_CTRL_WDT_EN_POS)

#define MXC_F_WDT_CTRL_INT_FLAG_POS                    9

#define MXC_F_WDT_CTRL_INT_FLAG                        ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_INT_FLAG_POS))

#define MXC_V_WDT_CTRL_INT_FLAG_INACTIVE               ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_INT_FLAG_INACTIVE               (MXC_V_WDT_CTRL_INT_FLAG_INACTIVE << MXC_F_WDT_CTRL_INT_FLAG_POS)

#define MXC_V_WDT_CTRL_INT_FLAG_PENDING                ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_INT_FLAG_PENDING                (MXC_V_WDT_CTRL_INT_FLAG_PENDING << MXC_F_WDT_CTRL_INT_FLAG_POS)

#define MXC_F_WDT_CTRL_INT_EN_POS                      10

#define MXC_F_WDT_CTRL_INT_EN                          ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_INT_EN_POS))

#define MXC_V_WDT_CTRL_INT_EN_DIS                      ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_INT_EN_DIS                      (MXC_V_WDT_CTRL_INT_EN_DIS << MXC_F_WDT_CTRL_INT_EN_POS)

#define MXC_V_WDT_CTRL_INT_EN_EN                       ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_INT_EN_EN                       (MXC_V_WDT_CTRL_INT_EN_EN << MXC_F_WDT_CTRL_INT_EN_POS)

#define MXC_F_WDT_CTRL_RST_EN_POS                      11

#define MXC_F_WDT_CTRL_RST_EN                          ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_RST_EN_POS))

#define MXC_V_WDT_CTRL_RST_EN_DIS                      ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_RST_EN_DIS                      (MXC_V_WDT_CTRL_RST_EN_DIS << MXC_F_WDT_CTRL_RST_EN_POS)

#define MXC_V_WDT_CTRL_RST_EN_EN                       ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_RST_EN_EN                       (MXC_V_WDT_CTRL_RST_EN_EN << MXC_F_WDT_CTRL_RST_EN_POS)

#define MXC_F_WDT_CTRL_RST_FLAG_POS                    31

#define MXC_F_WDT_CTRL_RST_FLAG                        ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_RST_FLAG_POS))

#define MXC_V_WDT_CTRL_RST_FLAG_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_WDT_CTRL_RST_FLAG_NOEVENT                (MXC_V_WDT_CTRL_RST_FLAG_NOEVENT << MXC_F_WDT_CTRL_RST_FLAG_POS)

#define MXC_V_WDT_CTRL_RST_FLAG_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_WDT_CTRL_RST_FLAG_OCCURRED               (MXC_V_WDT_CTRL_RST_FLAG_OCCURRED << MXC_F_WDT_CTRL_RST_FLAG_POS)

#define MXC_F_WDT_RST_WDT_RST_POS                      0

#define MXC_F_WDT_RST_WDT_RST                          ((uint32_t)(0xFFUL << MXC_F_WDT_RST_WDT_RST_POS))

#define MXC_V_WDT_RST_WDT_RST_SEQ0                     ((uint32_t)0xA5UL)

#define MXC_S_WDT_RST_WDT_RST_SEQ0                     (MXC_V_WDT_RST_WDT_RST_SEQ0 << MXC_F_WDT_RST_WDT_RST_POS)

#define MXC_V_WDT_RST_WDT_RST_SEQ1                     ((uint32_t)0x5AUL)

#define MXC_S_WDT_RST_WDT_RST_SEQ1                     (MXC_V_WDT_RST_WDT_RST_SEQ1 << MXC_F_WDT_RST_WDT_RST_POS)

#ifdef __cplusplus

}

#endif


#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_WDT_REGS_H_

mxc_wdt_regs_t::rst
__O uint32_t rst
Definition: wdt_regs.h:78

mxc_wdt_regs_t::ctrl
__IO uint32_t ctrl
Definition: wdt_regs.h:77

mxc_wdt_regs_t
Definition: wdt_regs.h:76