gcfr_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32655_INCLUDE_GCFR_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32655_INCLUDE_GCFR_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __IO uint32_t reg0;                 
    __IO uint32_t reg1;                 
} mxc_gcfr_regs_t;
 
/* Register offsets for module GCFR */
#define MXC_R_GCFR_REG0                    ((uint32_t)0x00000000UL) 
#define MXC_R_GCFR_REG1                    ((uint32_t)0x00000004UL) 
#define MXC_F_GCFR_REG0_ISO_WUP_POS                    0 
#define MXC_F_GCFR_REG0_ISO_WUP                        ((uint32_t)(0x1FFUL << MXC_F_GCFR_REG0_ISO_WUP_POS)) 
#define MXC_F_GCFR_REG0_IPO_WUP_POS                    16 
#define MXC_F_GCFR_REG0_IPO_WUP                        ((uint32_t)(0x7FFUL << MXC_F_GCFR_REG0_IPO_WUP_POS)) 
#define MXC_F_GCFR_REG1_ERFO_WUP_POS                   0 
#define MXC_F_GCFR_REG1_ERFO_WUP                       ((uint32_t)(0x3FFFUL << MXC_F_GCFR_REG1_ERFO_WUP_POS)) 
#define MXC_F_GCFR_REG1_IBRO_WUP_POS                   16 
#define MXC_F_GCFR_REG1_IBRO_WUP                       ((uint32_t)(0x3FUL << MXC_F_GCFR_REG1_IBRO_WUP_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32655_INCLUDE_GCFR_REGS_H_