Here are the data structures with brief descriptions:

Cmsr_decoded_track_t	Structure to contain result of a track decode
Cmsr_sample_t	MSR sample fields
Cmsr_samples_t	Structure to contain raw MSR samples
Cmxc_dma_adv_config_t	The advanced configuration options, these are optional but could be needed in cases where multiple DMA channels are running concurrently or DMA is being used with low bandwidth peripherals
Cmxc_dma_ch_regs_t
Cmxc_dma_config_t	The basic configuration information to set up a DMA channel and prepare it for transfers
Cmxc_dma_srcdst_t	The information needed to complete a DMA transfer
Cmxc_fcr_regs_t
Cmxc_flc_regs_t
Cmxc_gcr_regs_t
Cmxc_gpio_cfg_t	Structure type for configuring a GPIO port
Cmxc_gpio_regs_t
Cmxc_i2c_regs_t
Cmxc_i2c_req_t	The information required to perform a complete I2C transaction as the bus master
Cmxc_i2s_config_t	I2S Configuration Struct
Cmxc_icc_regs_t
Cmxc_pwrseq_regs_t
Cmxc_rtc_regs_t
Cmxc_sir_regs_t
Cmxc_spi_regs_t
Cmxc_spi_req_t	The information required to perform a complete SPI transaction
Cmxc_spimss_regs_t
Cmxc_spimss_req_t	Structure definition for an SPI Master Transaction request
Cmxc_tmr_cfg_t	Timer Configuration
Cmxc_tmr_regs_t
Cmxc_uart_regs_t
Cmxc_uart_req_t	The information required to perform a complete UART transaction
Cmxc_wdt_regs_t