dma.h

 
/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_DMA_H_
#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_DMA_H_
 
/* **** Includes **** */
#include <stdbool.h>
#include "mxc_device.h"
#include "mxc_errors.h"
#include "dma_regs.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* **** Definitions **** */
 
typedef enum {
    MXC_DMA_PRIO_HIGH = MXC_V_DMA_CFG_PRI_HIGH, 
    MXC_DMA_PRIO_MEDHIGH = MXC_V_DMA_CFG_PRI_MEDHIGH, 
    MXC_DMA_PRIO_MEDLOW = MXC_V_DMA_CFG_PRI_MEDLOW, 
    MXC_DMA_PRIO_LOW = MXC_V_DMA_CFG_PRI_LOW, 
} mxc_dma_priority_t;
 
typedef enum {
    MXC_DMA_REQUEST_MEMTOMEM =
        MXC_S_DMA_CFG_REQSEL_MEMTOMEM, 
    MXC_DMA_REQUEST_SPI0RX = MXC_S_DMA_CFG_REQSEL_SPI0RX, 
    MXC_DMA_REQUEST_SPIMSSRX =
        MXC_S_DMA_CFG_REQSEL_SPI1RX, 
    MXC_DMA_REQUEST_UART0RX = MXC_S_DMA_CFG_REQSEL_UART0RX, 
    MXC_DMA_REQUEST_UART1RX = MXC_S_DMA_CFG_REQSEL_UART1RX, 
    MXC_DMA_REQUEST_I2C0RX = MXC_S_DMA_CFG_REQSEL_I2C0RX, 
    MXC_DMA_REQUEST_I2C1RX = MXC_S_DMA_CFG_REQSEL_I2C1RX, 
    MXC_DMA_REQUEST_SPI0TX = MXC_S_DMA_CFG_REQSEL_SPI0TX, 
    MXC_DMA_REQUEST_SPIMSSTX =
        MXC_S_DMA_CFG_REQSEL_SPI1TX, 
    MXC_DMA_REQUEST_UART0TX =
        MXC_S_DMA_CFG_REQSEL_UART0TX, 
    MXC_DMA_REQUEST_UART1TX =
        MXC_S_DMA_CFG_REQSEL_UART1TX, 
    MXC_DMA_REQUEST_I2C0TX = MXC_S_DMA_CFG_REQSEL_I2C0TX, 
    MXC_DMA_REQUEST_I2C1TX = MXC_S_DMA_CFG_REQSEL_I2C1TX, 
 
    // Deprecated names
    MXC_DMA_REQUEST_SPI1RX = MXC_S_DMA_CFG_REQSEL_SPI1RX, 
    MXC_DMA_REQUEST_SPI1TX = MXC_S_DMA_CFG_REQSEL_SPI1TX, 
} mxc_dma_reqsel_t;
 
typedef enum {
    MXC_DMA_PRESCALE_DISABLE = MXC_S_DMA_CFG_PSSEL_DIS, 
    MXC_DMA_PRESCALE_DIV256 = MXC_S_DMA_CFG_PSSEL_DIV256, 
    MXC_DMA_PRESCALE_DIV64K = MXC_S_DMA_CFG_PSSEL_DIV64K, 
    MXC_DMA_PRESCALE_DIV16M = MXC_S_DMA_CFG_PSSEL_DIV16M, 
} mxc_dma_prescale_t;
 
typedef enum {
    MXC_DMA_TIMEOUT_4_CLK = MXC_S_DMA_CFG_TOSEL_TO4, 
    MXC_DMA_TIMEOUT_8_CLK = MXC_S_DMA_CFG_TOSEL_TO8, 
    MXC_DMA_TIMEOUT_16_CLK = MXC_S_DMA_CFG_TOSEL_TO16, 
    MXC_DMA_TIMEOUT_32_CLK = MXC_S_DMA_CFG_TOSEL_TO32, 
    MXC_DMA_TIMEOUT_64_CLK = MXC_S_DMA_CFG_TOSEL_TO64, 
    MXC_DMA_TIMEOUT_128_CLK = MXC_S_DMA_CFG_TOSEL_TO128, 
    MXC_DMA_TIMEOUT_256_CLK = MXC_S_DMA_CFG_TOSEL_TO256, 
    MXC_DMA_TIMEOUT_512_CLK = MXC_S_DMA_CFG_TOSEL_TO512, 
} mxc_dma_timeout_t;
 
typedef enum {
    /* Using the '_V_' define instead of the '_S_' since these same values will be used to
       specify the DSTWD also.  The API functions will shift the value the correct amount
       prior to writing the cfg register. */
    MXC_DMA_WIDTH_BYTE = MXC_V_DMA_CFG_SRCWD_BYTE, 
    MXC_DMA_WIDTH_HALFWORD = MXC_V_DMA_CFG_SRCWD_HALFWORD, 
    MXC_DMA_WIDTH_WORD = MXC_V_DMA_CFG_SRCWD_WORD, 
} mxc_dma_width_t;
 
typedef struct {
    int ch; 
    mxc_dma_reqsel_t reqsel; 
    mxc_dma_width_t srcwd; 
    mxc_dma_width_t dstwd; 
    int srcinc_en; 
    int dstinc_en; 
} mxc_dma_config_t;
 
typedef struct {
    int ch; 
    void *source; 
    void *dest; 
    int len; 
} mxc_dma_srcdst_t;
 
typedef struct {
    int ch; 
    mxc_dma_priority_t prio; 
    unsigned int reqwait_en; 
    mxc_dma_timeout_t tosel; 
    mxc_dma_prescale_t pssel; 
    unsigned int burst_size; 
} mxc_dma_adv_config_t;
 
typedef void (*mxc_dma_complete_cb_t)(void *dest);
 
typedef mxc_dma_srcdst_t (*mxc_dma_trans_chain_t)(mxc_dma_srcdst_t dest);
 
/* **** Function Prototypes **** */
/*************************/
/* Low Level Functions   */
/*************************/
int MXC_DMA_Init(void);
 
void MXC_DMA_DeInit(void);
 
int MXC_DMA_AcquireChannel(void);
 
int MXC_DMA_ReleaseChannel(int ch);
 
int MXC_DMA_ConfigChannel(mxc_dma_config_t config, mxc_dma_srcdst_t srcdst);
 
int MXC_DMA_AdvConfigChannel(mxc_dma_adv_config_t advConfig);
 
int MXC_DMA_SetSrcDst(mxc_dma_srcdst_t srcdst);
 
int MXC_DMA_GetSrcDst(mxc_dma_srcdst_t *srcdst);
 
int MXC_DMA_SetSrcReload(mxc_dma_srcdst_t srcdstReload);
 
int MXC_DMA_GetSrcReload(mxc_dma_srcdst_t *srcdstReload);
 
int MXC_DMA_SetCallback(int ch, void (*callback)(int, int));
 
int MXC_DMA_SetChannelInterruptEn(int ch, bool chdis, bool ctz);
 
int MXC_DMA_ChannelEnableInt(int ch, int flags);
 
int MXC_DMA_ChannelDisableInt(int ch, int flags);
 
int MXC_DMA_ChannelGetFlags(int ch);
 
int MXC_DMA_ChannelClearFlags(int ch, int flags);
 
int MXC_DMA_EnableInt(int ch);
 
int MXC_DMA_DisableInt(int ch);
 
int MXC_DMA_Start(int ch);
 
int MXC_DMA_Stop(int ch);
 
mxc_dma_ch_regs_t *MXC_DMA_GetCHRegs(int ch);
 
void MXC_DMA_Handler(void);
 
/*************************/
/* High Level Functions  */
/*************************/
 
int MXC_DMA_MemCpy(void *dest, void *src, int len, mxc_dma_complete_cb_t callback);
 
int MXC_DMA_DoTransfer(mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst,
                       mxc_dma_trans_chain_t callback);
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_DMA_H_