27#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_LP_H_
28#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_LP_H_
#define MXC_S_PWRSEQ_LP_CTRL_OVR_0_9V
Definition: pwrseq_regs.h:118
#define MXC_S_PWRSEQ_LP_CTRL_OVR_1_1V
Definition: pwrseq_regs.h:122
#define MXC_S_PWRSEQ_LP_CTRL_OVR_1_0V
Definition: pwrseq_regs.h:120
Structure type for configuring a GPIO port.
Definition: gpio.h:144
void MXC_LP_DisableFastWk(void)
Disables Fast wake up from deepsleep.
void MXC_LP_DisableSysRAM2LightSleep(void)
Places addresses 0x20008000 to 0x2000FFFF of the RAM in active mode.
void MXC_LP_DisableSysRAM3LightSleep(void)
Places addresses 0x20010000 to 0x20017FFF of the RAM in active mode.
void MXC_LP_EnableSysRAM3LightSleep(void)
Places addresses 0x20010000 to 0x20017FFF of the RAM in light sleep mode. Data will be unavailable fo...
void MXC_LP_EnableSRamRet2(void)
Enables Data Retention to RAM addresses 0x20008000-0x2000FFFF.
void MXC_LP_EnableRamRetReg(void)
RAM Retention Regulator Enable for BACKUP Mode.
void MXC_LP_DisableBandGap(void)
Turns off band gap during deepsleep and backup mode.
void MXC_LP_DisableLDO(void)
Disables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode.
void MXC_LP_DisableVCorePORSignal(void)
Disables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode.
void MXC_LP_DisableSRamRet3(void)
Disables Data Retention to RAM addresses 0x20010000-0x20017FFF.
void MXC_LP_EnableRTCAlarmWakeup(void)
Enables the RTC alarm to wake up the device from any low power mode.
void MXC_LP_EnableBlockDetect(void)
Enables Bypassing the hardware detection of an external supply on V CORE enables a faster wakeup time...
void MXC_LP_EnableFastWk(void)
Enables Fast wake up from deepsleep.
mxc_lp_ovr_t
System reset0 enumeration. Used in SYS_PeriphReset0 function.
Definition: lp.h:45
void MXC_LP_DisableGPIOWakeup(const mxc_gpio_cfg_t *wu_pins)
Disables the selected GPIO port and its selected pins as a wake up source. Call this function multipl...
void MXC_LP_EnableSysRAM1LightSleep(void)
Places addresses 0x20004000 to 0x20007FFF of the RAM in light sleep mode. Data will be unavailable fo...
void MXC_LP_DisableRamRetReg(void)
RAM Retention Regulator Disabels for BACKUP Mode.
void MXC_LP_DisableSRAM1(void)
Disables power to RAM addresses 0x20004000-0x20007FFF. The contents of the RAM are destroyed.
void MXC_LP_DisableICacheLightSleep(void)
Places the instruction cache in active mode.
void MXC_LP_EnableSRAM3(void)
Enables power to RAM addresses 0x20010000-0x20017FFF.
void MXC_LP_EnableVCorePORSignal(void)
Enables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode.
void MXC_LP_EnableVDDIOPorMonitor(void)
Enables VDDIO Power-On-Reset Monitor.
void MXC_LP_EnableSRAM2(void)
Enables power to RAM addresses 0x20008000-0x2000FFFF.
void MXC_LP_EnableICacheLightSleep(void)
Places the instruction cache in light sleep mode. Data will be unavailable for read/write operations ...
void MXC_LP_EnterBackupMode(void)
Places the device into BACKUP mode. CPU state is not maintained in this mode, so this function never ...
void MXC_LP_EnableSRAM1(void)
Enables power to RAM addresses 0x20004000-0x20007FFF.
void MXC_LP_DisableSRAM0(void)
Disables power to RAM addresses 0x20000000-0x20003FFF. The contents of the RAM are destroyed.
void MXC_LP_ClearWakeStatus(void)
Clears the low power wakeup flags.
void MXC_LP_EnableLDO(void)
Enables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode.
void MXC_LP_EnableSRamRet3(void)
Enables Data Retention to RAM addresses 0x20010000-0x20017FFF.
void MXC_LP_DisableSRamRet1(void)
Disables Data Retention to RAM addresses 0x20004000-0x20007FFF.
void MXC_LP_EnableSRAM0(void)
Enables power to RAM addresses 0x20000000-0x20003FFF.
void MXC_LP_EnterDeepSleepMode(void)
Places the device into DEEPSLEEP mode. This function returns once an RTC or external interrupt occur.
void MXC_LP_DisableSRAM2(void)
Disables power to RAM addresses 0x20008000-0x2000FFFF. The contents of the RAM are destroyed.
int MXC_LP_SetOperatingVoltage(mxc_lp_ovr_t ovr)
Set operating voltage and change the clock to match the new voltage.
void MXC_LP_DisableSRAM3(void)
Disables power to RAM addresses 0x20010000-0x20017FFF. The contents of the RAM are destroyed.
void MXC_LP_DisableSRamRet2(void)
Disables Data Retention to RAM addresses 0x20008000-0x2000FFFF.
void MXC_LP_DisableSysRAM1LightSleep(void)
Places addresses 0x20004000 to 0x20007FFF of the RAM in active mode.
void MXC_LP_DisableSRamRet0(void)
Disables Data Retention to RAM addresses 0x20000000-0x20003FFF.
void MXC_LP_DisableRTCAlarmWakeup(void)
Disables the RTC alarm from waking up the device.
void MXC_LP_EnterShutDownMode(void)
Places the device into Shutdown mode. CPU state is not maintained in this mode, so this function neve...
void MXC_LP_DisableBlockDetect(void)
Disables Bypassing the hardware detection of an external supply on V CORE enables a faster wakeup tim...
void MXC_LP_DisableVDDIOPorMonitor(void)
Disables VDDIO Power-On-Reset Monitor.
void MXC_LP_EnableSysRAM2LightSleep(void)
Places addresses 0x20008000 to 0x2000FFFF of the RAM in light sleep mode. Data will be unavailable fo...
void MXC_LP_EnableBandGap(void)
Turns on band gap during deepsleep and backup mode.
void MXC_LP_EnableSRamRet0(void)
Enables Data Retention to RAM addresses 0x20000000-0x20003FFF.
void MXC_LP_EnterSleepMode(void)
Places the device into SLEEP mode. This function returns once any interrupt occurs.
void MXC_LP_DisableSysRAM0LightSleep(void)
Places addresses 0x20000000 to 0x20003FFF of the RAM in active mode.
void MXC_LP_EnableVCoreSVM(void)
Enables V CORE Supply Voltage Monitor.
void MXC_LP_EnableGPIOWakeup(const mxc_gpio_cfg_t *wu_pins)
Enables the selected GPIO port and its selected pins to wake up the device from any low power mode....
void MXC_LP_DisableVCoreSVM(void)
Disables V CORE Supply Voltage Monitor.
void MXC_LP_EnableSysRAM0LightSleep(void)
Places addresses 0x20000000 to 0x20003FFF of the RAM in light sleep mode. Data will be unavailable fo...
void MXC_LP_EnableSRamRet1(void)
Enables Data Retention to RAM addresses 0x20004000-0x20007FFF.
@ MXC_LP_OVR_1_1
Definition: lp.h:48
@ MXC_LP_OVR_1_0
Definition: lp.h:47
@ MXC_LP_OVR_0_9
Definition: lp.h:46
Registers, Bit Masks and Bit Positions for the PWRSEQ Peripheral Module.