MAX32660 Peripheral Driver API
Peripheral Driver API for the MAX32660
mxc_pins.h
1
6/******************************************************************************
7 *
8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9 * Analog Devices, Inc.),
10 * Copyright (C) 2023-2024 Analog Devices, Inc.
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *
24 ******************************************************************************/
25
26#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_MXC_PINS_H_
27#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_MXC_PINS_H_
28
29#include "gpio.h"
30
31/***** Global Variables *****/
32
33typedef enum { MAP_A, MAP_B, MAP_C } sys_map_t;
34
35// Predefined GPIO Configurations
36extern const mxc_gpio_cfg_t gpio_cfg_swda;
37extern const mxc_gpio_cfg_t gpio_cfg_swdb;
38
39extern const mxc_gpio_cfg_t gpio_cfg_i2c0;
40extern const mxc_gpio_cfg_t gpio_cfg_i2c1;
41
42extern const mxc_gpio_cfg_t gpio_cfg_uart0;
43extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow;
44extern const mxc_gpio_cfg_t gpio_cfg_uart1a;
45extern const mxc_gpio_cfg_t gpio_cfg_uart1b;
46extern const mxc_gpio_cfg_t gpio_cfg_uart1c;
47extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow;
48
49extern const mxc_gpio_cfg_t gpio_cfg_spi0;
50extern const mxc_gpio_cfg_t gpio_cfg_spi1a;
51extern const mxc_gpio_cfg_t gpio_cfg_spi1b;
52
53// Timers are only defined once, depending on package, each timer could be mapped to other pins
54extern const mxc_gpio_cfg_t gpio_cfg_tmr0;
55extern const mxc_gpio_cfg_t gpio_cfg_32kcal;
56
57extern const mxc_gpio_cfg_t gpio_cfg_i2s0a;
58extern const mxc_gpio_cfg_t gpio_cfg_i2s0b;
59
60// SPI v2 Pin Definitions
61extern const mxc_gpio_cfg_t gpio_cfg_spi0_standard;
62extern const mxc_gpio_cfg_t gpio_cfg_spi0_3wire;
63// MXC_SPI0 does not support Dual or Quad mode.
64extern const mxc_gpio_cfg_t gpio_cfg_spi1a_standard;
65extern const mxc_gpio_cfg_t gpio_cfg_spi1a_3wire;
66extern const mxc_gpio_cfg_t gpio_cfg_spi1b_standard;
67extern const mxc_gpio_cfg_t gpio_cfg_spi1b_3wire;
68// MXC_SPI1 does not support Dual or Quad mode.
69
70// SPI v2 Target Selects Pin Definitions
71extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts0;
72extern const mxc_gpio_cfg_t gpio_cfg_spi1a_ts0;
73extern const mxc_gpio_cfg_t gpio_cfg_spi1b_ts0;
74
75#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_MXC_PINS_H_
mxc_gpio_cfg_t
Structure type for configuring a GPIO port.
Definition: gpio.h:144