sir_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SIR_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SIR_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __I  uint32_t sistat;               
    __I  uint32_t erraddr;              
    __R  uint32_t rsv_0x8_0x53[19];
    __IO uint32_t btle_ldo_trim_tx;     
    __R  uint32_t rsv_0x58;
    __IO uint32_t btle_ldo_trim_rx;     
    __R  uint32_t rsv_0x60_0xff[40];
    __I  uint32_t fstat;                
    __I  uint32_t sfstat;               
} mxc_sir_regs_t;
 
/* Register offsets for module SIR */
#define MXC_R_SIR_SISTAT                   ((uint32_t)0x00000000UL) 
#define MXC_R_SIR_ERRADDR                  ((uint32_t)0x00000004UL) 
#define MXC_R_SIR_BTLE_LDO_TRIM_TX         ((uint32_t)0x00000054UL) 
#define MXC_R_SIR_BTLE_LDO_TRIM_RX         ((uint32_t)0x0000005CUL) 
#define MXC_R_SIR_FSTAT                    ((uint32_t)0x00000100UL) 
#define MXC_R_SIR_SFSTAT                   ((uint32_t)0x00000104UL) 
#define MXC_F_SIR_SISTAT_MAGIC_POS                     0 
#define MXC_F_SIR_SISTAT_MAGIC                         ((uint32_t)(0x1UL << MXC_F_SIR_SISTAT_MAGIC_POS)) 
#define MXC_F_SIR_SISTAT_CRCERR_POS                    1 
#define MXC_F_SIR_SISTAT_CRCERR                        ((uint32_t)(0x1UL << MXC_F_SIR_SISTAT_CRCERR_POS)) 
#define MXC_F_SIR_ERRADDR_ERRADDR_POS                  0 
#define MXC_F_SIR_ERRADDR_ERRADDR                      ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_ERRADDR_ERRADDR_POS)) 
#define MXC_F_SIR_BTLE_LDO_TRIM_TX_TX_POS              0 
#define MXC_F_SIR_BTLE_LDO_TRIM_TX_TX                  ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_TX_TX_POS)) 
#define MXC_F_SIR_BTLE_LDO_TRIM_RX_RX_POS              0 
#define MXC_F_SIR_BTLE_LDO_TRIM_RX_RX                  ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_RX_RX_POS)) 
#define MXC_F_SIR_FSTAT_FPU_POS                        0 
#define MXC_F_SIR_FSTAT_FPU                            ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_FPU_POS)) 
#define MXC_F_SIR_FSTAT_USB_POS                        1 
#define MXC_F_SIR_FSTAT_USB                            ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_USB_POS)) 
#define MXC_F_SIR_FSTAT_ADC_POS                        2 
#define MXC_F_SIR_FSTAT_ADC                            ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_ADC_POS)) 
#define MXC_F_SIR_FSTAT_XIP_POS                        3 
#define MXC_F_SIR_FSTAT_XIP                            ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_XIP_POS)) 
#define MXC_F_SIR_FSTAT_PBM_POS                        4 
#define MXC_F_SIR_FSTAT_PBM                            ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_PBM_POS)) 
#define MXC_F_SIR_FSTAT_HBC_POS                        5 
#define MXC_F_SIR_FSTAT_HBC                            ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_HBC_POS)) 
#define MXC_F_SIR_FSTAT_SDHC_POS                       6 
#define MXC_F_SIR_FSTAT_SDHC                           ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_SDHC_POS)) 
#define MXC_F_SIR_FSTAT_SMPHR_POS                      7 
#define MXC_F_SIR_FSTAT_SMPHR                          ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_SMPHR_POS)) 
#define MXC_F_SIR_FSTAT_SCACHE_POS                     8 
#define MXC_F_SIR_FSTAT_SCACHE                         ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_SCACHE_POS)) 
#define MXC_F_SIR_SFSTAT_TRNG_POS                      2 
#define MXC_F_SIR_SFSTAT_TRNG                          ((uint32_t)(0x1UL << MXC_F_SIR_SFSTAT_TRNG_POS)) 
#define MXC_F_SIR_SFSTAT_AES_POS                       3 
#define MXC_F_SIR_SFSTAT_AES                           ((uint32_t)(0x1UL << MXC_F_SIR_SFSTAT_AES_POS)) 
#define MXC_F_SIR_SFSTAT_SHA_POS                       4 
#define MXC_F_SIR_SFSTAT_SHA                           ((uint32_t)(0x1UL << MXC_F_SIR_SFSTAT_SHA_POS)) 
#define MXC_F_SIR_SFSTAT_MAA_POS                       5 
#define MXC_F_SIR_SFSTAT_MAA                           ((uint32_t)(0x1UL << MXC_F_SIR_SFSTAT_MAA_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SIR_REGS_H_