smon_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SMON_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SMON_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __IO uint32_t extscn;               
    __IO uint32_t intscn;               
    __IO uint32_t secalm;               
    __I  uint32_t secdiag;              
    __I  uint32_t dlrtc;                
    __R  uint32_t rsv_0x14_0x23[4];
    __IO uint32_t meucfg;               
    __R  uint32_t rsv_0x28_0x33[3];
    __I  uint32_t secst;                
    __IO uint32_t sdbe;                 
} mxc_smon_regs_t;
 
/* Register offsets for module SMON */
#define MXC_R_SMON_EXTSCN                  ((uint32_t)0x00000000UL) 
#define MXC_R_SMON_INTSCN                  ((uint32_t)0x00000004UL) 
#define MXC_R_SMON_SECALM                  ((uint32_t)0x00000008UL) 
#define MXC_R_SMON_SECDIAG                 ((uint32_t)0x0000000CUL) 
#define MXC_R_SMON_DLRTC                   ((uint32_t)0x00000010UL) 
#define MXC_R_SMON_MEUCFG                  ((uint32_t)0x00000024UL) 
#define MXC_R_SMON_SECST                   ((uint32_t)0x00000034UL) 
#define MXC_R_SMON_SDBE                    ((uint32_t)0x00000038UL) 
#define MXC_F_SMON_EXTSCN_EXTS_EN0_POS                 0 
#define MXC_F_SMON_EXTSCN_EXTS_EN0                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN0_POS)) 
#define MXC_F_SMON_EXTSCN_EXTS_EN1_POS                 1 
#define MXC_F_SMON_EXTSCN_EXTS_EN1                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN1_POS)) 
#define MXC_F_SMON_EXTSCN_EXTS_EN2_POS                 2 
#define MXC_F_SMON_EXTSCN_EXTS_EN2                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN2_POS)) 
#define MXC_F_SMON_EXTSCN_EXTS_EN3_POS                 3 
#define MXC_F_SMON_EXTSCN_EXTS_EN3                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN3_POS)) 
#define MXC_F_SMON_EXTSCN_EXTS_EN4_POS                 4 
#define MXC_F_SMON_EXTSCN_EXTS_EN4                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN4_POS)) 
#define MXC_F_SMON_EXTSCN_EXTS_EN5_POS                 5 
#define MXC_F_SMON_EXTSCN_EXTS_EN5                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN5_POS)) 
#define MXC_F_SMON_EXTSCN_EXTCNT_POS                   16 
#define MXC_F_SMON_EXTSCN_EXTCNT                       ((uint32_t)(0x1FUL << MXC_F_SMON_EXTSCN_EXTCNT_POS)) 
#define MXC_F_SMON_EXTSCN_EXTFRQ_POS                   21 
#define MXC_F_SMON_EXTSCN_EXTFRQ                       ((uint32_t)(0x7UL << MXC_F_SMON_EXTSCN_EXTFRQ_POS)) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ2000HZ            ((uint32_t)0x0UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ2000HZ            (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ2000HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ1000HZ            ((uint32_t)0x1UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ1000HZ            (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ1000HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ500HZ             ((uint32_t)0x2UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ500HZ             (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ500HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ250HZ             ((uint32_t)0x3UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ250HZ             (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ250HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ125HZ             ((uint32_t)0x4UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ125HZ             (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ125HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ63HZ              ((uint32_t)0x5UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ63HZ              (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ63HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ31HZ              ((uint32_t)0x6UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ31HZ              (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ31HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_V_SMON_EXTSCN_EXTFRQ_RFU                   ((uint32_t)0x7UL) 
#define MXC_S_SMON_EXTSCN_EXTFRQ_RFU                   (MXC_V_SMON_EXTSCN_EXTFRQ_RFU << MXC_F_SMON_EXTSCN_EXTFRQ_POS) 
#define MXC_F_SMON_EXTSCN_DIVCLK_POS                   24 
#define MXC_F_SMON_EXTSCN_DIVCLK                       ((uint32_t)(0x7UL << MXC_F_SMON_EXTSCN_DIVCLK_POS)) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV1                  ((uint32_t)0x0UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV1                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV1 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV2                  ((uint32_t)0x1UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV2                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV2 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV4                  ((uint32_t)0x2UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV4                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV4 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV8                  ((uint32_t)0x3UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV8                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV8 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV16                 ((uint32_t)0x4UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV16                 (MXC_V_SMON_EXTSCN_DIVCLK_DIV16 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV32                 ((uint32_t)0x5UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV32                 (MXC_V_SMON_EXTSCN_DIVCLK_DIV32 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_V_SMON_EXTSCN_DIVCLK_DIV64                 ((uint32_t)0x6UL) 
#define MXC_S_SMON_EXTSCN_DIVCLK_DIV64                 (MXC_V_SMON_EXTSCN_DIVCLK_DIV64 << MXC_F_SMON_EXTSCN_DIVCLK_POS) 
#define MXC_F_SMON_EXTSCN_BUSY_POS                     30 
#define MXC_F_SMON_EXTSCN_BUSY                         ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_BUSY_POS)) 
#define MXC_F_SMON_EXTSCN_LOCK_POS                     31 
#define MXC_F_SMON_EXTSCN_LOCK                         ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_LOCK_POS)) 
#define MXC_F_SMON_INTSCN_SHIELD_EN_POS                0 
#define MXC_F_SMON_INTSCN_SHIELD_EN                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_SHIELD_EN_POS)) 
#define MXC_F_SMON_INTSCN_TEMP_EN_POS                  1 
#define MXC_F_SMON_INTSCN_TEMP_EN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_TEMP_EN_POS)) 
#define MXC_F_SMON_INTSCN_VBAT_EN_POS                  2 
#define MXC_F_SMON_INTSCN_VBAT_EN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VBAT_EN_POS)) 
#define MXC_F_SMON_INTSCN_DFD_EN_POS                   3 
#define MXC_F_SMON_INTSCN_DFD_EN                       ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_DFD_EN_POS)) 
#define MXC_F_SMON_INTSCN_DFD_NMI_POS                  4 
#define MXC_F_SMON_INTSCN_DFD_NMI                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_DFD_NMI_POS)) 
#define MXC_F_SMON_INTSCN_DFD_STDBY_POS                8 
#define MXC_F_SMON_INTSCN_DFD_STDBY                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_DFD_STDBY_POS)) 
#define MXC_F_SMON_INTSCN_PUF_TRIM_ERASE_POS           10 
#define MXC_F_SMON_INTSCN_PUF_TRIM_ERASE               ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_PUF_TRIM_ERASE_POS)) 
#define MXC_F_SMON_INTSCN_LOTEMP_SEL_POS               16 
#define MXC_F_SMON_INTSCN_LOTEMP_SEL                   ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_LOTEMP_SEL_POS)) 
#define MXC_F_SMON_INTSCN_VCORELOEN_POS                18 
#define MXC_F_SMON_INTSCN_VCORELOEN                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VCORELOEN_POS)) 
#define MXC_F_SMON_INTSCN_VCOREHIEN_POS                19 
#define MXC_F_SMON_INTSCN_VCOREHIEN                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VCOREHIEN_POS)) 
#define MXC_F_SMON_INTSCN_VDDLOEN_POS                  20 
#define MXC_F_SMON_INTSCN_VDDLOEN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VDDLOEN_POS)) 
#define MXC_F_SMON_INTSCN_VDDHIEN_POS                  21 
#define MXC_F_SMON_INTSCN_VDDHIEN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VDDHIEN_POS)) 
#define MXC_F_SMON_INTSCN_VGLEN_POS                    22 
#define MXC_F_SMON_INTSCN_VGLEN                        ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VGLEN_POS)) 
#define MXC_F_SMON_INTSCN_LOCK_POS                     31 
#define MXC_F_SMON_INTSCN_LOCK                         ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_LOCK_POS)) 
#define MXC_F_SMON_SECALM_DRS_POS                      0 
#define MXC_F_SMON_SECALM_DRS                          ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_DRS_POS)) 
#define MXC_F_SMON_SECALM_KEYWIPE_POS                  1 
#define MXC_F_SMON_SECALM_KEYWIPE                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_KEYWIPE_POS)) 
#define MXC_F_SMON_SECALM_SHIELDF_POS                  2 
#define MXC_F_SMON_SECALM_SHIELDF                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_SHIELDF_POS)) 
#define MXC_F_SMON_SECALM_LOTEMP_POS                   3 
#define MXC_F_SMON_SECALM_LOTEMP                       ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_LOTEMP_POS)) 
#define MXC_F_SMON_SECALM_HITEMP_POS                   4 
#define MXC_F_SMON_SECALM_HITEMP                       ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_HITEMP_POS)) 
#define MXC_F_SMON_SECALM_BATLO_POS                    5 
#define MXC_F_SMON_SECALM_BATLO                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_BATLO_POS)) 
#define MXC_F_SMON_SECALM_BATHI_POS                    6 
#define MXC_F_SMON_SECALM_BATHI                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_BATHI_POS)) 
#define MXC_F_SMON_SECALM_EXTF_POS                     7 
#define MXC_F_SMON_SECALM_EXTF                         ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTF_POS)) 
#define MXC_F_SMON_SECALM_VDDLO_POS                    8 
#define MXC_F_SMON_SECALM_VDDLO                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VDDLO_POS)) 
#define MXC_F_SMON_SECALM_VCORELO_POS                  9 
#define MXC_F_SMON_SECALM_VCORELO                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VCORELO_POS)) 
#define MXC_F_SMON_SECALM_VCOREHI_POS                  10 
#define MXC_F_SMON_SECALM_VCOREHI                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VCOREHI_POS)) 
#define MXC_F_SMON_SECALM_VDDHI_POS                    11 
#define MXC_F_SMON_SECALM_VDDHI                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VDDHI_POS)) 
#define MXC_F_SMON_SECALM_VGL_POS                      12 
#define MXC_F_SMON_SECALM_VGL                          ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VGL_POS)) 
#define MXC_F_SMON_SECALM_EXTSTAT0_POS                 16 
#define MXC_F_SMON_SECALM_EXTSTAT0                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT0_POS)) 
#define MXC_F_SMON_SECALM_EXTSTAT1_POS                 17 
#define MXC_F_SMON_SECALM_EXTSTAT1                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT1_POS)) 
#define MXC_F_SMON_SECALM_EXTSTAT2_POS                 18 
#define MXC_F_SMON_SECALM_EXTSTAT2                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT2_POS)) 
#define MXC_F_SMON_SECALM_EXTSTAT3_POS                 19 
#define MXC_F_SMON_SECALM_EXTSTAT3                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT3_POS)) 
#define MXC_F_SMON_SECALM_EXTSTAT4_POS                 20 
#define MXC_F_SMON_SECALM_EXTSTAT4                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT4_POS)) 
#define MXC_F_SMON_SECALM_EXTSTAT5_POS                 21 
#define MXC_F_SMON_SECALM_EXTSTAT5                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT5_POS)) 
#define MXC_F_SMON_SECALM_EXTSWARN0_POS                24 
#define MXC_F_SMON_SECALM_EXTSWARN0                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN0_POS)) 
#define MXC_F_SMON_SECALM_EXTSWARN1_POS                25 
#define MXC_F_SMON_SECALM_EXTSWARN1                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN1_POS)) 
#define MXC_F_SMON_SECALM_EXTSWARN2_POS                26 
#define MXC_F_SMON_SECALM_EXTSWARN2                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN2_POS)) 
#define MXC_F_SMON_SECALM_EXTSWARN3_POS                27 
#define MXC_F_SMON_SECALM_EXTSWARN3                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN3_POS)) 
#define MXC_F_SMON_SECALM_EXTSWARN4_POS                28 
#define MXC_F_SMON_SECALM_EXTSWARN4                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN4_POS)) 
#define MXC_F_SMON_SECALM_EXTSWARN5_POS                29 
#define MXC_F_SMON_SECALM_EXTSWARN5                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN5_POS)) 
#define MXC_F_SMON_SECDIAG_BORF_POS                    0 
#define MXC_F_SMON_SECDIAG_BORF                        ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BORF_POS)) 
#define MXC_F_SMON_SECDIAG_SHIELDF_POS                 2 
#define MXC_F_SMON_SECDIAG_SHIELDF                     ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_SHIELDF_POS)) 
#define MXC_F_SMON_SECDIAG_LOTEMP_POS                  3 
#define MXC_F_SMON_SECDIAG_LOTEMP                      ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_LOTEMP_POS)) 
#define MXC_F_SMON_SECDIAG_HITEMP_POS                  4 
#define MXC_F_SMON_SECDIAG_HITEMP                      ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_HITEMP_POS)) 
#define MXC_F_SMON_SECDIAG_BATLO_POS                   5 
#define MXC_F_SMON_SECDIAG_BATLO                       ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BATLO_POS)) 
#define MXC_F_SMON_SECDIAG_BATHI_POS                   6 
#define MXC_F_SMON_SECDIAG_BATHI                       ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BATHI_POS)) 
#define MXC_F_SMON_SECDIAG_DYNF_POS                    7 
#define MXC_F_SMON_SECDIAG_DYNF                        ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_DYNF_POS)) 
#define MXC_F_SMON_SECDIAG_AESKT_POS                   8 
#define MXC_F_SMON_SECDIAG_AESKT                       ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_AESKT_POS)) 
#define MXC_F_SMON_SECDIAG_EXTSTAT0_POS                16 
#define MXC_F_SMON_SECDIAG_EXTSTAT0                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT0_POS)) 
#define MXC_F_SMON_SECDIAG_EXTSTAT1_POS                17 
#define MXC_F_SMON_SECDIAG_EXTSTAT1                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT1_POS)) 
#define MXC_F_SMON_SECDIAG_EXTSTAT2_POS                18 
#define MXC_F_SMON_SECDIAG_EXTSTAT2                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT2_POS)) 
#define MXC_F_SMON_SECDIAG_EXTSTAT3_POS                19 
#define MXC_F_SMON_SECDIAG_EXTSTAT3                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT3_POS)) 
#define MXC_F_SMON_SECDIAG_EXTSTAT4_POS                20 
#define MXC_F_SMON_SECDIAG_EXTSTAT4                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT4_POS)) 
#define MXC_F_SMON_SECDIAG_EXTSTAT5_POS                21 
#define MXC_F_SMON_SECDIAG_EXTSTAT5                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT5_POS)) 
#define MXC_F_SMON_DLRTC_DLRTC_POS                     0 
#define MXC_F_SMON_DLRTC_DLRTC                         ((uint32_t)(0xFFFFFFFFUL << MXC_F_SMON_DLRTC_DLRTC_POS)) 
#define MXC_F_SMON_MEUCFG_MEUCFG_POS                   0 
#define MXC_F_SMON_MEUCFG_MEUCFG                       ((uint32_t)(0x7FUL << MXC_F_SMON_MEUCFG_MEUCFG_POS)) 
#define MXC_F_SMON_SECST_EXTSRS_POS                    0 
#define MXC_F_SMON_SECST_EXTSRS                        ((uint32_t)(0x1UL << MXC_F_SMON_SECST_EXTSRS_POS)) 
#define MXC_F_SMON_SECST_INTSRS_POS                    1 
#define MXC_F_SMON_SECST_INTSRS                        ((uint32_t)(0x1UL << MXC_F_SMON_SECST_INTSRS_POS)) 
#define MXC_F_SMON_SECST_SECALRS_POS                   2 
#define MXC_F_SMON_SECST_SECALRS                       ((uint32_t)(0x1UL << MXC_F_SMON_SECST_SECALRS_POS)) 
#define MXC_F_SMON_SDBE_DBYTE_POS                      0 
#define MXC_F_SMON_SDBE_DBYTE                          ((uint32_t)(0xFFUL << MXC_F_SMON_SDBE_DBYTE_POS)) 
#define MXC_F_SMON_SDBE_SBDEN_POS                      31 
#define MXC_F_SMON_SDBE_SBDEN                          ((uint32_t)(0x1UL << MXC_F_SMON_SDBE_SBDEN_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SMON_REGS_H_