MAX32672 Peripheral Driver API
Peripheral Driver API for the MAX32672
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i2s_regs.h
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1
8/******************************************************************************
9 *
10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11 * Analog Devices, Inc.),
12 * Copyright (C) 2023-2024 Analog Devices, Inc.
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************/
27
28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_I2S_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_I2S_REGS_H_
30
31/* **** Includes **** */
32#include <stdint.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#if defined (__ICCARM__)
39 #pragma system_include
40#endif
41
42#if defined (__CC_ARM)
43 #pragma anon_unions
44#endif
46/*
47 If types are not defined elsewhere (CMSIS) define them here
48*/
49#ifndef __IO
50#define __IO volatile
51#endif
52#ifndef __I
53#define __I volatile const
54#endif
55#ifndef __O
56#define __O volatile
57#endif
58#ifndef __R
59#define __R volatile const
60#endif
62
63/* **** Definitions **** */
64
76typedef struct {
77 __IO uint32_t ctrl0ch0;
78 __R uint32_t rsv_0x4_0xf[3];
79 __IO uint32_t ctrl1ch0;
80 __R uint32_t rsv_0x14_0x1f[3];
81 __IO uint32_t filtch0;
82 __R uint32_t rsv_0x24_0x2f[3];
83 __IO uint32_t dmach0;
84 __R uint32_t rsv_0x34_0x3f[3];
85 __IO uint32_t fifoch0;
86 __R uint32_t rsv_0x44_0x4f[3];
87 __IO uint32_t intfl;
88 __IO uint32_t inten;
89 __IO uint32_t extsetup;
90 __IO uint32_t wken;
91 __IO uint32_t wkfl;
92} mxc_i2s_regs_t;
93
94/* Register offsets for module I2S */
101#define MXC_R_I2S_CTRL0CH0 ((uint32_t)0x00000000UL)
102#define MXC_R_I2S_CTRL1CH0 ((uint32_t)0x00000010UL)
103#define MXC_R_I2S_FILTCH0 ((uint32_t)0x00000020UL)
104#define MXC_R_I2S_DMACH0 ((uint32_t)0x00000030UL)
105#define MXC_R_I2S_FIFOCH0 ((uint32_t)0x00000040UL)
106#define MXC_R_I2S_INTFL ((uint32_t)0x00000050UL)
107#define MXC_R_I2S_INTEN ((uint32_t)0x00000054UL)
108#define MXC_R_I2S_EXTSETUP ((uint32_t)0x00000058UL)
109#define MXC_R_I2S_WKEN ((uint32_t)0x0000005CUL)
110#define MXC_R_I2S_WKFL ((uint32_t)0x00000060UL)
119#define MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS 1
120#define MXC_F_I2S_CTRL0CH0_LSB_FIRST ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS))
122#define MXC_F_I2S_CTRL0CH0_PDM_FILT_POS 2
123#define MXC_F_I2S_CTRL0CH0_PDM_FILT ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_FILT_POS))
125#define MXC_F_I2S_CTRL0CH0_PDM_EN_POS 3
126#define MXC_F_I2S_CTRL0CH0_PDM_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_EN_POS))
128#define MXC_F_I2S_CTRL0CH0_USEDDR_POS 4
129#define MXC_F_I2S_CTRL0CH0_USEDDR ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_USEDDR_POS))
131#define MXC_F_I2S_CTRL0CH0_PDM_INV_POS 5
132#define MXC_F_I2S_CTRL0CH0_PDM_INV ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_INV_POS))
134#define MXC_F_I2S_CTRL0CH0_CH_MODE_POS 6
135#define MXC_F_I2S_CTRL0CH0_CH_MODE ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_CH_MODE_POS))
137#define MXC_F_I2S_CTRL0CH0_WS_POL_POS 8
138#define MXC_F_I2S_CTRL0CH0_WS_POL ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_WS_POL_POS))
140#define MXC_F_I2S_CTRL0CH0_MSB_LOC_POS 9
141#define MXC_F_I2S_CTRL0CH0_MSB_LOC ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_MSB_LOC_POS))
143#define MXC_F_I2S_CTRL0CH0_ALIGN_POS 10
144#define MXC_F_I2S_CTRL0CH0_ALIGN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_ALIGN_POS))
146#define MXC_F_I2S_CTRL0CH0_EXT_SEL_POS 11
147#define MXC_F_I2S_CTRL0CH0_EXT_SEL ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_EXT_SEL_POS))
149#define MXC_F_I2S_CTRL0CH0_STEREO_POS 12
150#define MXC_F_I2S_CTRL0CH0_STEREO ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_STEREO_POS))
152#define MXC_F_I2S_CTRL0CH0_WSIZE_POS 14
153#define MXC_F_I2S_CTRL0CH0_WSIZE ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_WSIZE_POS))
155#define MXC_F_I2S_CTRL0CH0_TX_EN_POS 16
156#define MXC_F_I2S_CTRL0CH0_TX_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_TX_EN_POS))
158#define MXC_F_I2S_CTRL0CH0_RX_EN_POS 17
159#define MXC_F_I2S_CTRL0CH0_RX_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RX_EN_POS))
161#define MXC_F_I2S_CTRL0CH0_FLUSH_POS 18
162#define MXC_F_I2S_CTRL0CH0_FLUSH ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FLUSH_POS))
164#define MXC_F_I2S_CTRL0CH0_RST_POS 19
165#define MXC_F_I2S_CTRL0CH0_RST ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RST_POS))
167#define MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS 20
168#define MXC_F_I2S_CTRL0CH0_FIFO_LSB ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS))
170#define MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS 24
171#define MXC_F_I2S_CTRL0CH0_RX_THD_VAL ((uint32_t)(0xFFUL << MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS))
181#define MXC_F_I2S_CTRL1CH0_BITS_WORD_POS 0
182#define MXC_F_I2S_CTRL1CH0_BITS_WORD ((uint32_t)(0x1FUL << MXC_F_I2S_CTRL1CH0_BITS_WORD_POS))
184#define MXC_F_I2S_CTRL1CH0_EN_POS 8
185#define MXC_F_I2S_CTRL1CH0_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL1CH0_EN_POS))
187#define MXC_F_I2S_CTRL1CH0_SMP_SIZE_POS 9
188#define MXC_F_I2S_CTRL1CH0_SMP_SIZE ((uint32_t)(0x1FUL << MXC_F_I2S_CTRL1CH0_SMP_SIZE_POS))
190#define MXC_F_I2S_CTRL1CH0_ADJUST_POS 15
191#define MXC_F_I2S_CTRL1CH0_ADJUST ((uint32_t)(0x1UL << MXC_F_I2S_CTRL1CH0_ADJUST_POS))
193#define MXC_F_I2S_CTRL1CH0_CLKDIV_POS 16
194#define MXC_F_I2S_CTRL1CH0_CLKDIV ((uint32_t)(0xFFFFUL << MXC_F_I2S_CTRL1CH0_CLKDIV_POS))
204#define MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS 0
205#define MXC_F_I2S_DMACH0_DMA_TX_THD_VAL ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS))
207#define MXC_F_I2S_DMACH0_DMA_TX_EN_POS 7
208#define MXC_F_I2S_DMACH0_DMA_TX_EN ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_TX_EN_POS))
210#define MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS 8
211#define MXC_F_I2S_DMACH0_DMA_RX_THD_VAL ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS))
213#define MXC_F_I2S_DMACH0_DMA_RX_EN_POS 15
214#define MXC_F_I2S_DMACH0_DMA_RX_EN ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_RX_EN_POS))
216#define MXC_F_I2S_DMACH0_TX_LVL_POS 16
217#define MXC_F_I2S_DMACH0_TX_LVL ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_TX_LVL_POS))
219#define MXC_F_I2S_DMACH0_RX_LVL_POS 24
220#define MXC_F_I2S_DMACH0_RX_LVL ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_RX_LVL_POS))
230#define MXC_F_I2S_FIFOCH0_DATA_POS 0
231#define MXC_F_I2S_FIFOCH0_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_I2S_FIFOCH0_DATA_POS))
241#define MXC_F_I2S_INTFL_RX_OV_CH0_POS 0
242#define MXC_F_I2S_INTFL_RX_OV_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_RX_OV_CH0_POS))
244#define MXC_F_I2S_INTFL_RX_THD_CH0_POS 1
245#define MXC_F_I2S_INTFL_RX_THD_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_RX_THD_CH0_POS))
247#define MXC_F_I2S_INTFL_TX_OB_CH0_POS 2
248#define MXC_F_I2S_INTFL_TX_OB_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_TX_OB_CH0_POS))
250#define MXC_F_I2S_INTFL_TX_HE_CH0_POS 3
251#define MXC_F_I2S_INTFL_TX_HE_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_TX_HE_CH0_POS))
261#define MXC_F_I2S_INTEN_RX_OV_CH0_POS 0
262#define MXC_F_I2S_INTEN_RX_OV_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_RX_OV_CH0_POS))
264#define MXC_F_I2S_INTEN_RX_THD_CH0_POS 1
265#define MXC_F_I2S_INTEN_RX_THD_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_RX_THD_CH0_POS))
267#define MXC_F_I2S_INTEN_TX_OB_CH0_POS 2
268#define MXC_F_I2S_INTEN_TX_OB_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_TX_OB_CH0_POS))
270#define MXC_F_I2S_INTEN_TX_HE_CH0_POS 3
271#define MXC_F_I2S_INTEN_TX_HE_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_TX_HE_CH0_POS))
281#define MXC_F_I2S_EXTSETUP_EXT_BITS_WORD_POS 0
282#define MXC_F_I2S_EXTSETUP_EXT_BITS_WORD ((uint32_t)(0x1FUL << MXC_F_I2S_EXTSETUP_EXT_BITS_WORD_POS))
286#ifdef __cplusplus
287}
288#endif
289
290#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_I2S_REGS_H_
mxc_i2s_regs_t::ctrl0ch0
__IO uint32_t ctrl0ch0
Definition: i2s_regs.h:77
mxc_i2s_regs_t::fifoch0
__IO uint32_t fifoch0
Definition: i2s_regs.h:85
mxc_i2s_regs_t::filtch0
__IO uint32_t filtch0
Definition: i2s_regs.h:81
mxc_i2s_regs_t::wken
__IO uint32_t wken
Definition: i2s_regs.h:90
mxc_i2s_regs_t::intfl
__IO uint32_t intfl
Definition: i2s_regs.h:87
mxc_i2s_regs_t::dmach0
__IO uint32_t dmach0
Definition: i2s_regs.h:83
mxc_i2s_regs_t::wkfl
__IO uint32_t wkfl
Definition: i2s_regs.h:91
mxc_i2s_regs_t::extsetup
__IO uint32_t extsetup
Definition: i2s_regs.h:89
mxc_i2s_regs_t::ctrl1ch0
__IO uint32_t ctrl1ch0
Definition: i2s_regs.h:79
mxc_i2s_regs_t::inten
__IO uint32_t inten
Definition: i2s_regs.h:88
mxc_i2s_regs_t
Definition: i2s_regs.h:76