28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_SIR_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_SIR_REGS_H_
38#if defined (__ICCARM__)
39 #pragma system_include
53#define __I volatile const
59#define __R volatile const
79 __R uint32_t rsv_0x8_0xff[62];
91#define MXC_R_SIR_STATUS ((uint32_t)0x00000000UL)
92#define MXC_R_SIR_ADDR ((uint32_t)0x00000004UL)
93#define MXC_R_SIR_FSTAT ((uint32_t)0x00000100UL)
94#define MXC_R_SIR_SFSTAT ((uint32_t)0x00000104UL)
103#define MXC_F_SIR_STATUS_CFG_VALID_POS 0
104#define MXC_F_SIR_STATUS_CFG_VALID ((uint32_t)(0x1UL << MXC_F_SIR_STATUS_CFG_VALID_POS))
106#define MXC_F_SIR_STATUS_CFG_ERR_POS 1
107#define MXC_F_SIR_STATUS_CFG_ERR ((uint32_t)(0x1UL << MXC_F_SIR_STATUS_CFG_ERR_POS))
109#define MXC_F_SIR_STATUS_USER_CFG_ERR_POS 2
110#define MXC_F_SIR_STATUS_USER_CFG_ERR ((uint32_t)(0x1UL << MXC_F_SIR_STATUS_USER_CFG_ERR_POS))
122#define MXC_F_SIR_ADDR_ADDR_POS 0
123#define MXC_F_SIR_ADDR_ADDR ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_ADDR_ADDR_POS))
133#define MXC_F_SIR_FSTAT_FPU_POS 0
134#define MXC_F_SIR_FSTAT_FPU ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_FPU_POS))
136#define MXC_F_SIR_FSTAT_TRNG_POS 14
137#define MXC_F_SIR_FSTAT_TRNG ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_TRNG_POS))
139#define MXC_F_SIR_FSTAT_DS_ACK_POS 15
140#define MXC_F_SIR_FSTAT_DS_ACK ((uint32_t)(0x1UL << MXC_F_SIR_FSTAT_DS_ACK_POS))
150#define MXC_F_SIR_SFSTAT_SECFUNC0_POS 0
151#define MXC_F_SIR_SFSTAT_SECFUNC0 ((uint32_t)(0x1UL << MXC_F_SIR_SFSTAT_SECFUNC0_POS))
__I uint32_t addr
Definition: sir_regs.h:78
__I uint32_t fstat
Definition: sir_regs.h:80
__I uint32_t status
Definition: sir_regs.h:77
__I uint32_t sfstat
Definition: sir_regs.h:81
Definition: sir_regs.h:76