gpio.h

 
/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
/* Define to prevent redundant inclusion */
#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_GPIO_H_
#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_GPIO_H_
 
/* **** Includes **** */
#include "gpio_regs.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* **** Definitions **** */
#define MXC_GPIO_PORT_0 ((uint32_t)(1UL << 0)) 
#define MXC_GPIO_PORT_1 ((uint32_t)(1UL << 1)) 
#define MXC_GPIO_PORT_2 ((uint32_t)(1UL << 2)) 
#define MXC_GPIO_PORT_3 ((uint32_t)(1UL << 3)) 
#define MXC_GPIO_PIN_0 ((uint32_t)(1UL << 0)) 
#define MXC_GPIO_PIN_1 ((uint32_t)(1UL << 1)) 
#define MXC_GPIO_PIN_2 ((uint32_t)(1UL << 2)) 
#define MXC_GPIO_PIN_3 ((uint32_t)(1UL << 3)) 
#define MXC_GPIO_PIN_4 ((uint32_t)(1UL << 4)) 
#define MXC_GPIO_PIN_5 ((uint32_t)(1UL << 5)) 
#define MXC_GPIO_PIN_6 ((uint32_t)(1UL << 6)) 
#define MXC_GPIO_PIN_7 ((uint32_t)(1UL << 7)) 
#define MXC_GPIO_PIN_8 ((uint32_t)(1UL << 8)) 
#define MXC_GPIO_PIN_9 ((uint32_t)(1UL << 9)) 
#define MXC_GPIO_PIN_10 ((uint32_t)(1UL << 10)) 
#define MXC_GPIO_PIN_11 ((uint32_t)(1UL << 11)) 
#define MXC_GPIO_PIN_12 ((uint32_t)(1UL << 12)) 
#define MXC_GPIO_PIN_13 ((uint32_t)(1UL << 13)) 
#define MXC_GPIO_PIN_14 ((uint32_t)(1UL << 14)) 
#define MXC_GPIO_PIN_15 ((uint32_t)(1UL << 15)) 
#define MXC_GPIO_PIN_16 ((uint32_t)(1UL << 16)) 
#define MXC_GPIO_PIN_17 ((uint32_t)(1UL << 17)) 
#define MXC_GPIO_PIN_18 ((uint32_t)(1UL << 18)) 
#define MXC_GPIO_PIN_19 ((uint32_t)(1UL << 19)) 
#define MXC_GPIO_PIN_20 ((uint32_t)(1UL << 20)) 
#define MXC_GPIO_PIN_21 ((uint32_t)(1UL << 21)) 
#define MXC_GPIO_PIN_22 ((uint32_t)(1UL << 22)) 
#define MXC_GPIO_PIN_23 ((uint32_t)(1UL << 23)) 
#define MXC_GPIO_PIN_24 ((uint32_t)(1UL << 24)) 
#define MXC_GPIO_PIN_25 ((uint32_t)(1UL << 25)) 
#define MXC_GPIO_PIN_26 ((uint32_t)(1UL << 26)) 
#define MXC_GPIO_PIN_27 ((uint32_t)(1UL << 27)) 
#define MXC_GPIO_PIN_28 ((uint32_t)(1UL << 28)) 
#define MXC_GPIO_PIN_29 ((uint32_t)(1UL << 29)) 
#define MXC_GPIO_PIN_30 ((uint32_t)(1UL << 30)) 
#define MXC_GPIO_PIN_31 ((uint32_t)(1UL << 31)) 
typedef void (*mxc_gpio_callback_fn)(void *cbdata);
 
typedef enum {
    MXC_GPIO_FUNC_IN, 
    MXC_GPIO_FUNC_OUT, 
    MXC_GPIO_FUNC_ALT1, 
    MXC_GPIO_FUNC_ALT2, 
    MXC_GPIO_FUNC_ALT3, 
    MXC_GPIO_FUNC_ALT4, 
} mxc_gpio_func_t;
 
typedef enum {
    MXC_GPIO_VSSEL_VDDIO, 
    MXC_GPIO_VSSEL_VDDIOH, 
} mxc_gpio_vssel_t;
 
typedef enum {
    MXC_GPIO_DRVSTR_0, 
    MXC_GPIO_DRVSTR_1, 
    MXC_GPIO_DRVSTR_2, 
    MXC_GPIO_DRVSTR_3, 
} mxc_gpio_drvstr_t;
 
typedef enum {
    MXC_GPIO_PAD_NONE, 
    MXC_GPIO_PAD_PULL_UP, 
    MXC_GPIO_PAD_PULL_DOWN, 
    MXC_GPIO_PAD_WEAK_PULL_UP = MXC_GPIO_PAD_PULL_UP, 
    MXC_GPIO_PAD_WEAK_PULL_DOWN = MXC_GPIO_PAD_PULL_DOWN, 
} mxc_gpio_pad_t;
 
typedef struct {
    mxc_gpio_regs_t *port; 
    uint32_t mask; 
    mxc_gpio_func_t func; 
    mxc_gpio_pad_t pad; 
    mxc_gpio_vssel_t vssel; 
    mxc_gpio_drvstr_t drvstr; 
} mxc_gpio_cfg_t;
 
typedef enum {
    MXC_GPIO_INT_LEVEL, 
    MXC_GPIO_INT_EDGE 
} mxc_gpio_int_mode_t;
 
typedef enum {
    MXC_GPIO_INT_FALLING, 
    MXC_GPIO_INT_HIGH, 
    MXC_GPIO_INT_RISING, 
    MXC_GPIO_INT_LOW, 
    MXC_GPIO_INT_BOTH 
} mxc_gpio_int_pol_t;
 
typedef enum {
    MXC_GPIO_CONFIG_UNLOCKED = 0, 
    MXC_GPIO_CONFIG_LOCKED, 
} mxc_gpio_config_lock_t;
 
/* **** Function Prototypes **** */
 
int MXC_GPIO_Init(uint32_t portMask);
 
int MXC_GPIO_Shutdown(uint32_t portMask);
 
int MXC_GPIO_Reset(uint32_t portMask);
 
int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg);
 
uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask);
 
void MXC_GPIO_OutSet(mxc_gpio_regs_t *port, uint32_t mask);
 
void MXC_GPIO_OutClr(mxc_gpio_regs_t *port, uint32_t mask);
 
uint32_t MXC_GPIO_OutGet(mxc_gpio_regs_t *port, uint32_t mask);
 
void MXC_GPIO_OutPut(mxc_gpio_regs_t *port, uint32_t mask, uint32_t val);
 
void MXC_GPIO_OutToggle(mxc_gpio_regs_t *port, uint32_t mask);
 
int MXC_GPIO_IntConfig(const mxc_gpio_cfg_t *cfg, mxc_gpio_int_pol_t pol);
 
void MXC_GPIO_EnableInt(mxc_gpio_regs_t *port, uint32_t mask);
 
void MXC_GPIO_DisableInt(mxc_gpio_regs_t *port, uint32_t mask);
 
uint32_t MXC_GPIO_GetFlags(mxc_gpio_regs_t *port);
 
void MXC_GPIO_ClearFlags(mxc_gpio_regs_t *port, uint32_t flags);
 
void MXC_GPIO_RegisterCallback(const mxc_gpio_cfg_t *cfg, mxc_gpio_callback_fn callback,
                               void *cbdata);
 
void MXC_GPIO_Handler(unsigned int port);
 
int MXC_GPIO_SetVSSEL(mxc_gpio_regs_t *port, mxc_gpio_vssel_t vssel, uint32_t mask);
 
void MXC_GPIO_SetWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
 
void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
 
uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
 
void MXC_GPIO_SetConfigLock(mxc_gpio_config_lock_t locked);
 
mxc_gpio_config_lock_t MXC_GPIO_GetConfigLock(void);
 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_GPIO_H_